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authorShaohua Li <shaohua.li@intel.com>2008-02-24 20:46:41 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2008-04-21 00:47:03 -0400
commit7d715a6c1ae5785d00fb9a876b5abdfc43abc44b (patch)
tree58ec6d1969739a590e0c6c976bfebf04c8e9f31e /include/linux/pci.h
parent657472e9ccd9fccb82b775eb691c4b25b27451da (diff)
PCI: add PCI Express ASPM support
PCI Express ASPM defines a protocol for PCI Express components in the D0 state to reduce Link power by placing their Links into a low power state and instructing the other end of the Link to do likewise. This capability allows hardware-autonomous, dynamic Link power reduction beyond what is achievable by software-only controlled power management. However, The device should be configured by software appropriately. Enabling ASPM will save power, but will introduce device latency. This patch adds ASPM support in Linux. It introduces a global policy for ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control it. The interface can be used as a boot option too. Currently we have below setting: -default, BIOS default setting -powersave, highest power saving mode, enable all available ASPM state and clock power management -performance, highest performance, disable ASPM and clock power management By default, the 'default' policy is used currently. In my test, power difference between powersave mode and performance mode is about 1.3w in a system with 3 PCIE links. Note: some devices might not work well with aspm, either because chipset issue or device issue. The patch provide API (pci_disable_link_state), driver can disable ASPM for specific device. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux/pci.h')
-rw-r--r--include/linux/pci.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 3b8a4e17052..14bf3d236d1 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -128,6 +128,7 @@ struct pci_cap_saved_state {
128 u32 data[0]; 128 u32 data[0];
129}; 129};
130 130
131struct pcie_link_state;
131/* 132/*
132 * The pci_dev structure is used to describe PCI devices. 133 * The pci_dev structure is used to describe PCI devices.
133 */ 134 */
@@ -164,6 +165,10 @@ struct pci_dev {
164 this is D0-D3, D0 being fully functional, 165 this is D0-D3, D0 being fully functional,
165 and D3 being off. */ 166 and D3 being off. */
166 167
168#ifdef CONFIG_PCIEASPM
169 struct pcie_link_state *link_state; /* ASPM link state. */
170#endif
171
167 pci_channel_state_t error_state; /* current connectivity state */ 172 pci_channel_state_t error_state; /* current connectivity state */
168 struct device dev; /* Generic device interface */ 173 struct device dev; /* Generic device interface */
169 174