diff options
author | Roland Dreier <rolandd@cisco.com> | 2007-06-18 12:23:47 -0400 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2007-06-18 12:23:47 -0400 |
commit | e61ef2416b0b92828512b6cfcd0104a02b6431fe (patch) | |
tree | 51d3307aa5be5591f5859f96a3bd1dd20231b9b0 /include/linux/mlx4/qp.h | |
parent | 5ae2a7a836be660ff1621cce1c46930f19200589 (diff) |
IB/mlx4: Make sure inline data segments don't cross a 64 byte boundary
Inline data segments in send WQEs are not allowed to cross a 64 byte
boundary. We use inline data segments to hold the UD headers for MLX
QPs (QP0 and QP1). A send with GRH on QP1 will have a UD header that
is too big to fit in a single inline data segment without crossing a
64 byte boundary, so split the header into two inline data segments.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'include/linux/mlx4/qp.h')
-rw-r--r-- | include/linux/mlx4/qp.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h index 9eeb61adf6a..10c57d27914 100644 --- a/include/linux/mlx4/qp.h +++ b/include/linux/mlx4/qp.h | |||
@@ -269,6 +269,10 @@ struct mlx4_wqe_data_seg { | |||
269 | __be64 addr; | 269 | __be64 addr; |
270 | }; | 270 | }; |
271 | 271 | ||
272 | enum { | ||
273 | MLX4_INLINE_ALIGN = 64, | ||
274 | }; | ||
275 | |||
272 | struct mlx4_wqe_inline_seg { | 276 | struct mlx4_wqe_inline_seg { |
273 | __be32 byte_count; | 277 | __be32 byte_count; |
274 | }; | 278 | }; |