diff options
author | Markus Lidel <Markus.Lidel@shadowconnect.com> | 2005-06-24 01:02:21 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-24 03:05:29 -0400 |
commit | 9e87545f06930c1d294423a8091d1077e7444a47 (patch) | |
tree | ef05fca1becfa0e1584f234ddf9b1a430b7d018e /include/linux/i2o.h | |
parent | b2aaee33fbb354a2f08121aa1c1be55841102761 (diff) |
[PATCH] I2O: second code cleanup of sparse warnings and unneeded syncronization
Changes:
- Added header "core.h" for i2o_core.ko internal definitions
- More sparse fixes
- Changed display of TID's in sysfs attributes from XXX to 0xXXX
- Use the right functions for accessing I/O and normal memory
- Removed error handling of SCSI device errors and let the SCSI layer
take care of it
- Added new device / removed device handling to SCSI-OSM
- Make status access volatile
- Cleaned up activation of I2O controller
- Removed unnecessary wmb() and rmb() calls
- Use own struct i2o_io for I/O memory instead of struct i2o_dma
Signed-off-by: Markus Lidel <Markus.Lidel@shadowconnect.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/linux/i2o.h')
-rw-r--r-- | include/linux/i2o.h | 116 |
1 files changed, 31 insertions, 85 deletions
diff --git a/include/linux/i2o.h b/include/linux/i2o.h index 2039a87c2b9..be937d0372a 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h | |||
@@ -119,12 +119,21 @@ struct i2o_driver { | |||
119 | }; | 119 | }; |
120 | 120 | ||
121 | /* | 121 | /* |
122 | * Contains all information which are necessary for DMA operations | 122 | * Contains DMA mapped address information |
123 | */ | 123 | */ |
124 | struct i2o_dma { | 124 | struct i2o_dma { |
125 | void *virt; | 125 | void *virt; |
126 | dma_addr_t phys; | 126 | dma_addr_t phys; |
127 | u32 len; | 127 | size_t len; |
128 | }; | ||
129 | |||
130 | /* | ||
131 | * Contains IO mapped address information | ||
132 | */ | ||
133 | struct i2o_io { | ||
134 | void __iomem *virt; | ||
135 | unsigned long phys; | ||
136 | unsigned long len; | ||
128 | }; | 137 | }; |
129 | 138 | ||
130 | /* | 139 | /* |
@@ -173,8 +182,8 @@ struct i2o_controller { | |||
173 | struct semaphore lct_lock; /* Lock for LCT updates */ | 182 | struct semaphore lct_lock; /* Lock for LCT updates */ |
174 | struct i2o_dma status_block; /* IOP status block */ | 183 | struct i2o_dma status_block; /* IOP status block */ |
175 | 184 | ||
176 | struct i2o_dma base; /* controller messaging unit */ | 185 | struct i2o_io base; /* controller messaging unit */ |
177 | struct i2o_dma in_queue; /* inbound message queue Host->IOP */ | 186 | struct i2o_io in_queue; /* inbound message queue Host->IOP */ |
178 | struct i2o_dma out_queue; /* outbound message queue IOP->Host */ | 187 | struct i2o_dma out_queue; /* outbound message queue IOP->Host */ |
179 | 188 | ||
180 | unsigned int battery:1; /* Has a battery backup */ | 189 | unsigned int battery:1; /* Has a battery backup */ |
@@ -185,6 +194,7 @@ struct i2o_controller { | |||
185 | struct resource mem_resource; /* Mem resource allocated to the IOP */ | 194 | struct resource mem_resource; /* Mem resource allocated to the IOP */ |
186 | 195 | ||
187 | struct device device; | 196 | struct device device; |
197 | struct class_device classdev; /* I2O controller class */ | ||
188 | struct i2o_device *exec; /* Executive */ | 198 | struct i2o_device *exec; /* Executive */ |
189 | #if BITS_PER_LONG == 64 | 199 | #if BITS_PER_LONG == 64 |
190 | spinlock_t context_list_lock; /* lock for context_list */ | 200 | spinlock_t context_list_lock; /* lock for context_list */ |
@@ -235,9 +245,10 @@ struct i2o_sys_tbl { | |||
235 | extern struct list_head i2o_controllers; | 245 | extern struct list_head i2o_controllers; |
236 | 246 | ||
237 | /* Message functions */ | 247 | /* Message functions */ |
238 | static inline u32 i2o_msg_get(struct i2o_controller *, struct i2o_message __iomem **); | 248 | static inline u32 i2o_msg_get(struct i2o_controller *, |
239 | extern u32 i2o_msg_get_wait(struct i2o_controller *, struct i2o_message __iomem **, | 249 | struct i2o_message __iomem **); |
240 | int); | 250 | extern u32 i2o_msg_get_wait(struct i2o_controller *, |
251 | struct i2o_message __iomem **, int); | ||
241 | static inline void i2o_msg_post(struct i2o_controller *, u32); | 252 | static inline void i2o_msg_post(struct i2o_controller *, u32); |
242 | static inline int i2o_msg_post_wait(struct i2o_controller *, u32, | 253 | static inline int i2o_msg_post_wait(struct i2o_controller *, u32, |
243 | unsigned long); | 254 | unsigned long); |
@@ -638,14 +649,12 @@ extern int i2o_exec_lct_get(struct i2o_controller *); | |||
638 | * available returns I2O_QUEUE_EMPTY and msg is leaved untouched. | 649 | * available returns I2O_QUEUE_EMPTY and msg is leaved untouched. |
639 | */ | 650 | */ |
640 | static inline u32 i2o_msg_get(struct i2o_controller *c, | 651 | static inline u32 i2o_msg_get(struct i2o_controller *c, |
641 | struct i2o_message __iomem **msg) | 652 | struct i2o_message __iomem ** msg) |
642 | { | 653 | { |
643 | u32 m = readl(c->in_port); | 654 | u32 m = readl(c->in_port); |
644 | 655 | ||
645 | if (m != I2O_QUEUE_EMPTY) { | 656 | if (m != I2O_QUEUE_EMPTY) |
646 | *msg = c->in_queue.virt + m; | 657 | *msg = c->in_queue.virt + m; |
647 | rmb(); | ||
648 | } | ||
649 | 658 | ||
650 | return m; | 659 | return m; |
651 | }; | 660 | }; |
@@ -659,7 +668,6 @@ static inline u32 i2o_msg_get(struct i2o_controller *c, | |||
659 | */ | 668 | */ |
660 | static inline void i2o_msg_post(struct i2o_controller *c, u32 m) | 669 | static inline void i2o_msg_post(struct i2o_controller *c, u32 m) |
661 | { | 670 | { |
662 | wmb(); | ||
663 | writel(m, c->in_port); | 671 | writel(m, c->in_port); |
664 | }; | 672 | }; |
665 | 673 | ||
@@ -706,14 +714,11 @@ static inline void i2o_flush_reply(struct i2o_controller *c, u32 m) | |||
706 | * work for sender side messages as they are ioremap objects | 714 | * work for sender side messages as they are ioremap objects |
707 | * provided by the I2O controller. | 715 | * provided by the I2O controller. |
708 | */ | 716 | */ |
709 | static inline struct i2o_message __iomem *i2o_msg_out_to_virt(struct | 717 | static inline struct i2o_message *i2o_msg_out_to_virt(struct i2o_controller *c, |
710 | i2o_controller *c, | 718 | u32 m) |
711 | u32 m) | ||
712 | { | 719 | { |
713 | if (unlikely | 720 | BUG_ON(m < c->out_queue.phys |
714 | (m < c->out_queue.phys | 721 | || m >= c->out_queue.phys + c->out_queue.len); |
715 | || m >= c->out_queue.phys + c->out_queue.len)) | ||
716 | return NULL; | ||
717 | 722 | ||
718 | return c->out_queue.virt + (m - c->out_queue.phys); | 723 | return c->out_queue.virt + (m - c->out_queue.phys); |
719 | }; | 724 | }; |
@@ -729,69 +734,13 @@ static inline struct i2o_message __iomem *i2o_msg_out_to_virt(struct | |||
729 | * work for receive side messages as they are kmalloc objects | 734 | * work for receive side messages as they are kmalloc objects |
730 | * in a different pool. | 735 | * in a different pool. |
731 | */ | 736 | */ |
732 | static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct i2o_controller *c, | 737 | static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct |
733 | u32 m) | 738 | i2o_controller *c, |
739 | u32 m) | ||
734 | { | 740 | { |
735 | return c->in_queue.virt + m; | 741 | return c->in_queue.virt + m; |
736 | }; | 742 | }; |
737 | 743 | ||
738 | /** | ||
739 | * i2o_dma_alloc - Allocate DMA memory | ||
740 | * @dev: struct device pointer to the PCI device of the I2O controller | ||
741 | * @addr: i2o_dma struct which should get the DMA buffer | ||
742 | * @len: length of the new DMA memory | ||
743 | * @gfp_mask: GFP mask | ||
744 | * | ||
745 | * Allocate a coherent DMA memory and write the pointers into addr. | ||
746 | * | ||
747 | * Returns 0 on success or -ENOMEM on failure. | ||
748 | */ | ||
749 | static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, | ||
750 | size_t len, unsigned int gfp_mask) | ||
751 | { | ||
752 | struct pci_dev *pdev = to_pci_dev(dev); | ||
753 | int dma_64 = 0; | ||
754 | |||
755 | if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_64BIT_MASK)) { | ||
756 | dma_64 = 1; | ||
757 | if(pci_set_dma_mask(pdev, DMA_32BIT_MASK)) | ||
758 | return -ENOMEM; | ||
759 | } | ||
760 | |||
761 | addr->virt = dma_alloc_coherent(dev, len, &addr->phys, gfp_mask); | ||
762 | |||
763 | if ((sizeof(dma_addr_t) > 4) && dma_64) | ||
764 | if(pci_set_dma_mask(pdev, DMA_64BIT_MASK)) | ||
765 | printk(KERN_WARNING "i2o: unable to set 64-bit DMA"); | ||
766 | |||
767 | if (!addr->virt) | ||
768 | return -ENOMEM; | ||
769 | |||
770 | memset(addr->virt, 0, len); | ||
771 | addr->len = len; | ||
772 | |||
773 | return 0; | ||
774 | }; | ||
775 | |||
776 | /** | ||
777 | * i2o_dma_free - Free DMA memory | ||
778 | * @dev: struct device pointer to the PCI device of the I2O controller | ||
779 | * @addr: i2o_dma struct which contains the DMA buffer | ||
780 | * | ||
781 | * Free a coherent DMA memory and set virtual address of addr to NULL. | ||
782 | */ | ||
783 | static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr) | ||
784 | { | ||
785 | if (addr->virt) { | ||
786 | if (addr->phys) | ||
787 | dma_free_coherent(dev, addr->len, addr->virt, | ||
788 | addr->phys); | ||
789 | else | ||
790 | kfree(addr->virt); | ||
791 | addr->virt = NULL; | ||
792 | } | ||
793 | }; | ||
794 | |||
795 | /* | 744 | /* |
796 | * Endian handling wrapped into the macro - keeps the core code | 745 | * Endian handling wrapped into the macro - keeps the core code |
797 | * cleaner. | 746 | * cleaner. |
@@ -1141,16 +1090,13 @@ extern void i2o_debug_state(struct i2o_controller *c); | |||
1141 | #define ELEVEN_WORD_MSG_SIZE 0x000B0000 | 1090 | #define ELEVEN_WORD_MSG_SIZE 0x000B0000 |
1142 | #define I2O_MESSAGE_SIZE(x) ((x)<<16) | 1091 | #define I2O_MESSAGE_SIZE(x) ((x)<<16) |
1143 | 1092 | ||
1144 | /* Special TID Assignments */ | 1093 | /* special TID assignments */ |
1145 | |||
1146 | #define ADAPTER_TID 0 | 1094 | #define ADAPTER_TID 0 |
1147 | #define HOST_TID 1 | 1095 | #define HOST_TID 1 |
1148 | 1096 | ||
1149 | #define MSG_FRAME_SIZE 128 /* i2o_scsi assumes >= 32 */ | 1097 | /* outbound queue defines */ |
1150 | #define SG_TABLESIZE 30 | 1098 | #define I2O_MAX_OUTBOUND_MSG_FRAMES 128 |
1151 | #define NMBR_MSG_FRAMES 128 | 1099 | #define I2O_OUTBOUND_MSG_FRAME_SIZE 128 /* in 32-bit words */ |
1152 | |||
1153 | #define MSG_POOL_SIZE (MSG_FRAME_SIZE*NMBR_MSG_FRAMES*sizeof(u32)) | ||
1154 | 1100 | ||
1155 | #define I2O_POST_WAIT_OK 0 | 1101 | #define I2O_POST_WAIT_OK 0 |
1156 | #define I2O_POST_WAIT_TIMEOUT -ETIMEDOUT | 1102 | #define I2O_POST_WAIT_TIMEOUT -ETIMEDOUT |