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authorAndi Kleen <ak@suse.de>2006-06-26 07:56:13 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 13:48:14 -0400
commit240cd6a80642da528bfa382ec2ae4e3cb8991ea7 (patch)
tree6c24052ea167a2fd7e0be93c167e9e7da5bddd2b /include/asm-x86_64/processor.h
parentfaee9a5dc9d8399cc3b1b8e18b6d7ff7b17f1af1 (diff)
[PATCH] i386/x86-64: Emulate CPUID4 on AMD
Intel systems report the cache level data from CPUID 4 in sysfs. Add a CPUID 4 emulation for AMD CPUs to report the same information for them. This allows programs to read this information in a uniform way. The AMD way to report this is less flexible so some assumptions are hardcoded (e.g. no L3) Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-x86_64/processor.h')
-rw-r--r--include/asm-x86_64/processor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 3061a38a3b1..e583f0d9520 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -96,6 +96,7 @@ extern char ignore_irq13;
96extern void identify_cpu(struct cpuinfo_x86 *); 96extern void identify_cpu(struct cpuinfo_x86 *);
97extern void print_cpu_info(struct cpuinfo_x86 *); 97extern void print_cpu_info(struct cpuinfo_x86 *);
98extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); 98extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
99extern unsigned short num_cache_leaves;
99 100
100/* 101/*
101 * EFLAGS bits 102 * EFLAGS bits