diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-07-26 10:29:23 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-07-26 10:29:23 -0400 |
commit | 6dec3a10a7a6093af10cef7ac56021150afd6451 (patch) | |
tree | f4d8511f023e3e0c203baf889d4a0f3925882381 /include/asm-x86/ipi.h | |
parent | 29308333fbe2cc61258c1c470f9403960428beb2 (diff) | |
parent | 10a010f6953b5a14ba2f0be40a4fce1bea220875 (diff) |
Merge branch 'x86/x2apic' into x86/core
Conflicts:
include/asm-x86/i8259.h
include/asm-x86/msidef.h
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/ipi.h')
-rw-r--r-- | include/asm-x86/ipi.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h index c1b22679751..30a692cfaff 100644 --- a/include/asm-x86/ipi.h +++ b/include/asm-x86/ipi.h | |||
@@ -49,6 +49,12 @@ static inline int __prepare_ICR2(unsigned int mask) | |||
49 | return SET_APIC_DEST_FIELD(mask); | 49 | return SET_APIC_DEST_FIELD(mask); |
50 | } | 50 | } |
51 | 51 | ||
52 | static inline void __xapic_wait_icr_idle(void) | ||
53 | { | ||
54 | while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY) | ||
55 | cpu_relax(); | ||
56 | } | ||
57 | |||
52 | static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, | 58 | static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, |
53 | unsigned int dest) | 59 | unsigned int dest) |
54 | { | 60 | { |
@@ -64,7 +70,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, | |||
64 | /* | 70 | /* |
65 | * Wait for idle. | 71 | * Wait for idle. |
66 | */ | 72 | */ |
67 | apic_wait_icr_idle(); | 73 | __xapic_wait_icr_idle(); |
68 | 74 | ||
69 | /* | 75 | /* |
70 | * No need to touch the target chip field | 76 | * No need to touch the target chip field |
@@ -74,7 +80,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, | |||
74 | /* | 80 | /* |
75 | * Send the IPI. The write to APIC_ICR fires this off. | 81 | * Send the IPI. The write to APIC_ICR fires this off. |
76 | */ | 82 | */ |
77 | apic_write(APIC_ICR, cfg); | 83 | native_apic_mem_write(APIC_ICR, cfg); |
78 | } | 84 | } |
79 | 85 | ||
80 | /* | 86 | /* |
@@ -92,13 +98,13 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector, | |||
92 | if (unlikely(vector == NMI_VECTOR)) | 98 | if (unlikely(vector == NMI_VECTOR)) |
93 | safe_apic_wait_icr_idle(); | 99 | safe_apic_wait_icr_idle(); |
94 | else | 100 | else |
95 | apic_wait_icr_idle(); | 101 | __xapic_wait_icr_idle(); |
96 | 102 | ||
97 | /* | 103 | /* |
98 | * prepare target chip field | 104 | * prepare target chip field |
99 | */ | 105 | */ |
100 | cfg = __prepare_ICR2(mask); | 106 | cfg = __prepare_ICR2(mask); |
101 | apic_write(APIC_ICR2, cfg); | 107 | native_apic_mem_write(APIC_ICR2, cfg); |
102 | 108 | ||
103 | /* | 109 | /* |
104 | * program the ICR | 110 | * program the ICR |
@@ -108,7 +114,7 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector, | |||
108 | /* | 114 | /* |
109 | * Send the IPI. The write to APIC_ICR fires this off. | 115 | * Send the IPI. The write to APIC_ICR fires this off. |
110 | */ | 116 | */ |
111 | apic_write(APIC_ICR, cfg); | 117 | native_apic_mem_write(APIC_ICR, cfg); |
112 | } | 118 | } |
113 | 119 | ||
114 | static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) | 120 | static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) |