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authorDavid S. Miller <davem@davemloft.net>2006-06-20 04:20:00 -0400
committerDavid S. Miller <davem@davemloft.net>2006-06-20 04:20:00 -0400
commitfd0504c3217d6d1bc8f33f53fb536299cae8feda (patch)
tree4379f5376358d1f54fc183f458614f289ed6d326 /include/asm-sparc64/cpudata.h
parent3185d4d2873a46ca1620d784013f285522091aa0 (diff)
[SPARC64]: Send all device interrupts via one PIL.
This is the first in a series of cleanups that will hopefully allow a seamless attempt at using the generic IRQ handling infrastructure in the Linux kernel. Define PIL_DEVICE_IRQ and vector all device interrupts through there. Get rid of the ugly pil0_dummy_{bucket,desc}, instead vector the timer interrupt directly to a specific handler since the timer interrupt is the only event that will be signaled on PIL 14. The irq_worklist is now in the per-cpu trap_block[]. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/cpudata.h')
-rw-r--r--include/asm-sparc64/cpudata.h19
1 files changed, 10 insertions, 9 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 9d6a6dbaf12..f2cc9411b4c 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -74,8 +74,10 @@ struct trap_per_cpu {
74 unsigned long tsb_huge; 74 unsigned long tsb_huge;
75 unsigned long tsb_huge_temp; 75 unsigned long tsb_huge_temp;
76 76
77/* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size. */ 77/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */
78 unsigned long __pad2[4]; 78 unsigned int irq_worklist;
79 unsigned int __pad1;
80 unsigned long __pad2[3];
79} __attribute__((aligned(64))); 81} __attribute__((aligned(64)));
80extern struct trap_per_cpu trap_block[NR_CPUS]; 82extern struct trap_per_cpu trap_block[NR_CPUS];
81extern void init_cur_cpu_trap(struct thread_info *); 83extern void init_cur_cpu_trap(struct thread_info *);
@@ -119,6 +121,7 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
119#define TRAP_PER_CPU_CPU_LIST_PA 0xc8 121#define TRAP_PER_CPU_CPU_LIST_PA 0xc8
120#define TRAP_PER_CPU_TSB_HUGE 0xd0 122#define TRAP_PER_CPU_TSB_HUGE 0xd0
121#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 123#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8
124#define TRAP_PER_CPU_IRQ_WORKLIST 0xe0
122 125
123#define TRAP_BLOCK_SZ_SHIFT 8 126#define TRAP_BLOCK_SZ_SHIFT 8
124 127
@@ -171,11 +174,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
171 174
172/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ 175/* Clobbers TMP, loads local processor's IRQ work area into DEST. */
173#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ 176#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \
174 __GET_CPUID(TMP) \ 177 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
175 sethi %hi(__irq_work), DEST; \ 178 add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST;
176 sllx TMP, 6, TMP; \
177 or DEST, %lo(__irq_work), DEST; \
178 add DEST, TMP, DEST;
179 179
180/* Clobbers TMP, loads DEST with current thread info pointer. */ 180/* Clobbers TMP, loads DEST with current thread info pointer. */
181#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ 181#define TRAP_LOAD_THREAD_REG(DEST, TMP) \
@@ -211,9 +211,10 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
211 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ 211 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
212 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; 212 ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST;
213 213
214/* Clobbers TMP, loads local processor's IRQ work area into DEST. */
214#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \ 215#define TRAP_LOAD_IRQ_WORK(DEST, TMP) \
215 sethi %hi(__irq_work), DEST; \ 216 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \
216 or DEST, %lo(__irq_work), DEST; 217 add DEST, TRAP_PER_CPU_IRQ_WORKLIST, DEST;
217 218
218#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ 219#define TRAP_LOAD_THREAD_REG(DEST, TMP) \
219 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ 220 TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \