diff options
author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 02:59:17 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 02:59:17 -0400 |
commit | 5283ecb5ccbdb90d49fce6488d3944bba63a591c (patch) | |
tree | a58e20bd532fa5f933d099bb7b5dd0637b581d33 /include/asm-sh/cpu-sh4 | |
parent | d7c30c682a278abe1a52db83f69efec1a9d8f8c2 (diff) |
sh: Add support for R7780RP and R7780MP boards.
This adds support for the Renesas SH7780 development boards,
R7780RP and R7780MP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-sh4')
-rw-r--r-- | include/asm-sh/cpu-sh4/addrspace.h | 3 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh4/dma-sh7780.h | 39 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh4/dma.h | 11 |
3 files changed, 50 insertions, 3 deletions
diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h index 727634d886c..bb2e1b03060 100644 --- a/include/asm-sh/cpu-sh4/addrspace.h +++ b/include/asm-sh/cpu-sh4/addrspace.h | |||
@@ -22,5 +22,8 @@ | |||
22 | #define P4SEG_TLB_DATA 0xf7000000 | 22 | #define P4SEG_TLB_DATA 0xf7000000 |
23 | #define P4SEG_REG_BASE 0xff000000 | 23 | #define P4SEG_REG_BASE 0xff000000 |
24 | 24 | ||
25 | #define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ | ||
26 | #define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ | ||
27 | |||
25 | #endif /* __ASM_CPU_SH4_ADDRSPACE_H */ | 28 | #endif /* __ASM_CPU_SH4_ADDRSPACE_H */ |
26 | 29 | ||
diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h new file mode 100644 index 00000000000..6c90d28331b --- /dev/null +++ b/include/asm-sh/cpu-sh4/dma-sh7780.h | |||
@@ -0,0 +1,39 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H | ||
2 | #define __ASM_SH_CPU_SH4_DMA_SH7780_H | ||
3 | |||
4 | #define REQ_HE 0x000000C0 | ||
5 | #define REQ_H 0x00000080 | ||
6 | #define REQ_LE 0x00000040 | ||
7 | #define TM_BURST 0x0000020 | ||
8 | #define TS_8 0x00000000 | ||
9 | #define TS_16 0x00000008 | ||
10 | #define TS_32 0x00000010 | ||
11 | #define TS_16BLK 0x00000018 | ||
12 | #define TS_32BLK 0x00100000 | ||
13 | |||
14 | /* | ||
15 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
16 | * with their respective values as they appear in the CHCR registers. | ||
17 | * | ||
18 | * Defaults to a 64-bit transfer size. | ||
19 | */ | ||
20 | enum { | ||
21 | XMIT_SZ_8BIT, | ||
22 | XMIT_SZ_16BIT, | ||
23 | XMIT_SZ_32BIT, | ||
24 | XMIT_SZ_128BIT, | ||
25 | XMIT_SZ_256BIT, | ||
26 | }; | ||
27 | |||
28 | /* | ||
29 | * The DMA count is defined as the number of bytes to transfer. | ||
30 | */ | ||
31 | static unsigned int __attribute__ ((used)) ts_shift[] = { | ||
32 | [XMIT_SZ_8BIT] = 0, | ||
33 | [XMIT_SZ_16BIT] = 1, | ||
34 | [XMIT_SZ_32BIT] = 2, | ||
35 | [XMIT_SZ_128BIT] = 4, | ||
36 | [XMIT_SZ_256BIT] = 5, | ||
37 | }; | ||
38 | |||
39 | #endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index 0dfe61f1480..3e4b3e6d80c 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h | |||
@@ -1,11 +1,17 @@ | |||
1 | #ifndef __ASM_CPU_SH4_DMA_H | 1 | #ifndef __ASM_CPU_SH4_DMA_H |
2 | #define __ASM_CPU_SH4_DMA_H | 2 | #define __ASM_CPU_SH4_DMA_H |
3 | 3 | ||
4 | #define DMAOR_INIT ( 0x8000 | DMAOR_DME ) | ||
5 | |||
4 | #ifdef CONFIG_CPU_SH4A | 6 | #ifdef CONFIG_CPU_SH4A |
5 | #define SH_DMAC_BASE 0xfc808020 | 7 | #define SH_DMAC_BASE 0xfc808020 |
8 | |||
9 | #define CHCR_TS_MASK 0x18 | ||
10 | #define CHCR_TS_SHIFT 3 | ||
11 | |||
12 | #include <asm/cpu/dma-sh7780.h> | ||
6 | #else | 13 | #else |
7 | #define SH_DMAC_BASE 0xffa00000 | 14 | #define SH_DMAC_BASE 0xffa00000 |
8 | #endif | ||
9 | 15 | ||
10 | /* Definitions for the SuperH DMAC */ | 16 | /* Definitions for the SuperH DMAC */ |
11 | #define TM_BURST 0x0000080 | 17 | #define TM_BURST 0x0000080 |
@@ -19,8 +25,6 @@ | |||
19 | 25 | ||
20 | #define DMAOR_COD 0x00000008 | 26 | #define DMAOR_COD 0x00000008 |
21 | 27 | ||
22 | #define DMAOR_INIT ( 0x8000 | DMAOR_DME ) | ||
23 | |||
24 | /* | 28 | /* |
25 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | 29 | * The SuperH DMAC supports a number of transmit sizes, we list them here, |
26 | * with their respective values as they appear in the CHCR registers. | 30 | * with their respective values as they appear in the CHCR registers. |
@@ -45,5 +49,6 @@ static unsigned int ts_shift[] __attribute__ ((used)) = { | |||
45 | [XMIT_SZ_32BIT] = 2, | 49 | [XMIT_SZ_32BIT] = 2, |
46 | [XMIT_SZ_256BIT] = 5, | 50 | [XMIT_SZ_256BIT] = 5, |
47 | }; | 51 | }; |
52 | #endif | ||
48 | 53 | ||
49 | #endif /* __ASM_CPU_SH4_DMA_H */ | 54 | #endif /* __ASM_CPU_SH4_DMA_H */ |