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authorOlof Johansson <olof@lixom.net>2007-02-04 17:36:51 -0500
committerPaul Mackerras <paulus@samba.org>2007-02-06 22:03:22 -0500
commit1199919b69ff9559a3d3444fb5eb45b7cc48264d (patch)
tree40313402be457e274e777b385703b25fa359f9b2 /include/asm-powerpc
parentbfed9d32d968b2054a036d419537e9e9909bb343 (diff)
[POWERPC] pasemi: Idle loops
Powersave support on PA6T. Right now it only uses 'doze' mode, and will default to no savings (spin). Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 0279d4ec521..923df6ceaa5 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -166,6 +166,7 @@
166#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ 166#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */
167#define SPRN_SPURR 0x134 /* Scaled PURR */ 167#define SPRN_SPURR 0x134 /* Scaled PURR */
168#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ 168#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
169#define SPRN_LPCR 0x13E /* LPAR Control Register */
169#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */ 170#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */
170#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */ 171#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */
171#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */ 172#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */