aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc/irq.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-23 01:11:30 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-23 01:11:30 -0400
commit45c091bb2d453ce4a8b06cf19872ec7a77fc4799 (patch)
tree06fb2e05518ebfba163f8424e028e7faf5672d66 /include/asm-powerpc/irq.h
parentd588fcbe5a7ba8bba2cebf7799ab2d573717a806 (diff)
parent2191fe3e39159e3375f4b7ec1420df149f154101 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (139 commits) [POWERPC] re-enable OProfile for iSeries, using timer interrupt [POWERPC] support ibm,extended-*-frequency properties [POWERPC] Extra sanity check in EEH code [POWERPC] Dont look for class-code in pci children [POWERPC] Fix mdelay badness on shared processor partitions [POWERPC] disable floating point exceptions for init [POWERPC] Unify ppc syscall tables [POWERPC] mpic: add support for serial mode interrupts [POWERPC] pseries: Print PCI slot location code on failure [POWERPC] spufs: one more fix for 64k pages [POWERPC] spufs: fail spu_create with invalid flags [POWERPC] spufs: clear class2 interrupt status before wakeup [POWERPC] spufs: fix Makefile for "make clean" [POWERPC] spufs: remove stop_code from struct spu [POWERPC] spufs: fix spu irq affinity setting [POWERPC] spufs: further abstract priv1 register access [POWERPC] spufs: split the Cell BE support into generic and platform dependant parts [POWERPC] spufs: dont try to access SPE channel 1 count [POWERPC] spufs: use kzalloc in create_spu [POWERPC] spufs: fix initial state of wbox file ... Manually resolved conflicts in: drivers/net/phy/Makefile include/asm-powerpc/spu.h
Diffstat (limited to 'include/asm-powerpc/irq.h')
-rw-r--r--include/asm-powerpc/irq.h86
1 files changed, 86 insertions, 0 deletions
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index 1e9f2533030..a10feec29d4 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -347,6 +347,92 @@ extern u64 ppc64_interrupt_controller;
347#define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET) 347#define SIU_INT_PC1 ((uint)0x3e+CPM_IRQ_OFFSET)
348#define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET) 348#define SIU_INT_PC0 ((uint)0x3f+CPM_IRQ_OFFSET)
349 349
350#elif defined(CONFIG_PPC_86xx)
351#include <asm/mpc86xx.h>
352
353#define NR_EPIC_INTS 48
354#ifndef NR_8259_INTS
355#define NR_8259_INTS 16 /*ULI 1575 can route 12 interrupts */
356#endif
357#define NUM_8259_INTERRUPTS NR_8259_INTS
358
359#ifndef I8259_OFFSET
360#define I8259_OFFSET 0
361#endif
362
363#define NR_IRQS 256
364
365/* Internal IRQs on MPC86xx OpenPIC */
366
367#ifndef MPC86xx_OPENPIC_IRQ_OFFSET
368#define MPC86xx_OPENPIC_IRQ_OFFSET NR_8259_INTS
369#endif
370
371/* The 48 internal sources */
372#define MPC86xx_IRQ_NULL ( 0 + MPC86xx_OPENPIC_IRQ_OFFSET)
373#define MPC86xx_IRQ_MCM ( 1 + MPC86xx_OPENPIC_IRQ_OFFSET)
374#define MPC86xx_IRQ_DDR ( 2 + MPC86xx_OPENPIC_IRQ_OFFSET)
375#define MPC86xx_IRQ_LBC ( 3 + MPC86xx_OPENPIC_IRQ_OFFSET)
376#define MPC86xx_IRQ_DMA0 ( 4 + MPC86xx_OPENPIC_IRQ_OFFSET)
377#define MPC86xx_IRQ_DMA1 ( 5 + MPC86xx_OPENPIC_IRQ_OFFSET)
378#define MPC86xx_IRQ_DMA2 ( 6 + MPC86xx_OPENPIC_IRQ_OFFSET)
379#define MPC86xx_IRQ_DMA3 ( 7 + MPC86xx_OPENPIC_IRQ_OFFSET)
380
381/* no 10,11 */
382#define MPC86xx_IRQ_UART2 (12 + MPC86xx_OPENPIC_IRQ_OFFSET)
383#define MPC86xx_IRQ_TSEC1_TX (13 + MPC86xx_OPENPIC_IRQ_OFFSET)
384#define MPC86xx_IRQ_TSEC1_RX (14 + MPC86xx_OPENPIC_IRQ_OFFSET)
385#define MPC86xx_IRQ_TSEC3_TX (15 + MPC86xx_OPENPIC_IRQ_OFFSET)
386#define MPC86xx_IRQ_TSEC3_RX (16 + MPC86xx_OPENPIC_IRQ_OFFSET)
387#define MPC86xx_IRQ_TSEC3_ERROR (17 + MPC86xx_OPENPIC_IRQ_OFFSET)
388#define MPC86xx_IRQ_TSEC1_ERROR (18 + MPC86xx_OPENPIC_IRQ_OFFSET)
389#define MPC86xx_IRQ_TSEC2_TX (19 + MPC86xx_OPENPIC_IRQ_OFFSET)
390#define MPC86xx_IRQ_TSEC2_RX (20 + MPC86xx_OPENPIC_IRQ_OFFSET)
391#define MPC86xx_IRQ_TSEC4_TX (21 + MPC86xx_OPENPIC_IRQ_OFFSET)
392#define MPC86xx_IRQ_TSEC4_RX (22 + MPC86xx_OPENPIC_IRQ_OFFSET)
393#define MPC86xx_IRQ_TSEC4_ERROR (23 + MPC86xx_OPENPIC_IRQ_OFFSET)
394#define MPC86xx_IRQ_TSEC2_ERROR (24 + MPC86xx_OPENPIC_IRQ_OFFSET)
395/* no 25 */
396#define MPC86xx_IRQ_UART1 (26 + MPC86xx_OPENPIC_IRQ_OFFSET)
397#define MPC86xx_IRQ_IIC (27 + MPC86xx_OPENPIC_IRQ_OFFSET)
398#define MPC86xx_IRQ_PERFMON (28 + MPC86xx_OPENPIC_IRQ_OFFSET)
399/* no 29,30,31 */
400#define MPC86xx_IRQ_SRIO_ERROR (32 + MPC86xx_OPENPIC_IRQ_OFFSET)
401#define MPC86xx_IRQ_SRIO_OUT_BELL (33 + MPC86xx_OPENPIC_IRQ_OFFSET)
402#define MPC86xx_IRQ_SRIO_IN_BELL (34 + MPC86xx_OPENPIC_IRQ_OFFSET)
403/* no 35,36 */
404#define MPC86xx_IRQ_SRIO_OUT_MSG1 (37 + MPC86xx_OPENPIC_IRQ_OFFSET)
405#define MPC86xx_IRQ_SRIO_IN_MSG1 (38 + MPC86xx_OPENPIC_IRQ_OFFSET)
406#define MPC86xx_IRQ_SRIO_OUT_MSG2 (39 + MPC86xx_OPENPIC_IRQ_OFFSET)
407#define MPC86xx_IRQ_SRIO_IN_MSG2 (40 + MPC86xx_OPENPIC_IRQ_OFFSET)
408
409/* The 12 external interrupt lines */
410#define MPC86xx_IRQ_EXT_BASE 48
411#define MPC86xx_IRQ_EXT0 (0 + MPC86xx_IRQ_EXT_BASE \
412 + MPC86xx_OPENPIC_IRQ_OFFSET)
413#define MPC86xx_IRQ_EXT1 (1 + MPC86xx_IRQ_EXT_BASE \
414 + MPC86xx_OPENPIC_IRQ_OFFSET)
415#define MPC86xx_IRQ_EXT2 (2 + MPC86xx_IRQ_EXT_BASE \
416 + MPC86xx_OPENPIC_IRQ_OFFSET)
417#define MPC86xx_IRQ_EXT3 (3 + MPC86xx_IRQ_EXT_BASE \
418 + MPC86xx_OPENPIC_IRQ_OFFSET)
419#define MPC86xx_IRQ_EXT4 (4 + MPC86xx_IRQ_EXT_BASE \
420 + MPC86xx_OPENPIC_IRQ_OFFSET)
421#define MPC86xx_IRQ_EXT5 (5 + MPC86xx_IRQ_EXT_BASE \
422 + MPC86xx_OPENPIC_IRQ_OFFSET)
423#define MPC86xx_IRQ_EXT6 (6 + MPC86xx_IRQ_EXT_BASE \
424 + MPC86xx_OPENPIC_IRQ_OFFSET)
425#define MPC86xx_IRQ_EXT7 (7 + MPC86xx_IRQ_EXT_BASE \
426 + MPC86xx_OPENPIC_IRQ_OFFSET)
427#define MPC86xx_IRQ_EXT8 (8 + MPC86xx_IRQ_EXT_BASE \
428 + MPC86xx_OPENPIC_IRQ_OFFSET)
429#define MPC86xx_IRQ_EXT9 (9 + MPC86xx_IRQ_EXT_BASE \
430 + MPC86xx_OPENPIC_IRQ_OFFSET)
431#define MPC86xx_IRQ_EXT10 (10 + MPC86xx_IRQ_EXT_BASE \
432 + MPC86xx_OPENPIC_IRQ_OFFSET)
433#define MPC86xx_IRQ_EXT11 (11 + MPC86xx_IRQ_EXT_BASE \
434 + MPC86xx_OPENPIC_IRQ_OFFSET)
435
350#else /* CONFIG_40x + CONFIG_8xx */ 436#else /* CONFIG_40x + CONFIG_8xx */
351/* 437/*
352 * this is the # irq's for all ppc arch's (pmac/chrp/prep) 438 * this is the # irq's for all ppc arch's (pmac/chrp/prep)