diff options
author | Arnd Bergmann <arnd@arndb.de> | 2006-12-06 23:37:29 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-07 11:39:37 -0500 |
commit | f5738ceed46782aea7663d62cb6398eb05fc4ce0 (patch) | |
tree | 156ebf498bc1d892d6f9e33d2751869417e30eb4 /include/asm-mips/unistd.h | |
parent | 28ec24e23229ae3d333f8d7f0e6b31fa8ea7bf46 (diff) |
[PATCH] remove kernel syscalls
The last thing we agreed on was to remove the macros entirely for 2.6.19,
on all architectures. Unfortunately, I think nobody actually _did_ that,
so they are still there.
[akpm@osdl.org: x86_64 fix]
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Greg Schafer <gschafer@zip.com.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-mips/unistd.h')
-rw-r--r-- | include/asm-mips/unistd.h | 262 |
1 files changed, 0 insertions, 262 deletions
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index ec56aa52f66..696cff39a1d 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h | |||
@@ -933,268 +933,6 @@ | |||
933 | 933 | ||
934 | #ifndef __ASSEMBLY__ | 934 | #ifndef __ASSEMBLY__ |
935 | 935 | ||
936 | /* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */ | ||
937 | #define _syscall0(type,name) \ | ||
938 | type name(void) \ | ||
939 | { \ | ||
940 | register unsigned long __a3 asm("$7"); \ | ||
941 | unsigned long __v0; \ | ||
942 | \ | ||
943 | __asm__ volatile ( \ | ||
944 | ".set\tnoreorder\n\t" \ | ||
945 | "li\t$2, %2\t\t\t# " #name "\n\t" \ | ||
946 | "syscall\n\t" \ | ||
947 | "move\t%0, $2\n\t" \ | ||
948 | ".set\treorder" \ | ||
949 | : "=&r" (__v0), "=r" (__a3) \ | ||
950 | : "i" (__NR_##name) \ | ||
951 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
952 | "memory"); \ | ||
953 | \ | ||
954 | if (__a3 == 0) \ | ||
955 | return (type) __v0; \ | ||
956 | errno = __v0; \ | ||
957 | return (type) -1; \ | ||
958 | } | ||
959 | |||
960 | /* | ||
961 | * DANGER: This macro isn't usable for the pipe(2) call | ||
962 | * which has a unusual return convention. | ||
963 | */ | ||
964 | #define _syscall1(type,name,atype,a) \ | ||
965 | type name(atype a) \ | ||
966 | { \ | ||
967 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
968 | register unsigned long __a3 asm("$7"); \ | ||
969 | unsigned long __v0; \ | ||
970 | \ | ||
971 | __asm__ volatile ( \ | ||
972 | ".set\tnoreorder\n\t" \ | ||
973 | "li\t$2, %3\t\t\t# " #name "\n\t" \ | ||
974 | "syscall\n\t" \ | ||
975 | "move\t%0, $2\n\t" \ | ||
976 | ".set\treorder" \ | ||
977 | : "=&r" (__v0), "=r" (__a3) \ | ||
978 | : "r" (__a0), "i" (__NR_##name) \ | ||
979 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
980 | "memory"); \ | ||
981 | \ | ||
982 | if (__a3 == 0) \ | ||
983 | return (type) __v0; \ | ||
984 | errno = __v0; \ | ||
985 | return (type) -1; \ | ||
986 | } | ||
987 | |||
988 | #define _syscall2(type,name,atype,a,btype,b) \ | ||
989 | type name(atype a, btype b) \ | ||
990 | { \ | ||
991 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
992 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
993 | register unsigned long __a3 asm("$7"); \ | ||
994 | unsigned long __v0; \ | ||
995 | \ | ||
996 | __asm__ volatile ( \ | ||
997 | ".set\tnoreorder\n\t" \ | ||
998 | "li\t$2, %4\t\t\t# " #name "\n\t" \ | ||
999 | "syscall\n\t" \ | ||
1000 | "move\t%0, $2\n\t" \ | ||
1001 | ".set\treorder" \ | ||
1002 | : "=&r" (__v0), "=r" (__a3) \ | ||
1003 | : "r" (__a0), "r" (__a1), "i" (__NR_##name) \ | ||
1004 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1005 | "memory"); \ | ||
1006 | \ | ||
1007 | if (__a3 == 0) \ | ||
1008 | return (type) __v0; \ | ||
1009 | errno = __v0; \ | ||
1010 | return (type) -1; \ | ||
1011 | } | ||
1012 | |||
1013 | #define _syscall3(type,name,atype,a,btype,b,ctype,c) \ | ||
1014 | type name(atype a, btype b, ctype c) \ | ||
1015 | { \ | ||
1016 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
1017 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
1018 | register unsigned long __a2 asm("$6") = (unsigned long) c; \ | ||
1019 | register unsigned long __a3 asm("$7"); \ | ||
1020 | unsigned long __v0; \ | ||
1021 | \ | ||
1022 | __asm__ volatile ( \ | ||
1023 | ".set\tnoreorder\n\t" \ | ||
1024 | "li\t$2, %5\t\t\t# " #name "\n\t" \ | ||
1025 | "syscall\n\t" \ | ||
1026 | "move\t%0, $2\n\t" \ | ||
1027 | ".set\treorder" \ | ||
1028 | : "=&r" (__v0), "=r" (__a3) \ | ||
1029 | : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ | ||
1030 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1031 | "memory"); \ | ||
1032 | \ | ||
1033 | if (__a3 == 0) \ | ||
1034 | return (type) __v0; \ | ||
1035 | errno = __v0; \ | ||
1036 | return (type) -1; \ | ||
1037 | } | ||
1038 | |||
1039 | #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ | ||
1040 | type name(atype a, btype b, ctype c, dtype d) \ | ||
1041 | { \ | ||
1042 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
1043 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
1044 | register unsigned long __a2 asm("$6") = (unsigned long) c; \ | ||
1045 | register unsigned long __a3 asm("$7") = (unsigned long) d; \ | ||
1046 | unsigned long __v0; \ | ||
1047 | \ | ||
1048 | __asm__ volatile ( \ | ||
1049 | ".set\tnoreorder\n\t" \ | ||
1050 | "li\t$2, %5\t\t\t# " #name "\n\t" \ | ||
1051 | "syscall\n\t" \ | ||
1052 | "move\t%0, $2\n\t" \ | ||
1053 | ".set\treorder" \ | ||
1054 | : "=&r" (__v0), "+r" (__a3) \ | ||
1055 | : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \ | ||
1056 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1057 | "memory"); \ | ||
1058 | \ | ||
1059 | if (__a3 == 0) \ | ||
1060 | return (type) __v0; \ | ||
1061 | errno = __v0; \ | ||
1062 | return (type) -1; \ | ||
1063 | } | ||
1064 | |||
1065 | #if (_MIPS_SIM == _MIPS_SIM_ABI32) | ||
1066 | |||
1067 | /* | ||
1068 | * Using those means your brain needs more than an oil change ;-) | ||
1069 | */ | ||
1070 | |||
1071 | #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ | ||
1072 | type name(atype a, btype b, ctype c, dtype d, etype e) \ | ||
1073 | { \ | ||
1074 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
1075 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
1076 | register unsigned long __a2 asm("$6") = (unsigned long) c; \ | ||
1077 | register unsigned long __a3 asm("$7") = (unsigned long) d; \ | ||
1078 | unsigned long __v0; \ | ||
1079 | \ | ||
1080 | __asm__ volatile ( \ | ||
1081 | ".set\tnoreorder\n\t" \ | ||
1082 | "lw\t$2, %6\n\t" \ | ||
1083 | "subu\t$29, 32\n\t" \ | ||
1084 | "sw\t$2, 16($29)\n\t" \ | ||
1085 | "li\t$2, %5\t\t\t# " #name "\n\t" \ | ||
1086 | "syscall\n\t" \ | ||
1087 | "move\t%0, $2\n\t" \ | ||
1088 | "addiu\t$29, 32\n\t" \ | ||
1089 | ".set\treorder" \ | ||
1090 | : "=&r" (__v0), "+r" (__a3) \ | ||
1091 | : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ | ||
1092 | "m" ((unsigned long)e) \ | ||
1093 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1094 | "memory"); \ | ||
1095 | \ | ||
1096 | if (__a3 == 0) \ | ||
1097 | return (type) __v0; \ | ||
1098 | errno = __v0; \ | ||
1099 | return (type) -1; \ | ||
1100 | } | ||
1101 | |||
1102 | #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \ | ||
1103 | type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \ | ||
1104 | { \ | ||
1105 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
1106 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
1107 | register unsigned long __a2 asm("$6") = (unsigned long) c; \ | ||
1108 | register unsigned long __a3 asm("$7") = (unsigned long) d; \ | ||
1109 | unsigned long __v0; \ | ||
1110 | \ | ||
1111 | __asm__ volatile ( \ | ||
1112 | ".set\tnoreorder\n\t" \ | ||
1113 | "lw\t$2, %6\n\t" \ | ||
1114 | "lw\t$8, %7\n\t" \ | ||
1115 | "subu\t$29, 32\n\t" \ | ||
1116 | "sw\t$2, 16($29)\n\t" \ | ||
1117 | "sw\t$8, 20($29)\n\t" \ | ||
1118 | "li\t$2, %5\t\t\t# " #name "\n\t" \ | ||
1119 | "syscall\n\t" \ | ||
1120 | "move\t%0, $2\n\t" \ | ||
1121 | "addiu\t$29, 32\n\t" \ | ||
1122 | ".set\treorder" \ | ||
1123 | : "=&r" (__v0), "+r" (__a3) \ | ||
1124 | : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \ | ||
1125 | "m" ((unsigned long)e), "m" ((unsigned long)f) \ | ||
1126 | : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1127 | "memory"); \ | ||
1128 | \ | ||
1129 | if (__a3 == 0) \ | ||
1130 | return (type) __v0; \ | ||
1131 | errno = __v0; \ | ||
1132 | return (type) -1; \ | ||
1133 | } | ||
1134 | |||
1135 | #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ | ||
1136 | |||
1137 | #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) | ||
1138 | |||
1139 | #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ | ||
1140 | type name (atype a,btype b,ctype c,dtype d,etype e) \ | ||
1141 | { \ | ||
1142 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
1143 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
1144 | register unsigned long __a2 asm("$6") = (unsigned long) c; \ | ||
1145 | register unsigned long __a3 asm("$7") = (unsigned long) d; \ | ||
1146 | register unsigned long __a4 asm("$8") = (unsigned long) e; \ | ||
1147 | unsigned long __v0; \ | ||
1148 | \ | ||
1149 | __asm__ volatile ( \ | ||
1150 | ".set\tnoreorder\n\t" \ | ||
1151 | "li\t$2, %6\t\t\t# " #name "\n\t" \ | ||
1152 | "syscall\n\t" \ | ||
1153 | "move\t%0, $2\n\t" \ | ||
1154 | ".set\treorder" \ | ||
1155 | : "=&r" (__v0), "+r" (__a3) \ | ||
1156 | : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##name) \ | ||
1157 | : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1158 | "memory"); \ | ||
1159 | \ | ||
1160 | if (__a3 == 0) \ | ||
1161 | return (type) __v0; \ | ||
1162 | errno = __v0; \ | ||
1163 | return (type) -1; \ | ||
1164 | } | ||
1165 | |||
1166 | #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \ | ||
1167 | type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \ | ||
1168 | { \ | ||
1169 | register unsigned long __a0 asm("$4") = (unsigned long) a; \ | ||
1170 | register unsigned long __a1 asm("$5") = (unsigned long) b; \ | ||
1171 | register unsigned long __a2 asm("$6") = (unsigned long) c; \ | ||
1172 | register unsigned long __a3 asm("$7") = (unsigned long) d; \ | ||
1173 | register unsigned long __a4 asm("$8") = (unsigned long) e; \ | ||
1174 | register unsigned long __a5 asm("$9") = (unsigned long) f; \ | ||
1175 | unsigned long __v0; \ | ||
1176 | \ | ||
1177 | __asm__ volatile ( \ | ||
1178 | ".set\tnoreorder\n\t" \ | ||
1179 | "li\t$2, %7\t\t\t# " #name "\n\t" \ | ||
1180 | "syscall\n\t" \ | ||
1181 | "move\t%0, $2\n\t" \ | ||
1182 | ".set\treorder" \ | ||
1183 | : "=&r" (__v0), "+r" (__a3) \ | ||
1184 | : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \ | ||
1185 | "i" (__NR_##name) \ | ||
1186 | : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ | ||
1187 | "memory"); \ | ||
1188 | \ | ||
1189 | if (__a3 == 0) \ | ||
1190 | return (type) __v0; \ | ||
1191 | errno = __v0; \ | ||
1192 | return (type) -1; \ | ||
1193 | } | ||
1194 | |||
1195 | #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ | ||
1196 | |||
1197 | |||
1198 | #define __ARCH_OMIT_COMPAT_SYS_GETDENTS64 | 936 | #define __ARCH_OMIT_COMPAT_SYS_GETDENTS64 |
1199 | #define __ARCH_WANT_IPC_PARSE_VERSION | 937 | #define __ARCH_WANT_IPC_PARSE_VERSION |
1200 | #define __ARCH_WANT_OLD_READDIR | 938 | #define __ARCH_WANT_OLD_READDIR |