diff options
author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2006-10-13 11:25:04 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:43 -0500 |
commit | 56ae58333031bb0564c141f955d1e42276cade55 (patch) | |
tree | de1e272dbebb07f268b6d9bc1fd553279f517ac8 /include/asm-mips/gt64120.h | |
parent | 4e3884fc83f40b5daabceeee3a428a8ebebbbe4a (diff) |
[MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITE
This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE.
This patch tested on Cobalt Qube2.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/gt64120.h')
-rw-r--r-- | include/asm-mips/gt64120.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-mips/gt64120.h b/include/asm-mips/gt64120.h index 2edd171bb6c..4bf8e28f885 100644 --- a/include/asm-mips/gt64120.h +++ b/include/asm-mips/gt64120.h | |||
@@ -451,6 +451,13 @@ | |||
451 | #define GT_SDRAM_OPMODE_OP_MODE 3 | 451 | #define GT_SDRAM_OPMODE_OP_MODE 3 |
452 | #define GT_SDRAM_OPMODE_OP_CBR 4 | 452 | #define GT_SDRAM_OPMODE_OP_CBR 4 |
453 | 453 | ||
454 | #define GT_TC_CONTROL_ENTC0_SHF 0 | ||
455 | #define GT_TC_CONTROL_ENTC0_MSK (MSK(1) << GT_TC_CONTROL_ENTC0_SHF) | ||
456 | #define GT_TC_CONTROL_ENTC0_BIT GT_TC_CONTROL_ENTC0_MSK | ||
457 | #define GT_TC_CONTROL_SELTC0_SHF 1 | ||
458 | #define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF) | ||
459 | #define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK | ||
460 | |||
454 | 461 | ||
455 | #define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0 | 462 | #define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0 |
456 | #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) | 463 | #define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) |
@@ -523,6 +530,13 @@ | |||
523 | #define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF) | 530 | #define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF) |
524 | #define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK | 531 | #define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK |
525 | 532 | ||
533 | #define GT_INTR_T0EXP_SHF 8 | ||
534 | #define GT_INTR_T0EXP_MSK (MSK(1) << GT_INTR_T0EXP_SHF) | ||
535 | #define GT_INTR_T0EXP_BIT GT_INTR_T0EXP_MSK | ||
536 | #define GT_INTR_RETRYCTR0_SHF 20 | ||
537 | #define GT_INTR_RETRYCTR0_MSK (MSK(1) << GT_INTR_RETRYCTR0_SHF) | ||
538 | #define GT_INTR_RETRYCTR0_BIT GT_INTR_RETRYCTR0_MSK | ||
539 | |||
526 | /* | 540 | /* |
527 | * Misc | 541 | * Misc |
528 | */ | 542 | */ |