diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-ia64/sn/sn_sal.h |
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-ia64/sn/sn_sal.h')
-rw-r--r-- | include/asm-ia64/sn/sn_sal.h | 1015 |
1 files changed, 1015 insertions, 0 deletions
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h new file mode 100644 index 00000000000..88c31b53dc0 --- /dev/null +++ b/include/asm-ia64/sn/sn_sal.h | |||
@@ -0,0 +1,1015 @@ | |||
1 | #ifndef _ASM_IA64_SN_SN_SAL_H | ||
2 | #define _ASM_IA64_SN_SN_SAL_H | ||
3 | |||
4 | /* | ||
5 | * System Abstraction Layer definitions for IA64 | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | * | ||
11 | * Copyright (c) 2000-2004 Silicon Graphics, Inc. All rights reserved. | ||
12 | */ | ||
13 | |||
14 | |||
15 | #include <linux/config.h> | ||
16 | #include <asm/sal.h> | ||
17 | #include <asm/sn/sn_cpuid.h> | ||
18 | #include <asm/sn/arch.h> | ||
19 | #include <asm/sn/geo.h> | ||
20 | #include <asm/sn/nodepda.h> | ||
21 | #include <asm/sn/shub_mmr.h> | ||
22 | |||
23 | // SGI Specific Calls | ||
24 | #define SN_SAL_POD_MODE 0x02000001 | ||
25 | #define SN_SAL_SYSTEM_RESET 0x02000002 | ||
26 | #define SN_SAL_PROBE 0x02000003 | ||
27 | #define SN_SAL_GET_MASTER_NASID 0x02000004 | ||
28 | #define SN_SAL_GET_KLCONFIG_ADDR 0x02000005 | ||
29 | #define SN_SAL_LOG_CE 0x02000006 | ||
30 | #define SN_SAL_REGISTER_CE 0x02000007 | ||
31 | #define SN_SAL_GET_PARTITION_ADDR 0x02000009 | ||
32 | #define SN_SAL_XP_ADDR_REGION 0x0200000f | ||
33 | #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010 | ||
34 | #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011 | ||
35 | #define SN_SAL_PRINT_ERROR 0x02000012 | ||
36 | #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant | ||
37 | #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant | ||
38 | #define SN_SAL_GET_SN_INFO 0x0200001c | ||
39 | #define SN_SAL_GET_SAPIC_INFO 0x0200001d | ||
40 | #define SN_SAL_CONSOLE_PUTC 0x02000021 | ||
41 | #define SN_SAL_CONSOLE_GETC 0x02000022 | ||
42 | #define SN_SAL_CONSOLE_PUTS 0x02000023 | ||
43 | #define SN_SAL_CONSOLE_GETS 0x02000024 | ||
44 | #define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025 | ||
45 | #define SN_SAL_CONSOLE_POLL 0x02000026 | ||
46 | #define SN_SAL_CONSOLE_INTR 0x02000027 | ||
47 | #define SN_SAL_CONSOLE_PUTB 0x02000028 | ||
48 | #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a | ||
49 | #define SN_SAL_CONSOLE_READC 0x0200002b | ||
50 | #define SN_SAL_SYSCTL_MODID_GET 0x02000031 | ||
51 | #define SN_SAL_SYSCTL_GET 0x02000032 | ||
52 | #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 | ||
53 | #define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035 | ||
54 | #define SN_SAL_SYSCTL_SLAB_GET 0x02000036 | ||
55 | #define SN_SAL_BUS_CONFIG 0x02000037 | ||
56 | #define SN_SAL_SYS_SERIAL_GET 0x02000038 | ||
57 | #define SN_SAL_PARTITION_SERIAL_GET 0x02000039 | ||
58 | #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a | ||
59 | #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b | ||
60 | #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c | ||
61 | #define SN_SAL_COHERENCE 0x0200003d | ||
62 | #define SN_SAL_MEMPROTECT 0x0200003e | ||
63 | #define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f | ||
64 | |||
65 | #define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant | ||
66 | #define SN_SAL_IROUTER_OP 0x02000043 | ||
67 | #define SN_SAL_IOIF_INTERRUPT 0x0200004a | ||
68 | #define SN_SAL_HWPERF_OP 0x02000050 // lock | ||
69 | #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051 | ||
70 | |||
71 | #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053 | ||
72 | #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054 | ||
73 | #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055 | ||
74 | #define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056 | ||
75 | #define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057 | ||
76 | #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 | ||
77 | |||
78 | #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 | ||
79 | |||
80 | |||
81 | /* | ||
82 | * Service-specific constants | ||
83 | */ | ||
84 | |||
85 | /* Console interrupt manipulation */ | ||
86 | /* action codes */ | ||
87 | #define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */ | ||
88 | #define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */ | ||
89 | #define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */ | ||
90 | /* interrupt specification & status return codes */ | ||
91 | #define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */ | ||
92 | #define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */ | ||
93 | |||
94 | /* interrupt handling */ | ||
95 | #define SAL_INTR_ALLOC 1 | ||
96 | #define SAL_INTR_FREE 2 | ||
97 | |||
98 | /* | ||
99 | * IRouter (i.e. generalized system controller) operations | ||
100 | */ | ||
101 | #define SAL_IROUTER_OPEN 0 /* open a subchannel */ | ||
102 | #define SAL_IROUTER_CLOSE 1 /* close a subchannel */ | ||
103 | #define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */ | ||
104 | #define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */ | ||
105 | #define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for | ||
106 | * an open subchannel | ||
107 | */ | ||
108 | #define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */ | ||
109 | #define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */ | ||
110 | #define SAL_IROUTER_INIT 7 /* initialize IRouter driver */ | ||
111 | |||
112 | /* IRouter interrupt mask bits */ | ||
113 | #define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT | ||
114 | #define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV | ||
115 | |||
116 | |||
117 | /* | ||
118 | * SAL Error Codes | ||
119 | */ | ||
120 | #define SALRET_MORE_PASSES 1 | ||
121 | #define SALRET_OK 0 | ||
122 | #define SALRET_NOT_IMPLEMENTED (-1) | ||
123 | #define SALRET_INVALID_ARG (-2) | ||
124 | #define SALRET_ERROR (-3) | ||
125 | |||
126 | |||
127 | /** | ||
128 | * sn_sal_rev_major - get the major SGI SAL revision number | ||
129 | * | ||
130 | * The SGI PROM stores its version in sal_[ab]_rev_(major|minor). | ||
131 | * This routine simply extracts the major value from the | ||
132 | * @ia64_sal_systab structure constructed by ia64_sal_init(). | ||
133 | */ | ||
134 | static inline int | ||
135 | sn_sal_rev_major(void) | ||
136 | { | ||
137 | struct ia64_sal_systab *systab = efi.sal_systab; | ||
138 | |||
139 | return (int)systab->sal_b_rev_major; | ||
140 | } | ||
141 | |||
142 | /** | ||
143 | * sn_sal_rev_minor - get the minor SGI SAL revision number | ||
144 | * | ||
145 | * The SGI PROM stores its version in sal_[ab]_rev_(major|minor). | ||
146 | * This routine simply extracts the minor value from the | ||
147 | * @ia64_sal_systab structure constructed by ia64_sal_init(). | ||
148 | */ | ||
149 | static inline int | ||
150 | sn_sal_rev_minor(void) | ||
151 | { | ||
152 | struct ia64_sal_systab *systab = efi.sal_systab; | ||
153 | |||
154 | return (int)systab->sal_b_rev_minor; | ||
155 | } | ||
156 | |||
157 | /* | ||
158 | * Specify the minimum PROM revsion required for this kernel. | ||
159 | * Note that they're stored in hex format... | ||
160 | */ | ||
161 | #define SN_SAL_MIN_MAJOR 0x4 /* SN2 kernels need at least PROM 4.0 */ | ||
162 | #define SN_SAL_MIN_MINOR 0x0 | ||
163 | |||
164 | /* | ||
165 | * Returns the master console nasid, if the call fails, return an illegal | ||
166 | * value. | ||
167 | */ | ||
168 | static inline u64 | ||
169 | ia64_sn_get_console_nasid(void) | ||
170 | { | ||
171 | struct ia64_sal_retval ret_stuff; | ||
172 | |||
173 | ret_stuff.status = 0; | ||
174 | ret_stuff.v0 = 0; | ||
175 | ret_stuff.v1 = 0; | ||
176 | ret_stuff.v2 = 0; | ||
177 | SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0); | ||
178 | |||
179 | if (ret_stuff.status < 0) | ||
180 | return ret_stuff.status; | ||
181 | |||
182 | /* Master console nasid is in 'v0' */ | ||
183 | return ret_stuff.v0; | ||
184 | } | ||
185 | |||
186 | /* | ||
187 | * Returns the master baseio nasid, if the call fails, return an illegal | ||
188 | * value. | ||
189 | */ | ||
190 | static inline u64 | ||
191 | ia64_sn_get_master_baseio_nasid(void) | ||
192 | { | ||
193 | struct ia64_sal_retval ret_stuff; | ||
194 | |||
195 | ret_stuff.status = 0; | ||
196 | ret_stuff.v0 = 0; | ||
197 | ret_stuff.v1 = 0; | ||
198 | ret_stuff.v2 = 0; | ||
199 | SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0); | ||
200 | |||
201 | if (ret_stuff.status < 0) | ||
202 | return ret_stuff.status; | ||
203 | |||
204 | /* Master baseio nasid is in 'v0' */ | ||
205 | return ret_stuff.v0; | ||
206 | } | ||
207 | |||
208 | static inline char * | ||
209 | ia64_sn_get_klconfig_addr(nasid_t nasid) | ||
210 | { | ||
211 | struct ia64_sal_retval ret_stuff; | ||
212 | int cnodeid; | ||
213 | |||
214 | cnodeid = nasid_to_cnodeid(nasid); | ||
215 | ret_stuff.status = 0; | ||
216 | ret_stuff.v0 = 0; | ||
217 | ret_stuff.v1 = 0; | ||
218 | ret_stuff.v2 = 0; | ||
219 | SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0); | ||
220 | |||
221 | /* | ||
222 | * We should panic if a valid cnode nasid does not produce | ||
223 | * a klconfig address. | ||
224 | */ | ||
225 | if (ret_stuff.status != 0) { | ||
226 | panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status); | ||
227 | } | ||
228 | return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL; | ||
229 | } | ||
230 | |||
231 | /* | ||
232 | * Returns the next console character. | ||
233 | */ | ||
234 | static inline u64 | ||
235 | ia64_sn_console_getc(int *ch) | ||
236 | { | ||
237 | struct ia64_sal_retval ret_stuff; | ||
238 | |||
239 | ret_stuff.status = 0; | ||
240 | ret_stuff.v0 = 0; | ||
241 | ret_stuff.v1 = 0; | ||
242 | ret_stuff.v2 = 0; | ||
243 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0); | ||
244 | |||
245 | /* character is in 'v0' */ | ||
246 | *ch = (int)ret_stuff.v0; | ||
247 | |||
248 | return ret_stuff.status; | ||
249 | } | ||
250 | |||
251 | /* | ||
252 | * Read a character from the SAL console device, after a previous interrupt | ||
253 | * or poll operation has given us to know that a character is available | ||
254 | * to be read. | ||
255 | */ | ||
256 | static inline u64 | ||
257 | ia64_sn_console_readc(void) | ||
258 | { | ||
259 | struct ia64_sal_retval ret_stuff; | ||
260 | |||
261 | ret_stuff.status = 0; | ||
262 | ret_stuff.v0 = 0; | ||
263 | ret_stuff.v1 = 0; | ||
264 | ret_stuff.v2 = 0; | ||
265 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0); | ||
266 | |||
267 | /* character is in 'v0' */ | ||
268 | return ret_stuff.v0; | ||
269 | } | ||
270 | |||
271 | /* | ||
272 | * Sends the given character to the console. | ||
273 | */ | ||
274 | static inline u64 | ||
275 | ia64_sn_console_putc(char ch) | ||
276 | { | ||
277 | struct ia64_sal_retval ret_stuff; | ||
278 | |||
279 | ret_stuff.status = 0; | ||
280 | ret_stuff.v0 = 0; | ||
281 | ret_stuff.v1 = 0; | ||
282 | ret_stuff.v2 = 0; | ||
283 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (uint64_t)ch, 0, 0, 0, 0, 0, 0); | ||
284 | |||
285 | return ret_stuff.status; | ||
286 | } | ||
287 | |||
288 | /* | ||
289 | * Sends the given buffer to the console. | ||
290 | */ | ||
291 | static inline u64 | ||
292 | ia64_sn_console_putb(const char *buf, int len) | ||
293 | { | ||
294 | struct ia64_sal_retval ret_stuff; | ||
295 | |||
296 | ret_stuff.status = 0; | ||
297 | ret_stuff.v0 = 0; | ||
298 | ret_stuff.v1 = 0; | ||
299 | ret_stuff.v2 = 0; | ||
300 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (uint64_t)buf, (uint64_t)len, 0, 0, 0, 0, 0); | ||
301 | |||
302 | if ( ret_stuff.status == 0 ) { | ||
303 | return ret_stuff.v0; | ||
304 | } | ||
305 | return (u64)0; | ||
306 | } | ||
307 | |||
308 | /* | ||
309 | * Print a platform error record | ||
310 | */ | ||
311 | static inline u64 | ||
312 | ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec) | ||
313 | { | ||
314 | struct ia64_sal_retval ret_stuff; | ||
315 | |||
316 | ret_stuff.status = 0; | ||
317 | ret_stuff.v0 = 0; | ||
318 | ret_stuff.v1 = 0; | ||
319 | ret_stuff.v2 = 0; | ||
320 | SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (uint64_t)hook, (uint64_t)rec, 0, 0, 0, 0, 0); | ||
321 | |||
322 | return ret_stuff.status; | ||
323 | } | ||
324 | |||
325 | /* | ||
326 | * Check for Platform errors | ||
327 | */ | ||
328 | static inline u64 | ||
329 | ia64_sn_plat_cpei_handler(void) | ||
330 | { | ||
331 | struct ia64_sal_retval ret_stuff; | ||
332 | |||
333 | ret_stuff.status = 0; | ||
334 | ret_stuff.v0 = 0; | ||
335 | ret_stuff.v1 = 0; | ||
336 | ret_stuff.v2 = 0; | ||
337 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0); | ||
338 | |||
339 | return ret_stuff.status; | ||
340 | } | ||
341 | |||
342 | /* | ||
343 | * Checks for console input. | ||
344 | */ | ||
345 | static inline u64 | ||
346 | ia64_sn_console_check(int *result) | ||
347 | { | ||
348 | struct ia64_sal_retval ret_stuff; | ||
349 | |||
350 | ret_stuff.status = 0; | ||
351 | ret_stuff.v0 = 0; | ||
352 | ret_stuff.v1 = 0; | ||
353 | ret_stuff.v2 = 0; | ||
354 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0); | ||
355 | |||
356 | /* result is in 'v0' */ | ||
357 | *result = (int)ret_stuff.v0; | ||
358 | |||
359 | return ret_stuff.status; | ||
360 | } | ||
361 | |||
362 | /* | ||
363 | * Checks console interrupt status | ||
364 | */ | ||
365 | static inline u64 | ||
366 | ia64_sn_console_intr_status(void) | ||
367 | { | ||
368 | struct ia64_sal_retval ret_stuff; | ||
369 | |||
370 | ret_stuff.status = 0; | ||
371 | ret_stuff.v0 = 0; | ||
372 | ret_stuff.v1 = 0; | ||
373 | ret_stuff.v2 = 0; | ||
374 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, | ||
375 | 0, SAL_CONSOLE_INTR_STATUS, | ||
376 | 0, 0, 0, 0, 0); | ||
377 | |||
378 | if (ret_stuff.status == 0) { | ||
379 | return ret_stuff.v0; | ||
380 | } | ||
381 | |||
382 | return 0; | ||
383 | } | ||
384 | |||
385 | /* | ||
386 | * Enable an interrupt on the SAL console device. | ||
387 | */ | ||
388 | static inline void | ||
389 | ia64_sn_console_intr_enable(uint64_t intr) | ||
390 | { | ||
391 | struct ia64_sal_retval ret_stuff; | ||
392 | |||
393 | ret_stuff.status = 0; | ||
394 | ret_stuff.v0 = 0; | ||
395 | ret_stuff.v1 = 0; | ||
396 | ret_stuff.v2 = 0; | ||
397 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, | ||
398 | intr, SAL_CONSOLE_INTR_ON, | ||
399 | 0, 0, 0, 0, 0); | ||
400 | } | ||
401 | |||
402 | /* | ||
403 | * Disable an interrupt on the SAL console device. | ||
404 | */ | ||
405 | static inline void | ||
406 | ia64_sn_console_intr_disable(uint64_t intr) | ||
407 | { | ||
408 | struct ia64_sal_retval ret_stuff; | ||
409 | |||
410 | ret_stuff.status = 0; | ||
411 | ret_stuff.v0 = 0; | ||
412 | ret_stuff.v1 = 0; | ||
413 | ret_stuff.v2 = 0; | ||
414 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, | ||
415 | intr, SAL_CONSOLE_INTR_OFF, | ||
416 | 0, 0, 0, 0, 0); | ||
417 | } | ||
418 | |||
419 | /* | ||
420 | * Sends a character buffer to the console asynchronously. | ||
421 | */ | ||
422 | static inline u64 | ||
423 | ia64_sn_console_xmit_chars(char *buf, int len) | ||
424 | { | ||
425 | struct ia64_sal_retval ret_stuff; | ||
426 | |||
427 | ret_stuff.status = 0; | ||
428 | ret_stuff.v0 = 0; | ||
429 | ret_stuff.v1 = 0; | ||
430 | ret_stuff.v2 = 0; | ||
431 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, | ||
432 | (uint64_t)buf, (uint64_t)len, | ||
433 | 0, 0, 0, 0, 0); | ||
434 | |||
435 | if (ret_stuff.status == 0) { | ||
436 | return ret_stuff.v0; | ||
437 | } | ||
438 | |||
439 | return 0; | ||
440 | } | ||
441 | |||
442 | /* | ||
443 | * Returns the iobrick module Id | ||
444 | */ | ||
445 | static inline u64 | ||
446 | ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result) | ||
447 | { | ||
448 | struct ia64_sal_retval ret_stuff; | ||
449 | |||
450 | ret_stuff.status = 0; | ||
451 | ret_stuff.v0 = 0; | ||
452 | ret_stuff.v1 = 0; | ||
453 | ret_stuff.v2 = 0; | ||
454 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0); | ||
455 | |||
456 | /* result is in 'v0' */ | ||
457 | *result = (int)ret_stuff.v0; | ||
458 | |||
459 | return ret_stuff.status; | ||
460 | } | ||
461 | |||
462 | /** | ||
463 | * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function | ||
464 | * | ||
465 | * SN_SAL_POD_MODE actually takes an argument, but it's always | ||
466 | * 0 when we call it from the kernel, so we don't have to expose | ||
467 | * it to the caller. | ||
468 | */ | ||
469 | static inline u64 | ||
470 | ia64_sn_pod_mode(void) | ||
471 | { | ||
472 | struct ia64_sal_retval isrv; | ||
473 | SAL_CALL(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0); | ||
474 | if (isrv.status) | ||
475 | return 0; | ||
476 | return isrv.v0; | ||
477 | } | ||
478 | |||
479 | /** | ||
480 | * ia64_sn_probe_mem - read from memory safely | ||
481 | * @addr: address to probe | ||
482 | * @size: number bytes to read (1,2,4,8) | ||
483 | * @data_ptr: address to store value read by probe (-1 returned if probe fails) | ||
484 | * | ||
485 | * Call into the SAL to do a memory read. If the read generates a machine | ||
486 | * check, this routine will recover gracefully and return -1 to the caller. | ||
487 | * @addr is usually a kernel virtual address in uncached space (i.e. the | ||
488 | * address starts with 0xc), but if called in physical mode, @addr should | ||
489 | * be a physical address. | ||
490 | * | ||
491 | * Return values: | ||
492 | * 0 - probe successful | ||
493 | * 1 - probe failed (generated MCA) | ||
494 | * 2 - Bad arg | ||
495 | * <0 - PAL error | ||
496 | */ | ||
497 | static inline u64 | ||
498 | ia64_sn_probe_mem(long addr, long size, void *data_ptr) | ||
499 | { | ||
500 | struct ia64_sal_retval isrv; | ||
501 | |||
502 | SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0); | ||
503 | |||
504 | if (data_ptr) { | ||
505 | switch (size) { | ||
506 | case 1: | ||
507 | *((u8*)data_ptr) = (u8)isrv.v0; | ||
508 | break; | ||
509 | case 2: | ||
510 | *((u16*)data_ptr) = (u16)isrv.v0; | ||
511 | break; | ||
512 | case 4: | ||
513 | *((u32*)data_ptr) = (u32)isrv.v0; | ||
514 | break; | ||
515 | case 8: | ||
516 | *((u64*)data_ptr) = (u64)isrv.v0; | ||
517 | break; | ||
518 | default: | ||
519 | isrv.status = 2; | ||
520 | } | ||
521 | } | ||
522 | return isrv.status; | ||
523 | } | ||
524 | |||
525 | /* | ||
526 | * Retrieve the system serial number as an ASCII string. | ||
527 | */ | ||
528 | static inline u64 | ||
529 | ia64_sn_sys_serial_get(char *buf) | ||
530 | { | ||
531 | struct ia64_sal_retval ret_stuff; | ||
532 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0); | ||
533 | return ret_stuff.status; | ||
534 | } | ||
535 | |||
536 | extern char sn_system_serial_number_string[]; | ||
537 | extern u64 sn_partition_serial_number; | ||
538 | |||
539 | static inline char * | ||
540 | sn_system_serial_number(void) { | ||
541 | if (sn_system_serial_number_string[0]) { | ||
542 | return(sn_system_serial_number_string); | ||
543 | } else { | ||
544 | ia64_sn_sys_serial_get(sn_system_serial_number_string); | ||
545 | return(sn_system_serial_number_string); | ||
546 | } | ||
547 | } | ||
548 | |||
549 | |||
550 | /* | ||
551 | * Returns a unique id number for this system and partition (suitable for | ||
552 | * use with license managers), based in part on the system serial number. | ||
553 | */ | ||
554 | static inline u64 | ||
555 | ia64_sn_partition_serial_get(void) | ||
556 | { | ||
557 | struct ia64_sal_retval ret_stuff; | ||
558 | SAL_CALL(ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0, 0, 0, 0, 0, 0, 0); | ||
559 | if (ret_stuff.status != 0) | ||
560 | return 0; | ||
561 | return ret_stuff.v0; | ||
562 | } | ||
563 | |||
564 | static inline u64 | ||
565 | sn_partition_serial_number_val(void) { | ||
566 | if (sn_partition_serial_number) { | ||
567 | return(sn_partition_serial_number); | ||
568 | } else { | ||
569 | return(sn_partition_serial_number = ia64_sn_partition_serial_get()); | ||
570 | } | ||
571 | } | ||
572 | |||
573 | /* | ||
574 | * Returns the partition id of the nasid passed in as an argument, | ||
575 | * or INVALID_PARTID if the partition id cannot be retrieved. | ||
576 | */ | ||
577 | static inline partid_t | ||
578 | ia64_sn_sysctl_partition_get(nasid_t nasid) | ||
579 | { | ||
580 | struct ia64_sal_retval ret_stuff; | ||
581 | SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid, | ||
582 | 0, 0, 0, 0, 0, 0); | ||
583 | if (ret_stuff.status != 0) | ||
584 | return INVALID_PARTID; | ||
585 | return ((partid_t)ret_stuff.v0); | ||
586 | } | ||
587 | |||
588 | /* | ||
589 | * Returns the partition id of the current processor. | ||
590 | */ | ||
591 | |||
592 | extern partid_t sn_partid; | ||
593 | |||
594 | static inline partid_t | ||
595 | sn_local_partid(void) { | ||
596 | if (sn_partid < 0) { | ||
597 | return (sn_partid = ia64_sn_sysctl_partition_get(cpuid_to_nasid(smp_processor_id()))); | ||
598 | } else { | ||
599 | return sn_partid; | ||
600 | } | ||
601 | } | ||
602 | |||
603 | /* | ||
604 | * Register or unregister a physical address range being referenced across | ||
605 | * a partition boundary for which certain SAL errors should be scanned for, | ||
606 | * cleaned up and ignored. This is of value for kernel partitioning code only. | ||
607 | * Values for the operation argument: | ||
608 | * 1 = register this address range with SAL | ||
609 | * 0 = unregister this address range with SAL | ||
610 | * | ||
611 | * SAL maintains a reference count on an address range in case it is registered | ||
612 | * multiple times. | ||
613 | * | ||
614 | * On success, returns the reference count of the address range after the SAL | ||
615 | * call has performed the current registration/unregistration. Returns a | ||
616 | * negative value if an error occurred. | ||
617 | */ | ||
618 | static inline int | ||
619 | sn_register_xp_addr_region(u64 paddr, u64 len, int operation) | ||
620 | { | ||
621 | struct ia64_sal_retval ret_stuff; | ||
622 | SAL_CALL(ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len, (u64)operation, | ||
623 | 0, 0, 0, 0); | ||
624 | return ret_stuff.status; | ||
625 | } | ||
626 | |||
627 | /* | ||
628 | * Register or unregister an instruction range for which SAL errors should | ||
629 | * be ignored. If an error occurs while in the registered range, SAL jumps | ||
630 | * to return_addr after ignoring the error. Values for the operation argument: | ||
631 | * 1 = register this instruction range with SAL | ||
632 | * 0 = unregister this instruction range with SAL | ||
633 | * | ||
634 | * Returns 0 on success, or a negative value if an error occurred. | ||
635 | */ | ||
636 | static inline int | ||
637 | sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr, | ||
638 | int virtual, int operation) | ||
639 | { | ||
640 | struct ia64_sal_retval ret_stuff; | ||
641 | u64 call; | ||
642 | if (virtual) { | ||
643 | call = SN_SAL_NO_FAULT_ZONE_VIRTUAL; | ||
644 | } else { | ||
645 | call = SN_SAL_NO_FAULT_ZONE_PHYSICAL; | ||
646 | } | ||
647 | SAL_CALL(ret_stuff, call, start_addr, end_addr, return_addr, (u64)1, | ||
648 | 0, 0, 0); | ||
649 | return ret_stuff.status; | ||
650 | } | ||
651 | |||
652 | /* | ||
653 | * Change or query the coherence domain for this partition. Each cpu-based | ||
654 | * nasid is represented by a bit in an array of 64-bit words: | ||
655 | * 0 = not in this partition's coherency domain | ||
656 | * 1 = in this partition's coherency domain | ||
657 | * | ||
658 | * It is not possible for the local system's nasids to be removed from | ||
659 | * the coherency domain. Purpose of the domain arguments: | ||
660 | * new_domain = set the coherence domain to the given nasids | ||
661 | * old_domain = return the current coherence domain | ||
662 | * | ||
663 | * Returns 0 on success, or a negative value if an error occurred. | ||
664 | */ | ||
665 | static inline int | ||
666 | sn_change_coherence(u64 *new_domain, u64 *old_domain) | ||
667 | { | ||
668 | struct ia64_sal_retval ret_stuff; | ||
669 | SAL_CALL(ret_stuff, SN_SAL_COHERENCE, new_domain, old_domain, 0, 0, | ||
670 | 0, 0, 0); | ||
671 | return ret_stuff.status; | ||
672 | } | ||
673 | |||
674 | /* | ||
675 | * Change memory access protections for a physical address range. | ||
676 | * nasid_array is not used on Altix, but may be in future architectures. | ||
677 | * Available memory protection access classes are defined after the function. | ||
678 | */ | ||
679 | static inline int | ||
680 | sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array) | ||
681 | { | ||
682 | struct ia64_sal_retval ret_stuff; | ||
683 | int cnodeid; | ||
684 | unsigned long irq_flags; | ||
685 | |||
686 | cnodeid = nasid_to_cnodeid(get_node_number(paddr)); | ||
687 | // spin_lock(&NODEPDA(cnodeid)->bist_lock); | ||
688 | local_irq_save(irq_flags); | ||
689 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_MEMPROTECT, paddr, len, nasid_array, | ||
690 | perms, 0, 0, 0); | ||
691 | local_irq_restore(irq_flags); | ||
692 | // spin_unlock(&NODEPDA(cnodeid)->bist_lock); | ||
693 | return ret_stuff.status; | ||
694 | } | ||
695 | #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 | ||
696 | #define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2 | ||
697 | #define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca | ||
698 | #define SN_MEMPROT_ACCESS_CLASS_3 0x14a290 | ||
699 | #define SN_MEMPROT_ACCESS_CLASS_6 0x084080 | ||
700 | #define SN_MEMPROT_ACCESS_CLASS_7 0x021080 | ||
701 | |||
702 | /* | ||
703 | * Turns off system power. | ||
704 | */ | ||
705 | static inline void | ||
706 | ia64_sn_power_down(void) | ||
707 | { | ||
708 | struct ia64_sal_retval ret_stuff; | ||
709 | SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); | ||
710 | while(1); | ||
711 | /* never returns */ | ||
712 | } | ||
713 | |||
714 | /** | ||
715 | * ia64_sn_fru_capture - tell the system controller to capture hw state | ||
716 | * | ||
717 | * This routine will call the SAL which will tell the system controller(s) | ||
718 | * to capture hw mmr information from each SHub in the system. | ||
719 | */ | ||
720 | static inline u64 | ||
721 | ia64_sn_fru_capture(void) | ||
722 | { | ||
723 | struct ia64_sal_retval isrv; | ||
724 | SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0); | ||
725 | if (isrv.status) | ||
726 | return 0; | ||
727 | return isrv.v0; | ||
728 | } | ||
729 | |||
730 | /* | ||
731 | * Performs an operation on a PCI bus or slot -- power up, power down | ||
732 | * or reset. | ||
733 | */ | ||
734 | static inline u64 | ||
735 | ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type, | ||
736 | u64 bus, char slot, | ||
737 | u64 action) | ||
738 | { | ||
739 | struct ia64_sal_retval rv = {0, 0, 0, 0}; | ||
740 | |||
741 | SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action, | ||
742 | bus, (u64) slot, 0, 0); | ||
743 | if (rv.status) | ||
744 | return rv.v0; | ||
745 | return 0; | ||
746 | } | ||
747 | |||
748 | |||
749 | /* | ||
750 | * Open a subchannel for sending arbitrary data to the system | ||
751 | * controller network via the system controller device associated with | ||
752 | * 'nasid'. Return the subchannel number or a negative error code. | ||
753 | */ | ||
754 | static inline int | ||
755 | ia64_sn_irtr_open(nasid_t nasid) | ||
756 | { | ||
757 | struct ia64_sal_retval rv; | ||
758 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid, | ||
759 | 0, 0, 0, 0, 0); | ||
760 | return (int) rv.v0; | ||
761 | } | ||
762 | |||
763 | /* | ||
764 | * Close system controller subchannel 'subch' previously opened on 'nasid'. | ||
765 | */ | ||
766 | static inline int | ||
767 | ia64_sn_irtr_close(nasid_t nasid, int subch) | ||
768 | { | ||
769 | struct ia64_sal_retval rv; | ||
770 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE, | ||
771 | (u64) nasid, (u64) subch, 0, 0, 0, 0); | ||
772 | return (int) rv.status; | ||
773 | } | ||
774 | |||
775 | /* | ||
776 | * Read data from system controller associated with 'nasid' on | ||
777 | * subchannel 'subch'. The buffer to be filled is pointed to by | ||
778 | * 'buf', and its capacity is in the integer pointed to by 'len'. The | ||
779 | * referent of 'len' is set to the number of bytes read by the SAL | ||
780 | * call. The return value is either SALRET_OK (for bytes read) or | ||
781 | * SALRET_ERROR (for error or "no data available"). | ||
782 | */ | ||
783 | static inline int | ||
784 | ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len) | ||
785 | { | ||
786 | struct ia64_sal_retval rv; | ||
787 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV, | ||
788 | (u64) nasid, (u64) subch, (u64) buf, (u64) len, | ||
789 | 0, 0); | ||
790 | return (int) rv.status; | ||
791 | } | ||
792 | |||
793 | /* | ||
794 | * Write data to the system controller network via the system | ||
795 | * controller associated with 'nasid' on suchannel 'subch'. The | ||
796 | * buffer to be written out is pointed to by 'buf', and 'len' is the | ||
797 | * number of bytes to be written. The return value is either the | ||
798 | * number of bytes written (which could be zero) or a negative error | ||
799 | * code. | ||
800 | */ | ||
801 | static inline int | ||
802 | ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len) | ||
803 | { | ||
804 | struct ia64_sal_retval rv; | ||
805 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND, | ||
806 | (u64) nasid, (u64) subch, (u64) buf, (u64) len, | ||
807 | 0, 0); | ||
808 | return (int) rv.v0; | ||
809 | } | ||
810 | |||
811 | /* | ||
812 | * Check whether any interrupts are pending for the system controller | ||
813 | * associated with 'nasid' and its subchannel 'subch'. The return | ||
814 | * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or | ||
815 | * SAL_IROUTER_INTR_RECV). | ||
816 | */ | ||
817 | static inline int | ||
818 | ia64_sn_irtr_intr(nasid_t nasid, int subch) | ||
819 | { | ||
820 | struct ia64_sal_retval rv; | ||
821 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS, | ||
822 | (u64) nasid, (u64) subch, 0, 0, 0, 0); | ||
823 | return (int) rv.v0; | ||
824 | } | ||
825 | |||
826 | /* | ||
827 | * Enable the interrupt indicated by the intr parameter (either | ||
828 | * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV). | ||
829 | */ | ||
830 | static inline int | ||
831 | ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr) | ||
832 | { | ||
833 | struct ia64_sal_retval rv; | ||
834 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON, | ||
835 | (u64) nasid, (u64) subch, intr, 0, 0, 0); | ||
836 | return (int) rv.v0; | ||
837 | } | ||
838 | |||
839 | /* | ||
840 | * Disable the interrupt indicated by the intr parameter (either | ||
841 | * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV). | ||
842 | */ | ||
843 | static inline int | ||
844 | ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr) | ||
845 | { | ||
846 | struct ia64_sal_retval rv; | ||
847 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF, | ||
848 | (u64) nasid, (u64) subch, intr, 0, 0, 0); | ||
849 | return (int) rv.v0; | ||
850 | } | ||
851 | |||
852 | /** | ||
853 | * ia64_sn_get_fit_compt - read a FIT entry from the PROM header | ||
854 | * @nasid: NASID of node to read | ||
855 | * @index: FIT entry index to be retrieved (0..n) | ||
856 | * @fitentry: 16 byte buffer where FIT entry will be stored. | ||
857 | * @banbuf: optional buffer for retrieving banner | ||
858 | * @banlen: length of banner buffer | ||
859 | * | ||
860 | * Access to the physical PROM chips needs to be serialized since reads and | ||
861 | * writes can't occur at the same time, so we need to call into the SAL when | ||
862 | * we want to look at the FIT entries on the chips. | ||
863 | * | ||
864 | * Returns: | ||
865 | * %SALRET_OK if ok | ||
866 | * %SALRET_INVALID_ARG if index too big | ||
867 | * %SALRET_NOT_IMPLEMENTED if running on older PROM | ||
868 | * ??? if nasid invalid OR banner buffer not large enough | ||
869 | */ | ||
870 | static inline int | ||
871 | ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf, | ||
872 | u64 banlen) | ||
873 | { | ||
874 | struct ia64_sal_retval rv; | ||
875 | SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry, | ||
876 | banbuf, banlen, 0, 0); | ||
877 | return (int) rv.status; | ||
878 | } | ||
879 | |||
880 | /* | ||
881 | * Initialize the SAL components of the system controller | ||
882 | * communication driver; specifically pass in a sizable buffer that | ||
883 | * can be used for allocation of subchannel queues as new subchannels | ||
884 | * are opened. "buf" points to the buffer, and "len" specifies its | ||
885 | * length. | ||
886 | */ | ||
887 | static inline int | ||
888 | ia64_sn_irtr_init(nasid_t nasid, void *buf, int len) | ||
889 | { | ||
890 | struct ia64_sal_retval rv; | ||
891 | SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT, | ||
892 | (u64) nasid, (u64) buf, (u64) len, 0, 0, 0); | ||
893 | return (int) rv.status; | ||
894 | } | ||
895 | |||
896 | /* | ||
897 | * Returns the nasid, subnode & slice corresponding to a SAPIC ID | ||
898 | * | ||
899 | * In: | ||
900 | * arg0 - SN_SAL_GET_SAPIC_INFO | ||
901 | * arg1 - sapicid (lid >> 16) | ||
902 | * Out: | ||
903 | * v0 - nasid | ||
904 | * v1 - subnode | ||
905 | * v2 - slice | ||
906 | */ | ||
907 | static inline u64 | ||
908 | ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice) | ||
909 | { | ||
910 | struct ia64_sal_retval ret_stuff; | ||
911 | |||
912 | ret_stuff.status = 0; | ||
913 | ret_stuff.v0 = 0; | ||
914 | ret_stuff.v1 = 0; | ||
915 | ret_stuff.v2 = 0; | ||
916 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0); | ||
917 | |||
918 | /***** BEGIN HACK - temp til old proms no longer supported ********/ | ||
919 | if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { | ||
920 | if (nasid) *nasid = sapicid & 0xfff; | ||
921 | if (subnode) *subnode = (sapicid >> 13) & 1; | ||
922 | if (slice) *slice = (sapicid >> 12) & 3; | ||
923 | return 0; | ||
924 | } | ||
925 | /***** END HACK *******/ | ||
926 | |||
927 | if (ret_stuff.status < 0) | ||
928 | return ret_stuff.status; | ||
929 | |||
930 | if (nasid) *nasid = (int) ret_stuff.v0; | ||
931 | if (subnode) *subnode = (int) ret_stuff.v1; | ||
932 | if (slice) *slice = (int) ret_stuff.v2; | ||
933 | return 0; | ||
934 | } | ||
935 | |||
936 | /* | ||
937 | * Returns information about the HUB/SHUB. | ||
938 | * In: | ||
939 | * arg0 - SN_SAL_GET_SN_INFO | ||
940 | * arg1 - 0 (other values reserved for future use) | ||
941 | * Out: | ||
942 | * v0 | ||
943 | * [7:0] - shub type (0=shub1, 1=shub2) | ||
944 | * [15:8] - Log2 max number of nodes in entire system (includes | ||
945 | * C-bricks, I-bricks, etc) | ||
946 | * [23:16] - Log2 of nodes per sharing domain | ||
947 | * [31:24] - partition ID | ||
948 | * [39:32] - coherency_id | ||
949 | * [47:40] - regionsize | ||
950 | * v1 | ||
951 | * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid) | ||
952 | * [23:15] - bit position of low nasid bit | ||
953 | */ | ||
954 | static inline u64 | ||
955 | ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift, | ||
956 | u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg) | ||
957 | { | ||
958 | struct ia64_sal_retval ret_stuff; | ||
959 | |||
960 | ret_stuff.status = 0; | ||
961 | ret_stuff.v0 = 0; | ||
962 | ret_stuff.v1 = 0; | ||
963 | ret_stuff.v2 = 0; | ||
964 | SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); | ||
965 | |||
966 | /***** BEGIN HACK - temp til old proms no longer supported ********/ | ||
967 | if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { | ||
968 | int nasid = get_sapicid() & 0xfff;; | ||
969 | #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL | ||
970 | #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48 | ||
971 | if (shubtype) *shubtype = 0; | ||
972 | if (nasid_bitmask) *nasid_bitmask = 0x7ff; | ||
973 | if (nasid_shift) *nasid_shift = 38; | ||
974 | if (systemsize) *systemsize = 11; | ||
975 | if (sharing_domain_size) *sharing_domain_size = 9; | ||
976 | if (partid) *partid = ia64_sn_sysctl_partition_get(nasid); | ||
977 | if (coher) *coher = nasid >> 9; | ||
978 | if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >> | ||
979 | SH_SHUB_ID_NODES_PER_BIT_SHFT; | ||
980 | return 0; | ||
981 | } | ||
982 | /***** END HACK *******/ | ||
983 | |||
984 | if (ret_stuff.status < 0) | ||
985 | return ret_stuff.status; | ||
986 | |||
987 | if (shubtype) *shubtype = ret_stuff.v0 & 0xff; | ||
988 | if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff; | ||
989 | if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff; | ||
990 | if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff; | ||
991 | if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff; | ||
992 | if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff; | ||
993 | if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff); | ||
994 | if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff; | ||
995 | return 0; | ||
996 | } | ||
997 | |||
998 | /* | ||
999 | * This is the access point to the Altix PROM hardware performance | ||
1000 | * and status monitoring interface. For info on using this, see | ||
1001 | * include/asm-ia64/sn/sn2/sn_hwperf.h | ||
1002 | */ | ||
1003 | static inline int | ||
1004 | ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2, | ||
1005 | u64 a3, u64 a4, int *v0) | ||
1006 | { | ||
1007 | struct ia64_sal_retval rv; | ||
1008 | SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid, | ||
1009 | opcode, a0, a1, a2, a3, a4); | ||
1010 | if (v0) | ||
1011 | *v0 = (int) rv.v0; | ||
1012 | return (int) rv.status; | ||
1013 | } | ||
1014 | |||
1015 | #endif /* _ASM_IA64_SN_SN_SAL_H */ | ||