aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-i386/processor.h
diff options
context:
space:
mode:
authorSiddha, Suresh B <suresh.b.siddha@intel.com>2006-03-27 04:15:22 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-27 11:44:43 -0500
commit1e9f28fa1eb9773bf65bae08288c6a0a38eef4a7 (patch)
treeccfa4927ebc7a8f663f9ac9e7789a713a33253ff /include/asm-i386/processor.h
parent77e4bfbcf071f795b54862455dce8902b3fc29c2 (diff)
[PATCH] sched: new sched domain for representing multi-core
Add a new sched domain for representing multi-core with shared caches between cores. Consider a dual package system, each package containing two cores and with last level cache shared between cores with in a package. If there are two runnable processes, with this appended patch those two processes will be scheduled on different packages. On such systems, with this patch we have observed 8% perf improvement with specJBB(2 warehouse) benchmark and 35% improvement with CFP2000 rate(with 2 users). This new domain will come into play only on multi-core systems with shared caches. On other systems, this sched domain will be removed by domain degeneration code. This new domain can be also used for implementing power savings policy (see OLS 2005 CMP kernel scheduler paper for more details.. I will post another patch for power savings policy soon) Most of the arch/* file changes are for cpu_coregroup_map() implementation. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/processor.h')
-rw-r--r--include/asm-i386/processor.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index feca5d961e2..af4bfd01247 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -20,6 +20,7 @@
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/threads.h> 21#include <linux/threads.h>
22#include <asm/percpu.h> 22#include <asm/percpu.h>
23#include <linux/cpumask.h>
23 24
24/* flag for disabling the tsc */ 25/* flag for disabling the tsc */
25extern int tsc_disable; 26extern int tsc_disable;
@@ -67,6 +68,9 @@ struct cpuinfo_x86 {
67 char pad0; 68 char pad0;
68 int x86_power; 69 int x86_power;
69 unsigned long loops_per_jiffy; 70 unsigned long loops_per_jiffy;
71#ifdef CONFIG_SMP
72 cpumask_t llc_shared_map; /* cpus sharing the last level cache */
73#endif
70 unsigned char x86_max_cores; /* cpuid returned max cores value */ 74 unsigned char x86_max_cores; /* cpuid returned max cores value */
71 unsigned char booted_cores; /* number of cores as seen by OS */ 75 unsigned char booted_cores; /* number of cores as seen by OS */
72 unsigned char apicid; 76 unsigned char apicid;
@@ -103,6 +107,7 @@ extern struct cpuinfo_x86 cpu_data[];
103 107
104extern int phys_proc_id[NR_CPUS]; 108extern int phys_proc_id[NR_CPUS];
105extern int cpu_core_id[NR_CPUS]; 109extern int cpu_core_id[NR_CPUS];
110extern int cpu_llc_id[NR_CPUS];
106extern char ignore_fpu_irq; 111extern char ignore_fpu_irq;
107 112
108extern void identify_cpu(struct cpuinfo_x86 *); 113extern void identify_cpu(struct cpuinfo_x86 *);