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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-28 05:38:19 -0400
committerRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-28 05:38:19 -0400
commitc4d12b98ead8bb2437f656c17e7ef065fa160e13 (patch)
tree5c73444b7f1d60b759c223d915fb7645984e5865 /include/asm-arm
parentea3f4eaca09de1bcc80e922e56a6dabba5882f56 (diff)
[PATCH] ARM: Fix AMBA CLCD fb driver for 1bpp/STN mono panels
Fix the AMBA CLCD framebuffer driver for 1bpp modes and STN monochrome LCD panels. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/hardware/amba_clcd.h27
1 files changed, 17 insertions, 10 deletions
diff --git a/include/asm-arm/hardware/amba_clcd.h b/include/asm-arm/hardware/amba_clcd.h
index 2149be7c702..476b6398ae1 100644
--- a/include/asm-arm/hardware/amba_clcd.h
+++ b/include/asm-arm/hardware/amba_clcd.h
@@ -153,7 +153,7 @@ struct clcd_fb {
153 153
154static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs) 154static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
155{ 155{
156 u32 val; 156 u32 val, cpl;
157 157
158 /* 158 /*
159 * Program the CLCD controller registers and start the CLCD 159 * Program the CLCD controller registers and start the CLCD
@@ -164,7 +164,10 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
164 val |= (fb->fb.var.left_margin - 1) << 24; 164 val |= (fb->fb.var.left_margin - 1) << 24;
165 regs->tim0 = val; 165 regs->tim0 = val;
166 166
167 val = fb->fb.var.yres - 1; 167 val = fb->fb.var.yres;
168 if (fb->panel->cntl & CNTL_LCDDUAL)
169 val /= 2;
170 val -= 1;
168 val |= (fb->fb.var.vsync_len - 1) << 10; 171 val |= (fb->fb.var.vsync_len - 1) << 10;
169 val |= fb->fb.var.lower_margin << 16; 172 val |= fb->fb.var.lower_margin << 16;
170 val |= fb->fb.var.upper_margin << 24; 173 val |= fb->fb.var.upper_margin << 24;
@@ -174,13 +177,17 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
174 val |= fb->fb.var.sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS; 177 val |= fb->fb.var.sync & FB_SYNC_HOR_HIGH_ACT ? 0 : TIM2_IHS;
175 val |= fb->fb.var.sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS; 178 val |= fb->fb.var.sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS;
176 179
177 if (fb->panel->cntl & CNTL_LCDTFT) 180 cpl = fb->fb.var.xres_virtual;
178 val |= (fb->fb.var.xres_virtual - 1) << 16; 181 if (fb->panel->cntl & CNTL_LCDTFT) /* TFT */
179 else if (fb->panel->cntl & CNTL_LCDBW) 182 /* / 1 */;
180 printk("what value for CPL for stnmono panels?"); 183 else if (!fb->fb.var.grayscale) /* STN color */
181 else 184 cpl = cpl * 8 / 3;
182 val |= ((fb->fb.var.xres_virtual * 8 / 3) - 1) << 16; 185 else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */
183 regs->tim2 = val; 186 cpl /= 8;
187 else /* STN monochrome, 4bit */
188 cpl /= 4;
189
190 regs->tim2 = val | ((cpl - 1) << 16);
184 191
185 regs->tim3 = fb->panel->tim3; 192 regs->tim3 = fb->panel->tim3;
186 193
@@ -216,7 +223,7 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
216static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) 223static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
217{ 224{
218 var->xres_virtual = var->xres = (var->xres + 7) & ~7; 225 var->xres_virtual = var->xres = (var->xres + 7) & ~7;
219 var->yres_virtual = var->yres; 226 var->yres_virtual = var->yres = (var->yres + 1) & ~1;
220 227
221#define CHECK(e,l,h) (var->e < l || var->e > h) 228#define CHECK(e,l,h) (var->e < l || var->e > h)
222 if (CHECK(right_margin, (5+1), 256) || /* back porch */ 229 if (CHECK(right_margin, (5+1), 256) || /* back porch */