diff options
| author | Stanislav Samsonov <samsonov@marvell.com> | 2008-06-03 04:24:40 -0400 |
|---|---|---|
| committer | Lennert Buytenhek <buytenh@marvell.com> | 2008-06-22 16:45:03 -0400 |
| commit | 836a8051d54525e0782f156dcfa3c13d30f22840 (patch) | |
| tree | a72c16e6bbfb4b4768562bc9757bdd04b17e4c7f /include/asm-arm/arch-ks8695/regs-mem.h | |
| parent | 7ea217a85e38c5ed6edbc789670badb619da9f28 (diff) | |
[ARM] Feroceon: L1 cache range operation support
This patch adds support for the L1 D cache range operations that
are supported by the Marvell Discovery Duo and Marvell Kirkwood
ARM SoCs.
Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'include/asm-arm/arch-ks8695/regs-mem.h')
0 files changed, 0 insertions, 0 deletions