diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-alpha/pci.h |
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-alpha/pci.h')
-rw-r--r-- | include/asm-alpha/pci.h | 261 |
1 files changed, 261 insertions, 0 deletions
diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h new file mode 100644 index 00000000000..0c7b57bc043 --- /dev/null +++ b/include/asm-alpha/pci.h | |||
@@ -0,0 +1,261 @@ | |||
1 | #ifndef __ALPHA_PCI_H | ||
2 | #define __ALPHA_PCI_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #include <linux/spinlock.h> | ||
7 | #include <asm/scatterlist.h> | ||
8 | #include <asm/machvec.h> | ||
9 | |||
10 | /* | ||
11 | * The following structure is used to manage multiple PCI busses. | ||
12 | */ | ||
13 | |||
14 | struct pci_dev; | ||
15 | struct pci_bus; | ||
16 | struct resource; | ||
17 | struct pci_iommu_arena; | ||
18 | struct page; | ||
19 | |||
20 | /* A controller. Used to manage multiple PCI busses. */ | ||
21 | |||
22 | struct pci_controller { | ||
23 | struct pci_controller *next; | ||
24 | struct pci_bus *bus; | ||
25 | struct resource *io_space; | ||
26 | struct resource *mem_space; | ||
27 | |||
28 | /* The following are for reporting to userland. The invariant is | ||
29 | that if we report a BWX-capable dense memory, we do not report | ||
30 | a sparse memory at all, even if it exists. */ | ||
31 | unsigned long sparse_mem_base; | ||
32 | unsigned long dense_mem_base; | ||
33 | unsigned long sparse_io_base; | ||
34 | unsigned long dense_io_base; | ||
35 | |||
36 | /* This one's for the kernel only. It's in KSEG somewhere. */ | ||
37 | unsigned long config_space_base; | ||
38 | |||
39 | unsigned int index; | ||
40 | /* For compatibility with current (as of July 2003) pciutils | ||
41 | and XFree86. Eventually will be removed. */ | ||
42 | unsigned int need_domain_info; | ||
43 | |||
44 | struct pci_iommu_arena *sg_pci; | ||
45 | struct pci_iommu_arena *sg_isa; | ||
46 | |||
47 | void *sysdata; | ||
48 | }; | ||
49 | |||
50 | /* Override the logic in pci_scan_bus for skipping already-configured | ||
51 | bus numbers. */ | ||
52 | |||
53 | #define pcibios_assign_all_busses() 1 | ||
54 | #define pcibios_scan_all_fns(a, b) 0 | ||
55 | |||
56 | #define PCIBIOS_MIN_IO alpha_mv.min_io_address | ||
57 | #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address | ||
58 | |||
59 | extern void pcibios_set_master(struct pci_dev *dev); | ||
60 | |||
61 | extern inline void pcibios_penalize_isa_irq(int irq) | ||
62 | { | ||
63 | /* We don't do dynamic PCI IRQ allocation */ | ||
64 | } | ||
65 | |||
66 | /* IOMMU controls. */ | ||
67 | |||
68 | /* The PCI address space does not equal the physical memory address space. | ||
69 | The networking and block device layers use this boolean for bounce buffer | ||
70 | decisions. */ | ||
71 | #define PCI_DMA_BUS_IS_PHYS 0 | ||
72 | |||
73 | /* Allocate and map kernel buffer using consistent mode DMA for PCI | ||
74 | device. Returns non-NULL cpu-view pointer to the buffer if | ||
75 | successful and sets *DMA_ADDRP to the pci side dma address as well, | ||
76 | else DMA_ADDRP is undefined. */ | ||
77 | |||
78 | extern void *pci_alloc_consistent(struct pci_dev *, size_t, dma_addr_t *); | ||
79 | |||
80 | /* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must | ||
81 | be values that were returned from pci_alloc_consistent. SIZE must | ||
82 | be the same as what as passed into pci_alloc_consistent. | ||
83 | References to the memory and mappings associated with CPU_ADDR or | ||
84 | DMA_ADDR past this call are illegal. */ | ||
85 | |||
86 | extern void pci_free_consistent(struct pci_dev *, size_t, void *, dma_addr_t); | ||
87 | |||
88 | /* Map a single buffer of the indicate size for PCI DMA in streaming mode. | ||
89 | The 32-bit PCI bus mastering address to use is returned. Once the device | ||
90 | is given the dma address, the device owns this memory until either | ||
91 | pci_unmap_single or pci_dma_sync_single_for_cpu is performed. */ | ||
92 | |||
93 | extern dma_addr_t pci_map_single(struct pci_dev *, void *, size_t, int); | ||
94 | |||
95 | /* Likewise, but for a page instead of an address. */ | ||
96 | extern dma_addr_t pci_map_page(struct pci_dev *, struct page *, | ||
97 | unsigned long, size_t, int); | ||
98 | |||
99 | /* Test for pci_map_single or pci_map_page having generated an error. */ | ||
100 | |||
101 | static inline int | ||
102 | pci_dma_mapping_error(dma_addr_t dma_addr) | ||
103 | { | ||
104 | return dma_addr == 0; | ||
105 | } | ||
106 | |||
107 | /* Unmap a single streaming mode DMA translation. The DMA_ADDR and | ||
108 | SIZE must match what was provided for in a previous pci_map_single | ||
109 | call. All other usages are undefined. After this call, reads by | ||
110 | the cpu to the buffer are guaranteed to see whatever the device | ||
111 | wrote there. */ | ||
112 | |||
113 | extern void pci_unmap_single(struct pci_dev *, dma_addr_t, size_t, int); | ||
114 | extern void pci_unmap_page(struct pci_dev *, dma_addr_t, size_t, int); | ||
115 | |||
116 | /* pci_unmap_{single,page} is not a nop, thus... */ | ||
117 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | ||
118 | dma_addr_t ADDR_NAME; | ||
119 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | ||
120 | __u32 LEN_NAME; | ||
121 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | ||
122 | ((PTR)->ADDR_NAME) | ||
123 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | ||
124 | (((PTR)->ADDR_NAME) = (VAL)) | ||
125 | #define pci_unmap_len(PTR, LEN_NAME) \ | ||
126 | ((PTR)->LEN_NAME) | ||
127 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | ||
128 | (((PTR)->LEN_NAME) = (VAL)) | ||
129 | |||
130 | /* Map a set of buffers described by scatterlist in streaming mode for | ||
131 | PCI DMA. This is the scatter-gather version of the above | ||
132 | pci_map_single interface. Here the scatter gather list elements | ||
133 | are each tagged with the appropriate PCI dma address and length. | ||
134 | They are obtained via sg_dma_{address,length}(SG). | ||
135 | |||
136 | NOTE: An implementation may be able to use a smaller number of DMA | ||
137 | address/length pairs than there are SG table elements. (for | ||
138 | example via virtual mapping capabilities) The routine returns the | ||
139 | number of addr/length pairs actually used, at most nents. | ||
140 | |||
141 | Device ownership issues as mentioned above for pci_map_single are | ||
142 | the same here. */ | ||
143 | |||
144 | extern int pci_map_sg(struct pci_dev *, struct scatterlist *, int, int); | ||
145 | |||
146 | /* Unmap a set of streaming mode DMA translations. Again, cpu read | ||
147 | rules concerning calls here are the same as for pci_unmap_single() | ||
148 | above. */ | ||
149 | |||
150 | extern void pci_unmap_sg(struct pci_dev *, struct scatterlist *, int, int); | ||
151 | |||
152 | /* Make physical memory consistent for a single streaming mode DMA | ||
153 | translation after a transfer and device currently has ownership | ||
154 | of the buffer. | ||
155 | |||
156 | If you perform a pci_map_single() but wish to interrogate the | ||
157 | buffer using the cpu, yet do not wish to teardown the PCI dma | ||
158 | mapping, you must call this function before doing so. At the next | ||
159 | point you give the PCI dma address back to the card, you must first | ||
160 | perform a pci_dma_sync_for_device, and then the device again owns | ||
161 | the buffer. */ | ||
162 | |||
163 | static inline void | ||
164 | pci_dma_sync_single_for_cpu(struct pci_dev *dev, dma_addr_t dma_addr, | ||
165 | long size, int direction) | ||
166 | { | ||
167 | /* Nothing to do. */ | ||
168 | } | ||
169 | |||
170 | static inline void | ||
171 | pci_dma_sync_single_for_device(struct pci_dev *dev, dma_addr_t dma_addr, | ||
172 | size_t size, int direction) | ||
173 | { | ||
174 | /* Nothing to do. */ | ||
175 | } | ||
176 | |||
177 | /* Make physical memory consistent for a set of streaming mode DMA | ||
178 | translations after a transfer. The same as pci_dma_sync_single_* | ||
179 | but for a scatter-gather list, same rules and usage. */ | ||
180 | |||
181 | static inline void | ||
182 | pci_dma_sync_sg_for_cpu(struct pci_dev *dev, struct scatterlist *sg, | ||
183 | int nents, int direction) | ||
184 | { | ||
185 | /* Nothing to do. */ | ||
186 | } | ||
187 | |||
188 | static inline void | ||
189 | pci_dma_sync_sg_for_device(struct pci_dev *dev, struct scatterlist *sg, | ||
190 | int nents, int direction) | ||
191 | { | ||
192 | /* Nothing to do. */ | ||
193 | } | ||
194 | |||
195 | /* Return whether the given PCI device DMA address mask can | ||
196 | be supported properly. For example, if your device can | ||
197 | only drive the low 24-bits during PCI bus mastering, then | ||
198 | you would pass 0x00ffffff as the mask to this function. */ | ||
199 | |||
200 | extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); | ||
201 | |||
202 | /* True if the machine supports DAC addressing, and DEV can | ||
203 | make use of it given MASK. */ | ||
204 | extern int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask); | ||
205 | |||
206 | /* Convert to/from DAC dma address and struct page. */ | ||
207 | extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *, struct page *, | ||
208 | unsigned long, int); | ||
209 | extern struct page *pci_dac_dma_to_page(struct pci_dev *, dma64_addr_t); | ||
210 | extern unsigned long pci_dac_dma_to_offset(struct pci_dev *, dma64_addr_t); | ||
211 | |||
212 | static inline void | ||
213 | pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, | ||
214 | size_t len, int direction) | ||
215 | { | ||
216 | /* Nothing to do. */ | ||
217 | } | ||
218 | |||
219 | static inline void | ||
220 | pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, | ||
221 | size_t len, int direction) | ||
222 | { | ||
223 | /* Nothing to do. */ | ||
224 | } | ||
225 | |||
226 | /* TODO: integrate with include/asm-generic/pci.h ? */ | ||
227 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) | ||
228 | { | ||
229 | return channel ? 15 : 14; | ||
230 | } | ||
231 | |||
232 | extern void pcibios_resource_to_bus(struct pci_dev *, struct pci_bus_region *, | ||
233 | struct resource *); | ||
234 | |||
235 | #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index | ||
236 | |||
237 | static inline int pci_proc_domain(struct pci_bus *bus) | ||
238 | { | ||
239 | struct pci_controller *hose = bus->sysdata; | ||
240 | return hose->need_domain_info; | ||
241 | } | ||
242 | |||
243 | static inline void | ||
244 | pcibios_add_platform_entries(struct pci_dev *dev) | ||
245 | { | ||
246 | } | ||
247 | |||
248 | struct pci_dev *alpha_gendev_to_pci(struct device *dev); | ||
249 | |||
250 | #endif /* __KERNEL__ */ | ||
251 | |||
252 | /* Values for the `which' argument to sys_pciconfig_iobase. */ | ||
253 | #define IOBASE_HOSE 0 | ||
254 | #define IOBASE_SPARSE_MEM 1 | ||
255 | #define IOBASE_DENSE_MEM 2 | ||
256 | #define IOBASE_SPARSE_IO 3 | ||
257 | #define IOBASE_DENSE_IO 4 | ||
258 | #define IOBASE_ROOT_BUS 5 | ||
259 | #define IOBASE_FROM_HOSE 0x10000 | ||
260 | |||
261 | #endif /* __ALPHA_PCI_H */ | ||