diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-11-22 17:56:33 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-11-22 18:23:30 -0500 |
commit | e719ebd916c2ecee072affc9e7f0b92aa33c2f94 (patch) | |
tree | 19631406bf478c68846133cb2079560d6e1bfbe1 /drivers | |
parent | e33df25fecd31be889a878bc75313817bc292bac (diff) |
drm/radeon/kms: add bo blit support for Ontario fusion APUs
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen_blit_kms.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 6 |
2 files changed, 28 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c index e0e590110dd..2ccd1f0545f 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c | |||
@@ -147,7 +147,8 @@ set_vtx_resource(struct radeon_device *rdev, u64 gpu_addr) | |||
147 | radeon_ring_write(rdev, 0); | 147 | radeon_ring_write(rdev, 0); |
148 | radeon_ring_write(rdev, SQ_TEX_VTX_VALID_BUFFER << 30); | 148 | radeon_ring_write(rdev, SQ_TEX_VTX_VALID_BUFFER << 30); |
149 | 149 | ||
150 | if (rdev->family == CHIP_CEDAR) | 150 | if ((rdev->family == CHIP_CEDAR) || |
151 | (rdev->family == CHIP_PALM)) | ||
151 | cp_set_surface_sync(rdev, | 152 | cp_set_surface_sync(rdev, |
152 | PACKET3_TC_ACTION_ENA, 48, gpu_addr); | 153 | PACKET3_TC_ACTION_ENA, 48, gpu_addr); |
153 | else | 154 | else |
@@ -331,9 +332,31 @@ set_default_state(struct radeon_device *rdev) | |||
331 | num_hs_stack_entries = 85; | 332 | num_hs_stack_entries = 85; |
332 | num_ls_stack_entries = 85; | 333 | num_ls_stack_entries = 85; |
333 | break; | 334 | break; |
335 | case CHIP_PALM: | ||
336 | num_ps_gprs = 93; | ||
337 | num_vs_gprs = 46; | ||
338 | num_temp_gprs = 4; | ||
339 | num_gs_gprs = 31; | ||
340 | num_es_gprs = 31; | ||
341 | num_hs_gprs = 23; | ||
342 | num_ls_gprs = 23; | ||
343 | num_ps_threads = 96; | ||
344 | num_vs_threads = 16; | ||
345 | num_gs_threads = 16; | ||
346 | num_es_threads = 16; | ||
347 | num_hs_threads = 16; | ||
348 | num_ls_threads = 16; | ||
349 | num_ps_stack_entries = 42; | ||
350 | num_vs_stack_entries = 42; | ||
351 | num_gs_stack_entries = 42; | ||
352 | num_es_stack_entries = 42; | ||
353 | num_hs_stack_entries = 42; | ||
354 | num_ls_stack_entries = 42; | ||
355 | break; | ||
334 | } | 356 | } |
335 | 357 | ||
336 | if (rdev->family == CHIP_CEDAR) | 358 | if ((rdev->family == CHIP_CEDAR) || |
359 | (rdev->family == CHIP_PALM)) | ||
337 | sq_config = 0; | 360 | sq_config = 0; |
338 | else | 361 | else |
339 | sq_config = VC_ENABLE; | 362 | sq_config = VC_ENABLE; |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 4e487cc16e7..de7bfbcd09c 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -769,9 +769,9 @@ static struct radeon_asic sumo_asic = { | |||
769 | .get_vblank_counter = &evergreen_get_vblank_counter, | 769 | .get_vblank_counter = &evergreen_get_vblank_counter, |
770 | .fence_ring_emit = &r600_fence_ring_emit, | 770 | .fence_ring_emit = &r600_fence_ring_emit, |
771 | .cs_parse = &evergreen_cs_parse, | 771 | .cs_parse = &evergreen_cs_parse, |
772 | .copy_blit = NULL, | 772 | .copy_blit = &evergreen_copy_blit, |
773 | .copy_dma = NULL, | 773 | .copy_dma = &evergreen_copy_blit, |
774 | .copy = NULL, | 774 | .copy = &evergreen_copy_blit, |
775 | .get_engine_clock = &radeon_atom_get_engine_clock, | 775 | .get_engine_clock = &radeon_atom_get_engine_clock, |
776 | .set_engine_clock = &radeon_atom_set_engine_clock, | 776 | .set_engine_clock = &radeon_atom_set_engine_clock, |
777 | .get_memory_clock = NULL, | 777 | .get_memory_clock = NULL, |