diff options
author | Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> | 2008-06-06 04:04:08 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 05:10:29 -0400 |
commit | c63847a3621d2bac054f5709783860ecabd0ee7e (patch) | |
tree | a04e0aca07d0a672a56b1611544f7d2da0b621e4 /drivers | |
parent | 04e917b606ffe6ec10fb75c21447162cba31f6b6 (diff) |
sh: Add SCIF2 support for SH7763.
SH7763 has 3 SCIF device. Current code supports SCIF0 and 1.
SCIF0 and 1 are same register constitution, but only SCIF2 is different.
I added support of SCIF2.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/sh-sci.c | 17 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 38 |
2 files changed, 43 insertions, 12 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 208e42ba945..3df2aaec829 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -410,7 +410,6 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |||
410 | #endif | 410 | #endif |
411 | 411 | ||
412 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ | 412 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
413 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
414 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 413 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
415 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 414 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
416 | static inline int scif_txroom(struct uart_port *port) | 415 | static inline int scif_txroom(struct uart_port *port) |
@@ -422,6 +421,22 @@ static inline int scif_rxroom(struct uart_port *port) | |||
422 | { | 421 | { |
423 | return sci_in(port, SCRFDR) & 0xff; | 422 | return sci_in(port, SCRFDR) & 0xff; |
424 | } | 423 | } |
424 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
425 | static inline int scif_txroom(struct uart_port *port) | ||
426 | { | ||
427 | if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/ | ||
428 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); | ||
429 | else /* SCIF2 */ | ||
430 | return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | ||
431 | } | ||
432 | |||
433 | static inline int scif_rxroom(struct uart_port *port) | ||
434 | { | ||
435 | if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/ | ||
436 | return sci_in(port, SCRFDR) & 0xff; | ||
437 | else /* SCIF2 */ | ||
438 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; | ||
439 | } | ||
425 | #else | 440 | #else |
426 | static inline int scif_txroom(struct uart_port *port) | 441 | static inline int scif_txroom(struct uart_port *port) |
427 | { | 442 | { |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index eb84833233f..cd728df6a01 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -123,8 +123,9 @@ | |||
123 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 123 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
124 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 124 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
125 | # define SCSPTR1 0xffe08024 /* 16 bit SCIF */ | 125 | # define SCSPTR1 0xffe08024 /* 16 bit SCIF */ |
126 | # define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */ | ||
126 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 127 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
127 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 128 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
128 | # define SCIF_ONLY | 129 | # define SCIF_ONLY |
129 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) | 130 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) |
130 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ | 131 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ |
@@ -188,6 +189,7 @@ | |||
188 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ | 189 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ |
189 | defined(CONFIG_CPU_SUBTYPE_SH7751) || \ | 190 | defined(CONFIG_CPU_SUBTYPE_SH7751) || \ |
190 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | 191 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ |
192 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
191 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 193 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
192 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 194 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
193 | defined(CONFIG_CPU_SUBTYPE_SHX3) | 195 | defined(CONFIG_CPU_SUBTYPE_SHX3) |
@@ -225,14 +227,21 @@ | |||
225 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 227 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
226 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 228 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
227 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 229 | defined(CONFIG_CPU_SUBTYPE_SH7721) |
228 | #define SCIF_ORER 0x0200 | 230 | # define SCIF_ORER 0x0200 |
229 | #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) | 231 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) |
230 | #define SCIF_RFDC_MASK 0x007f | 232 | # define SCIF_RFDC_MASK 0x007f |
231 | #define SCIF_TXROOM_MAX 64 | 233 | # define SCIF_TXROOM_MAX 64 |
234 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
235 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK ) | ||
236 | # define SCIF_RFDC_MASK 0x007f | ||
237 | # define SCIF_TXROOM_MAX 64 | ||
238 | /* SH7763 SCIF2 support */ | ||
239 | # define SCIF2_RFDC_MASK 0x001f | ||
240 | # define SCIF2_TXROOM_MAX 16 | ||
232 | #else | 241 | #else |
233 | #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) | 242 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) |
234 | #define SCIF_RFDC_MASK 0x001f | 243 | # define SCIF_RFDC_MASK 0x001f |
235 | #define SCIF_TXROOM_MAX 16 | 244 | # define SCIF_TXROOM_MAX 16 |
236 | #endif | 245 | #endif |
237 | 246 | ||
238 | #if defined(SCI_ONLY) | 247 | #if defined(SCI_ONLY) |
@@ -445,11 +454,16 @@ SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) | |||
445 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | 454 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ |
446 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 455 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
447 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 456 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
448 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) | ||
449 | SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) | 457 | SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) |
450 | SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) | 458 | SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) |
451 | SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) | 459 | SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) |
452 | SCIF_FNS(SCLSR, 0, 0, 0x28, 16) | 460 | SCIF_FNS(SCLSR, 0, 0, 0x28, 16) |
461 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) | ||
462 | /* SH7763 SCIF2 */ | ||
463 | SCIF_FNS(SCFDR, 0, 0, 0x1C, 16) | ||
464 | SCIF_FNS(SCSPTR2, 0, 0, 0x20, 16) | ||
465 | SCIF_FNS(SCLSR2, 0, 0, 0x24, 16) | ||
466 | #endif /* CONFIG_CPU_SUBTYPE_SH7763 */ | ||
453 | #else | 467 | #else |
454 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) | 468 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) |
455 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) | 469 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) |
@@ -652,6 +666,9 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
652 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | 666 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ |
653 | if (port->mapbase == 0xffe08000) | 667 | if (port->mapbase == 0xffe08000) |
654 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 668 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
669 | if (port->mapbase == 0xffe10000) | ||
670 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ | ||
671 | |||
655 | return 1; | 672 | return 1; |
656 | } | 673 | } |
657 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) | 674 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) |
@@ -764,8 +781,7 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
764 | * -- Mitch Davis - 15 Jul 2000 | 781 | * -- Mitch Davis - 15 Jul 2000 |
765 | */ | 782 | */ |
766 | 783 | ||
767 | #if defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | 784 | #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
768 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | ||
769 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 785 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
770 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) | 786 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) |
771 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 787 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |