diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2009-11-04 12:36:24 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-11-06 16:48:58 -0500 |
commit | 89297425c2104b187c25d6260a41345c491c8f18 (patch) | |
tree | 7a66b13c5a555af7d1adfd20fbda06e37dbf3ef0 /drivers | |
parent | 4d6f8b9f17626da48d6badc6ba259fbacc1413c3 (diff) |
rt2800: add rt2800lib (part one)
Code unification.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Acked-by: Ivo van Doorn <IvDoorn@gmail.com>
Acked-by: Gertjan van Wingerde <gwingerde@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/rt2x00/Kconfig | 5 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/Makefile | 1 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 244 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.h | 14 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800pci.c | 236 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800usb.c | 223 |
6 files changed, 264 insertions, 459 deletions
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig index 18e5b8e6c34..bf60689aaab 100644 --- a/drivers/net/wireless/rt2x00/Kconfig +++ b/drivers/net/wireless/rt2x00/Kconfig | |||
@@ -66,6 +66,7 @@ config RT2800PCI_SOC | |||
66 | config RT2800PCI | 66 | config RT2800PCI |
67 | tristate "Ralink rt2800 (PCI/PCMCIA) support (VERY EXPERIMENTAL)" | 67 | tristate "Ralink rt2800 (PCI/PCMCIA) support (VERY EXPERIMENTAL)" |
68 | depends on (RT2800PCI_PCI || RT2800PCI_SOC) && EXPERIMENTAL | 68 | depends on (RT2800PCI_PCI || RT2800PCI_SOC) && EXPERIMENTAL |
69 | select RT2800_LIB | ||
69 | select RT2X00_LIB_PCI if RT2800PCI_PCI | 70 | select RT2X00_LIB_PCI if RT2800PCI_PCI |
70 | select RT2X00_LIB_SOC if RT2800PCI_SOC | 71 | select RT2X00_LIB_SOC if RT2800PCI_SOC |
71 | select RT2X00_LIB_HT | 72 | select RT2X00_LIB_HT |
@@ -109,6 +110,7 @@ config RT73USB | |||
109 | config RT2800USB | 110 | config RT2800USB |
110 | tristate "Ralink rt2800 (USB) support (EXPERIMENTAL)" | 111 | tristate "Ralink rt2800 (USB) support (EXPERIMENTAL)" |
111 | depends on USB && EXPERIMENTAL | 112 | depends on USB && EXPERIMENTAL |
113 | select RT2800_LIB | ||
112 | select RT2X00_LIB_USB | 114 | select RT2X00_LIB_USB |
113 | select RT2X00_LIB_HT | 115 | select RT2X00_LIB_HT |
114 | select RT2X00_LIB_FIRMWARE | 116 | select RT2X00_LIB_FIRMWARE |
@@ -124,6 +126,9 @@ config RT2800USB | |||
124 | 126 | ||
125 | When compiled as a module, this driver will be called "rt2800usb.ko". | 127 | When compiled as a module, this driver will be called "rt2800usb.ko". |
126 | 128 | ||
129 | config RT2800_LIB | ||
130 | tristate | ||
131 | |||
127 | config RT2X00_LIB_PCI | 132 | config RT2X00_LIB_PCI |
128 | tristate | 133 | tristate |
129 | select RT2X00_LIB | 134 | select RT2X00_LIB |
diff --git a/drivers/net/wireless/rt2x00/Makefile b/drivers/net/wireless/rt2x00/Makefile index 912f5f67e15..97133985829 100644 --- a/drivers/net/wireless/rt2x00/Makefile +++ b/drivers/net/wireless/rt2x00/Makefile | |||
@@ -13,6 +13,7 @@ obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o | |||
13 | obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o | 13 | obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o |
14 | obj-$(CONFIG_RT2X00_LIB_SOC) += rt2x00soc.o | 14 | obj-$(CONFIG_RT2X00_LIB_SOC) += rt2x00soc.o |
15 | obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o | 15 | obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o |
16 | obj-$(CONFIG_RT2800_LIB) += rt2800lib.o | ||
16 | obj-$(CONFIG_RT2400PCI) += rt2400pci.o | 17 | obj-$(CONFIG_RT2400PCI) += rt2400pci.o |
17 | obj-$(CONFIG_RT2500PCI) += rt2500pci.o | 18 | obj-$(CONFIG_RT2500PCI) += rt2500pci.o |
18 | obj-$(CONFIG_RT61PCI) += rt61pci.o | 19 | obj-$(CONFIG_RT61PCI) += rt61pci.o |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c new file mode 100644 index 00000000000..3cbe85434ce --- /dev/null +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | Copyright (C) 2009 Bartlomiej Zolnierkiewicz | ||
3 | |||
4 | Based on the original rt2800pci.c and rt2800usb.c: | ||
5 | |||
6 | Copyright (C) 2004 - 2009 rt2x00 SourceForge Project | ||
7 | <http://rt2x00.serialmonkey.com> | ||
8 | |||
9 | This program is free software; you can redistribute it and/or modify | ||
10 | it under the terms of the GNU General Public License as published by | ||
11 | the Free Software Foundation; either version 2 of the License, or | ||
12 | (at your option) any later version. | ||
13 | |||
14 | This program is distributed in the hope that it will be useful, | ||
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | GNU General Public License for more details. | ||
18 | |||
19 | You should have received a copy of the GNU General Public License | ||
20 | along with this program; if not, write to the | ||
21 | Free Software Foundation, Inc., | ||
22 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
23 | */ | ||
24 | |||
25 | /* | ||
26 | Module: rt2800lib | ||
27 | Abstract: rt2800 generic device routines. | ||
28 | */ | ||
29 | |||
30 | #include <linux/kernel.h> | ||
31 | #include <linux/module.h> | ||
32 | |||
33 | #include "rt2x00.h" | ||
34 | #include "rt2800lib.h" | ||
35 | #include "rt2800.h" | ||
36 | |||
37 | MODULE_AUTHOR("Bartlomiej Zolnierkiewicz"); | ||
38 | MODULE_DESCRIPTION("rt2800 library"); | ||
39 | MODULE_LICENSE("GPL"); | ||
40 | |||
41 | /* | ||
42 | * Register access. | ||
43 | * All access to the CSR registers will go through the methods | ||
44 | * rt2800_register_read and rt2800_register_write. | ||
45 | * BBP and RF register require indirect register access, | ||
46 | * and use the CSR registers BBPCSR and RFCSR to achieve this. | ||
47 | * These indirect registers work with busy bits, | ||
48 | * and we will try maximal REGISTER_BUSY_COUNT times to access | ||
49 | * the register while taking a REGISTER_BUSY_DELAY us delay | ||
50 | * between each attampt. When the busy bit is still set at that time, | ||
51 | * the access attempt is considered to have failed, | ||
52 | * and we will print an error. | ||
53 | * The _lock versions must be used if you already hold the csr_mutex | ||
54 | */ | ||
55 | #define WAIT_FOR_BBP(__dev, __reg) \ | ||
56 | rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg)) | ||
57 | #define WAIT_FOR_RFCSR(__dev, __reg) \ | ||
58 | rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg)) | ||
59 | #define WAIT_FOR_RF(__dev, __reg) \ | ||
60 | rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg)) | ||
61 | #define WAIT_FOR_MCU(__dev, __reg) \ | ||
62 | rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \ | ||
63 | H2M_MAILBOX_CSR_OWNER, (__reg)) | ||
64 | |||
65 | void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | ||
66 | const unsigned int word, const u8 value) | ||
67 | { | ||
68 | u32 reg; | ||
69 | |||
70 | mutex_lock(&rt2x00dev->csr_mutex); | ||
71 | |||
72 | /* | ||
73 | * Wait until the BBP becomes available, afterwards we | ||
74 | * can safely write the new data into the register. | ||
75 | */ | ||
76 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { | ||
77 | reg = 0; | ||
78 | rt2x00_set_field32(®, BBP_CSR_CFG_VALUE, value); | ||
79 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | ||
80 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | ||
81 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); | ||
82 | if (rt2x00_intf_is_pci(rt2x00dev)) | ||
83 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | ||
84 | |||
85 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | ||
86 | } | ||
87 | |||
88 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
89 | } | ||
90 | EXPORT_SYMBOL_GPL(rt2800_bbp_write); | ||
91 | |||
92 | void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, | ||
93 | const unsigned int word, u8 *value) | ||
94 | { | ||
95 | u32 reg; | ||
96 | |||
97 | mutex_lock(&rt2x00dev->csr_mutex); | ||
98 | |||
99 | /* | ||
100 | * Wait until the BBP becomes available, afterwards we | ||
101 | * can safely write the read request into the register. | ||
102 | * After the data has been written, we wait until hardware | ||
103 | * returns the correct value, if at any time the register | ||
104 | * doesn't become available in time, reg will be 0xffffffff | ||
105 | * which means we return 0xff to the caller. | ||
106 | */ | ||
107 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { | ||
108 | reg = 0; | ||
109 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | ||
110 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | ||
111 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); | ||
112 | if (rt2x00_intf_is_pci(rt2x00dev)) | ||
113 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | ||
114 | |||
115 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | ||
116 | |||
117 | WAIT_FOR_BBP(rt2x00dev, ®); | ||
118 | } | ||
119 | |||
120 | *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE); | ||
121 | |||
122 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
123 | } | ||
124 | EXPORT_SYMBOL_GPL(rt2800_bbp_read); | ||
125 | |||
126 | void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev, | ||
127 | const unsigned int word, const u8 value) | ||
128 | { | ||
129 | u32 reg; | ||
130 | |||
131 | mutex_lock(&rt2x00dev->csr_mutex); | ||
132 | |||
133 | /* | ||
134 | * Wait until the RFCSR becomes available, afterwards we | ||
135 | * can safely write the new data into the register. | ||
136 | */ | ||
137 | if (WAIT_FOR_RFCSR(rt2x00dev, ®)) { | ||
138 | reg = 0; | ||
139 | rt2x00_set_field32(®, RF_CSR_CFG_DATA, value); | ||
140 | rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word); | ||
141 | rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 1); | ||
142 | rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1); | ||
143 | |||
144 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); | ||
145 | } | ||
146 | |||
147 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
148 | } | ||
149 | EXPORT_SYMBOL_GPL(rt2800_rfcsr_write); | ||
150 | |||
151 | void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev, | ||
152 | const unsigned int word, u8 *value) | ||
153 | { | ||
154 | u32 reg; | ||
155 | |||
156 | mutex_lock(&rt2x00dev->csr_mutex); | ||
157 | |||
158 | /* | ||
159 | * Wait until the RFCSR becomes available, afterwards we | ||
160 | * can safely write the read request into the register. | ||
161 | * After the data has been written, we wait until hardware | ||
162 | * returns the correct value, if at any time the register | ||
163 | * doesn't become available in time, reg will be 0xffffffff | ||
164 | * which means we return 0xff to the caller. | ||
165 | */ | ||
166 | if (WAIT_FOR_RFCSR(rt2x00dev, ®)) { | ||
167 | reg = 0; | ||
168 | rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word); | ||
169 | rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 0); | ||
170 | rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1); | ||
171 | |||
172 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); | ||
173 | |||
174 | WAIT_FOR_RFCSR(rt2x00dev, ®); | ||
175 | } | ||
176 | |||
177 | *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA); | ||
178 | |||
179 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
180 | } | ||
181 | EXPORT_SYMBOL_GPL(rt2800_rfcsr_read); | ||
182 | |||
183 | void rt2800_rf_write(struct rt2x00_dev *rt2x00dev, | ||
184 | const unsigned int word, const u32 value) | ||
185 | { | ||
186 | u32 reg; | ||
187 | |||
188 | mutex_lock(&rt2x00dev->csr_mutex); | ||
189 | |||
190 | /* | ||
191 | * Wait until the RF becomes available, afterwards we | ||
192 | * can safely write the new data into the register. | ||
193 | */ | ||
194 | if (WAIT_FOR_RF(rt2x00dev, ®)) { | ||
195 | reg = 0; | ||
196 | rt2x00_set_field32(®, RF_CSR_CFG0_REG_VALUE_BW, value); | ||
197 | rt2x00_set_field32(®, RF_CSR_CFG0_STANDBYMODE, 0); | ||
198 | rt2x00_set_field32(®, RF_CSR_CFG0_SEL, 0); | ||
199 | rt2x00_set_field32(®, RF_CSR_CFG0_BUSY, 1); | ||
200 | |||
201 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg); | ||
202 | rt2x00_rf_write(rt2x00dev, word, value); | ||
203 | } | ||
204 | |||
205 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
206 | } | ||
207 | EXPORT_SYMBOL_GPL(rt2800_rf_write); | ||
208 | |||
209 | void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, | ||
210 | const u8 command, const u8 token, | ||
211 | const u8 arg0, const u8 arg1) | ||
212 | { | ||
213 | u32 reg; | ||
214 | |||
215 | if (rt2x00_intf_is_pci(rt2x00dev)) { | ||
216 | /* | ||
217 | * RT2880 and RT3052 don't support MCU requests. | ||
218 | */ | ||
219 | if (rt2x00_rt(&rt2x00dev->chip, RT2880) || | ||
220 | rt2x00_rt(&rt2x00dev->chip, RT3052)) | ||
221 | return; | ||
222 | } | ||
223 | |||
224 | mutex_lock(&rt2x00dev->csr_mutex); | ||
225 | |||
226 | /* | ||
227 | * Wait until the MCU becomes available, afterwards we | ||
228 | * can safely write the new data into the register. | ||
229 | */ | ||
230 | if (WAIT_FOR_MCU(rt2x00dev, ®)) { | ||
231 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_OWNER, 1); | ||
232 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_CMD_TOKEN, token); | ||
233 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG0, arg0); | ||
234 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG1, arg1); | ||
235 | rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg); | ||
236 | |||
237 | reg = 0; | ||
238 | rt2x00_set_field32(®, HOST_CMD_CSR_HOST_COMMAND, command); | ||
239 | rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg); | ||
240 | } | ||
241 | |||
242 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
243 | } | ||
244 | EXPORT_SYMBOL_GPL(rt2800_mcu_request); | ||
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h index 17e91fb1a77..40a7f72e87f 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.h +++ b/drivers/net/wireless/rt2x00/rt2800lib.h | |||
@@ -96,4 +96,18 @@ static inline int rt2800_regbusy_read(struct rt2x00_dev *rt2x00dev, | |||
96 | return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg); | 96 | return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg); |
97 | } | 97 | } |
98 | 98 | ||
99 | void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | ||
100 | const unsigned int word, const u8 value); | ||
101 | void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, | ||
102 | const unsigned int word, u8 *value); | ||
103 | void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev, | ||
104 | const unsigned int word, const u8 value); | ||
105 | void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev, | ||
106 | const unsigned int word, u8 *value); | ||
107 | void rt2800_rf_write(struct rt2x00_dev *rt2x00dev, | ||
108 | const unsigned int word, const u32 value); | ||
109 | void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, | ||
110 | const u8 command, const u8 token, | ||
111 | const u8 arg0, const u8 arg1); | ||
112 | |||
99 | #endif /* RT2800LIB_H */ | 113 | #endif /* RT2800LIB_H */ |
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index 938f198f356..90ada5d014f 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c | |||
@@ -56,242 +56,6 @@ static int modparam_nohwcrypt = 1; | |||
56 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); | 56 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); |
57 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); | 57 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); |
58 | 58 | ||
59 | /* | ||
60 | * Register access. | ||
61 | * All access to the CSR registers will go through the methods | ||
62 | * rt2800_register_read and rt2800_register_write. | ||
63 | * BBP and RF register require indirect register access, | ||
64 | * and use the CSR registers BBPCSR and RFCSR to achieve this. | ||
65 | * These indirect registers work with busy bits, | ||
66 | * and we will try maximal REGISTER_BUSY_COUNT times to access | ||
67 | * the register while taking a REGISTER_BUSY_DELAY us delay | ||
68 | * between each attampt. When the busy bit is still set at that time, | ||
69 | * the access attempt is considered to have failed, | ||
70 | * and we will print an error. | ||
71 | * The _lock versions must be used if you already hold the csr_mutex | ||
72 | */ | ||
73 | #define WAIT_FOR_BBP(__dev, __reg) \ | ||
74 | rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg)) | ||
75 | #define WAIT_FOR_RFCSR(__dev, __reg) \ | ||
76 | rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg)) | ||
77 | #define WAIT_FOR_RF(__dev, __reg) \ | ||
78 | rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg)) | ||
79 | #define WAIT_FOR_MCU(__dev, __reg) \ | ||
80 | rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \ | ||
81 | H2M_MAILBOX_CSR_OWNER, (__reg)) | ||
82 | |||
83 | static void rt2800pci_bbp_write(struct rt2x00_dev *rt2x00dev, | ||
84 | const unsigned int word, const u8 value) | ||
85 | { | ||
86 | u32 reg; | ||
87 | |||
88 | mutex_lock(&rt2x00dev->csr_mutex); | ||
89 | |||
90 | /* | ||
91 | * Wait until the BBP becomes available, afterwards we | ||
92 | * can safely write the new data into the register. | ||
93 | */ | ||
94 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { | ||
95 | reg = 0; | ||
96 | rt2x00_set_field32(®, BBP_CSR_CFG_VALUE, value); | ||
97 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | ||
98 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | ||
99 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); | ||
100 | if (rt2x00_intf_is_pci(rt2x00dev)) | ||
101 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | ||
102 | |||
103 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | ||
104 | } | ||
105 | |||
106 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
107 | } | ||
108 | |||
109 | static void rt2800pci_bbp_read(struct rt2x00_dev *rt2x00dev, | ||
110 | const unsigned int word, u8 *value) | ||
111 | { | ||
112 | u32 reg; | ||
113 | |||
114 | mutex_lock(&rt2x00dev->csr_mutex); | ||
115 | |||
116 | /* | ||
117 | * Wait until the BBP becomes available, afterwards we | ||
118 | * can safely write the read request into the register. | ||
119 | * After the data has been written, we wait until hardware | ||
120 | * returns the correct value, if at any time the register | ||
121 | * doesn't become available in time, reg will be 0xffffffff | ||
122 | * which means we return 0xff to the caller. | ||
123 | */ | ||
124 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { | ||
125 | reg = 0; | ||
126 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | ||
127 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | ||
128 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); | ||
129 | if (rt2x00_intf_is_pci(rt2x00dev)) | ||
130 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | ||
131 | |||
132 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | ||
133 | |||
134 | WAIT_FOR_BBP(rt2x00dev, ®); | ||
135 | } | ||
136 | |||
137 | *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE); | ||
138 | |||
139 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
140 | } | ||
141 | |||
142 | static inline void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | ||
143 | const unsigned int word, const u8 value) | ||
144 | { | ||
145 | rt2800pci_bbp_write(rt2x00dev, word, value); | ||
146 | } | ||
147 | |||
148 | static inline void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, | ||
149 | const unsigned int word, u8 *value) | ||
150 | { | ||
151 | rt2800pci_bbp_read(rt2x00dev, word, value); | ||
152 | } | ||
153 | |||
154 | static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev, | ||
155 | const unsigned int word, const u8 value) | ||
156 | { | ||
157 | u32 reg; | ||
158 | |||
159 | mutex_lock(&rt2x00dev->csr_mutex); | ||
160 | |||
161 | /* | ||
162 | * Wait until the RFCSR becomes available, afterwards we | ||
163 | * can safely write the new data into the register. | ||
164 | */ | ||
165 | if (WAIT_FOR_RFCSR(rt2x00dev, ®)) { | ||
166 | reg = 0; | ||
167 | rt2x00_set_field32(®, RF_CSR_CFG_DATA, value); | ||
168 | rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word); | ||
169 | rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 1); | ||
170 | rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1); | ||
171 | |||
172 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); | ||
173 | } | ||
174 | |||
175 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
176 | } | ||
177 | |||
178 | static void rt2800pci_rfcsr_read(struct rt2x00_dev *rt2x00dev, | ||
179 | const unsigned int word, u8 *value) | ||
180 | { | ||
181 | u32 reg; | ||
182 | |||
183 | mutex_lock(&rt2x00dev->csr_mutex); | ||
184 | |||
185 | /* | ||
186 | * Wait until the RFCSR becomes available, afterwards we | ||
187 | * can safely write the read request into the register. | ||
188 | * After the data has been written, we wait until hardware | ||
189 | * returns the correct value, if at any time the register | ||
190 | * doesn't become available in time, reg will be 0xffffffff | ||
191 | * which means we return 0xff to the caller. | ||
192 | */ | ||
193 | if (WAIT_FOR_RFCSR(rt2x00dev, ®)) { | ||
194 | reg = 0; | ||
195 | rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word); | ||
196 | rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 0); | ||
197 | rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1); | ||
198 | |||
199 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); | ||
200 | |||
201 | WAIT_FOR_RFCSR(rt2x00dev, ®); | ||
202 | } | ||
203 | |||
204 | *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA); | ||
205 | |||
206 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
207 | } | ||
208 | |||
209 | static inline void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev, | ||
210 | const unsigned int word, const u8 value) | ||
211 | { | ||
212 | rt2800pci_rfcsr_write(rt2x00dev, word, value); | ||
213 | } | ||
214 | |||
215 | static inline void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev, | ||
216 | const unsigned int word, u8 *value) | ||
217 | { | ||
218 | rt2800pci_rfcsr_read(rt2x00dev, word, value); | ||
219 | } | ||
220 | |||
221 | static void rt2800pci_rf_write(struct rt2x00_dev *rt2x00dev, | ||
222 | const unsigned int word, const u32 value) | ||
223 | { | ||
224 | u32 reg; | ||
225 | |||
226 | mutex_lock(&rt2x00dev->csr_mutex); | ||
227 | |||
228 | /* | ||
229 | * Wait until the RF becomes available, afterwards we | ||
230 | * can safely write the new data into the register. | ||
231 | */ | ||
232 | if (WAIT_FOR_RF(rt2x00dev, ®)) { | ||
233 | reg = 0; | ||
234 | rt2x00_set_field32(®, RF_CSR_CFG0_REG_VALUE_BW, value); | ||
235 | rt2x00_set_field32(®, RF_CSR_CFG0_STANDBYMODE, 0); | ||
236 | rt2x00_set_field32(®, RF_CSR_CFG0_SEL, 0); | ||
237 | rt2x00_set_field32(®, RF_CSR_CFG0_BUSY, 1); | ||
238 | |||
239 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg); | ||
240 | rt2x00_rf_write(rt2x00dev, word, value); | ||
241 | } | ||
242 | |||
243 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
244 | } | ||
245 | |||
246 | static inline void rt2800_rf_write(struct rt2x00_dev *rt2x00dev, | ||
247 | const unsigned int word, const u32 value) | ||
248 | { | ||
249 | rt2800pci_rf_write(rt2x00dev, word, value); | ||
250 | } | ||
251 | |||
252 | static void rt2800pci_mcu_request(struct rt2x00_dev *rt2x00dev, | ||
253 | const u8 command, const u8 token, | ||
254 | const u8 arg0, const u8 arg1) | ||
255 | { | ||
256 | u32 reg; | ||
257 | |||
258 | if (rt2x00_intf_is_pci(rt2x00dev)) { | ||
259 | /* | ||
260 | * RT2880 and RT3052 don't support MCU requests. | ||
261 | */ | ||
262 | if (rt2x00_rt(&rt2x00dev->chip, RT2880) || | ||
263 | rt2x00_rt(&rt2x00dev->chip, RT3052)) | ||
264 | return; | ||
265 | } | ||
266 | |||
267 | mutex_lock(&rt2x00dev->csr_mutex); | ||
268 | |||
269 | /* | ||
270 | * Wait until the MCU becomes available, afterwards we | ||
271 | * can safely write the new data into the register. | ||
272 | */ | ||
273 | if (WAIT_FOR_MCU(rt2x00dev, ®)) { | ||
274 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_OWNER, 1); | ||
275 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_CMD_TOKEN, token); | ||
276 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG0, arg0); | ||
277 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG1, arg1); | ||
278 | rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg); | ||
279 | |||
280 | reg = 0; | ||
281 | rt2x00_set_field32(®, HOST_CMD_CSR_HOST_COMMAND, command); | ||
282 | rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg); | ||
283 | } | ||
284 | |||
285 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
286 | } | ||
287 | |||
288 | static inline void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, | ||
289 | const u8 command, const u8 token, | ||
290 | const u8 arg0, const u8 arg1) | ||
291 | { | ||
292 | rt2800pci_mcu_request(rt2x00dev, command, token, arg0, arg1); | ||
293 | } | ||
294 | |||
295 | static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token) | 59 | static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token) |
296 | { | 60 | { |
297 | unsigned int i; | 61 | unsigned int i; |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index 9aee3ab6589..6bd646a979a 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -45,229 +45,6 @@ static int modparam_nohwcrypt = 1; | |||
45 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); | 45 | module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); |
46 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); | 46 | MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); |
47 | 47 | ||
48 | /* | ||
49 | * Register access. | ||
50 | * All access to the CSR registers will go through the methods | ||
51 | * rt2800_register_read and rt2800_register_write. | ||
52 | * BBP and RF register require indirect register access, | ||
53 | * and use the CSR registers BBPCSR and RFCSR to achieve this. | ||
54 | * These indirect registers work with busy bits, | ||
55 | * and we will try maximal REGISTER_BUSY_COUNT times to access | ||
56 | * the register while taking a REGISTER_BUSY_DELAY us delay | ||
57 | * between each attampt. When the busy bit is still set at that time, | ||
58 | * the access attempt is considered to have failed, | ||
59 | * and we will print an error. | ||
60 | * The _lock versions must be used if you already hold the csr_mutex | ||
61 | */ | ||
62 | #define WAIT_FOR_BBP(__dev, __reg) \ | ||
63 | rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg)) | ||
64 | #define WAIT_FOR_RFCSR(__dev, __reg) \ | ||
65 | rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg)) | ||
66 | #define WAIT_FOR_RF(__dev, __reg) \ | ||
67 | rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg)) | ||
68 | #define WAIT_FOR_MCU(__dev, __reg) \ | ||
69 | rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \ | ||
70 | H2M_MAILBOX_CSR_OWNER, (__reg)) | ||
71 | |||
72 | static void rt2800usb_bbp_write(struct rt2x00_dev *rt2x00dev, | ||
73 | const unsigned int word, const u8 value) | ||
74 | { | ||
75 | u32 reg; | ||
76 | |||
77 | mutex_lock(&rt2x00dev->csr_mutex); | ||
78 | |||
79 | /* | ||
80 | * Wait until the BBP becomes available, afterwards we | ||
81 | * can safely write the new data into the register. | ||
82 | */ | ||
83 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { | ||
84 | reg = 0; | ||
85 | rt2x00_set_field32(®, BBP_CSR_CFG_VALUE, value); | ||
86 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | ||
87 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | ||
88 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); | ||
89 | |||
90 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | ||
91 | } | ||
92 | |||
93 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
94 | } | ||
95 | |||
96 | static void rt2800usb_bbp_read(struct rt2x00_dev *rt2x00dev, | ||
97 | const unsigned int word, u8 *value) | ||
98 | { | ||
99 | u32 reg; | ||
100 | |||
101 | mutex_lock(&rt2x00dev->csr_mutex); | ||
102 | |||
103 | /* | ||
104 | * Wait until the BBP becomes available, afterwards we | ||
105 | * can safely write the read request into the register. | ||
106 | * After the data has been written, we wait until hardware | ||
107 | * returns the correct value, if at any time the register | ||
108 | * doesn't become available in time, reg will be 0xffffffff | ||
109 | * which means we return 0xff to the caller. | ||
110 | */ | ||
111 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { | ||
112 | reg = 0; | ||
113 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | ||
114 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | ||
115 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); | ||
116 | |||
117 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | ||
118 | |||
119 | WAIT_FOR_BBP(rt2x00dev, ®); | ||
120 | } | ||
121 | |||
122 | *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE); | ||
123 | |||
124 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
125 | } | ||
126 | |||
127 | static inline void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | ||
128 | const unsigned int word, const u8 value) | ||
129 | { | ||
130 | rt2800usb_bbp_write(rt2x00dev, word, value); | ||
131 | } | ||
132 | |||
133 | static inline void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, | ||
134 | const unsigned int word, u8 *value) | ||
135 | { | ||
136 | rt2800usb_bbp_read(rt2x00dev, word, value); | ||
137 | } | ||
138 | |||
139 | static void rt2800usb_rfcsr_write(struct rt2x00_dev *rt2x00dev, | ||
140 | const unsigned int word, const u8 value) | ||
141 | { | ||
142 | u32 reg; | ||
143 | |||
144 | mutex_lock(&rt2x00dev->csr_mutex); | ||
145 | |||
146 | /* | ||
147 | * Wait until the RFCSR becomes available, afterwards we | ||
148 | * can safely write the new data into the register. | ||
149 | */ | ||
150 | if (WAIT_FOR_RFCSR(rt2x00dev, ®)) { | ||
151 | reg = 0; | ||
152 | rt2x00_set_field32(®, RF_CSR_CFG_DATA, value); | ||
153 | rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word); | ||
154 | rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 1); | ||
155 | rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1); | ||
156 | |||
157 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); | ||
158 | } | ||
159 | |||
160 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
161 | } | ||
162 | |||
163 | static void rt2800usb_rfcsr_read(struct rt2x00_dev *rt2x00dev, | ||
164 | const unsigned int word, u8 *value) | ||
165 | { | ||
166 | u32 reg; | ||
167 | |||
168 | mutex_lock(&rt2x00dev->csr_mutex); | ||
169 | |||
170 | /* | ||
171 | * Wait until the RFCSR becomes available, afterwards we | ||
172 | * can safely write the read request into the register. | ||
173 | * After the data has been written, we wait until hardware | ||
174 | * returns the correct value, if at any time the register | ||
175 | * doesn't become available in time, reg will be 0xffffffff | ||
176 | * which means we return 0xff to the caller. | ||
177 | */ | ||
178 | if (WAIT_FOR_RFCSR(rt2x00dev, ®)) { | ||
179 | reg = 0; | ||
180 | rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word); | ||
181 | rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 0); | ||
182 | rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1); | ||
183 | |||
184 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg); | ||
185 | |||
186 | WAIT_FOR_RFCSR(rt2x00dev, ®); | ||
187 | } | ||
188 | |||
189 | *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA); | ||
190 | |||
191 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
192 | } | ||
193 | |||
194 | static inline void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev, | ||
195 | const unsigned int word, const u8 value) | ||
196 | { | ||
197 | rt2800usb_rfcsr_write(rt2x00dev, word, value); | ||
198 | } | ||
199 | |||
200 | static inline void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev, | ||
201 | const unsigned int word, u8 *value) | ||
202 | { | ||
203 | rt2800usb_rfcsr_read(rt2x00dev, word, value); | ||
204 | } | ||
205 | |||
206 | static void rt2800usb_rf_write(struct rt2x00_dev *rt2x00dev, | ||
207 | const unsigned int word, const u32 value) | ||
208 | { | ||
209 | u32 reg; | ||
210 | |||
211 | mutex_lock(&rt2x00dev->csr_mutex); | ||
212 | |||
213 | /* | ||
214 | * Wait until the RF becomes available, afterwards we | ||
215 | * can safely write the new data into the register. | ||
216 | */ | ||
217 | if (WAIT_FOR_RF(rt2x00dev, ®)) { | ||
218 | reg = 0; | ||
219 | rt2x00_set_field32(®, RF_CSR_CFG0_REG_VALUE_BW, value); | ||
220 | rt2x00_set_field32(®, RF_CSR_CFG0_STANDBYMODE, 0); | ||
221 | rt2x00_set_field32(®, RF_CSR_CFG0_SEL, 0); | ||
222 | rt2x00_set_field32(®, RF_CSR_CFG0_BUSY, 1); | ||
223 | |||
224 | rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg); | ||
225 | rt2x00_rf_write(rt2x00dev, word, value); | ||
226 | } | ||
227 | |||
228 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
229 | } | ||
230 | |||
231 | static inline void rt2800_rf_write(struct rt2x00_dev *rt2x00dev, | ||
232 | const unsigned int word, const u32 value) | ||
233 | { | ||
234 | rt2800usb_rf_write(rt2x00dev, word, value); | ||
235 | } | ||
236 | |||
237 | static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev, | ||
238 | const u8 command, const u8 token, | ||
239 | const u8 arg0, const u8 arg1) | ||
240 | { | ||
241 | u32 reg; | ||
242 | |||
243 | mutex_lock(&rt2x00dev->csr_mutex); | ||
244 | |||
245 | /* | ||
246 | * Wait until the MCU becomes available, afterwards we | ||
247 | * can safely write the new data into the register. | ||
248 | */ | ||
249 | if (WAIT_FOR_MCU(rt2x00dev, ®)) { | ||
250 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_OWNER, 1); | ||
251 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_CMD_TOKEN, token); | ||
252 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG0, arg0); | ||
253 | rt2x00_set_field32(®, H2M_MAILBOX_CSR_ARG1, arg1); | ||
254 | rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg); | ||
255 | |||
256 | reg = 0; | ||
257 | rt2x00_set_field32(®, HOST_CMD_CSR_HOST_COMMAND, command); | ||
258 | rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg); | ||
259 | } | ||
260 | |||
261 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
262 | } | ||
263 | |||
264 | static inline void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, | ||
265 | const u8 command, const u8 token, | ||
266 | const u8 arg0, const u8 arg1) | ||
267 | { | ||
268 | rt2800usb_mcu_request(rt2x00dev, command, token, arg0, arg1); | ||
269 | } | ||
270 | |||
271 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 48 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
272 | static const struct rt2x00debug rt2800usb_rt2x00debug = { | 49 | static const struct rt2x00debug rt2800usb_rt2x00debug = { |
273 | .owner = THIS_MODULE, | 50 | .owner = THIS_MODULE, |