Merge branch 'x86-64'

* x86-64: (83 commits)
  [PATCH] x86_64: x86_64 stack usage debugging
  [PATCH] x86_64: (resend) x86_64 stack overflow debugging
  [PATCH] x86_64: msi_apic.c build fix
  [PATCH] x86_64: i386/x86-64 Add nmi watchdog support for new Intel CPUs
  [PATCH] x86_64: Avoid broadcasting NMI IPIs
  [PATCH] x86_64: fix apic error on bootup
  [PATCH] x86_64: enlarge window for stack growth
  [PATCH] x86_64: Minor string functions optimizations
  [PATCH] x86_64: Move export symbols to their C functions
  [PATCH] x86_64: Standardize i386/x86_64 handling of NMI_VECTOR
  [PATCH] x86_64: Fix modular pc speaker
  [PATCH] x86_64: remove sys32_ni_syscall()
  [PATCH] x86_64: Do not use -ffunction-sections for modules
  [PATCH] x86_64: Add cpu_relax to apic_wait_icr_idle
  [PATCH] x86_64: adjust kstack_depth_to_print default
  [PATCH] i386/x86-64: adjust /proc/interrupts column headings
  [PATCH] x86_64: Fix race in cpu_local_* on preemptible kernels
  [PATCH] x86_64: Fix fast check in safe_smp_processor_id
  [PATCH] x86_64: x86_64 setup.c - printing cmp related boottime information
  [PATCH] i386/x86-64/ia64: Move polling flag into thread_info_status
  ...

Manual resolve of trivial conflict in arch/i386/kernel/Makefile

5 files changed, 40 insertions, 63 deletions

diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index a5f4f2aa007..8a74bf3efd8 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -206,11 +206,11 @@ acpi_processor_power_activate(struct acpi_processor *pr,
 
 static void acpi_safe_halt(void)
 {
-        clear_thread_flag(TIF_POLLING_NRFLAG);
+        current_thread_info()->status &= ~TS_POLLING;
         smp_mb__after_clear_bit();
         if (!need_resched())
                 safe_halt();
-        set_thread_flag(TIF_POLLING_NRFLAG);
+        current_thread_info()->status |= TS_POLLING;
 }
 
 static atomic_t c3_cpu_count;
@@ -330,10 +330,10 @@ static void acpi_processor_idle(void)
          * Invoke the current Cx state to put the processor to sleep.
          */
         if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
-                clear_thread_flag(TIF_POLLING_NRFLAG);
+                current_thread_info()->status &= ~TS_POLLING;
                 smp_mb__after_clear_bit();
                 if (need_resched()) {
-                        set_thread_flag(TIF_POLLING_NRFLAG);
+                        current_thread_info()->status |= TS_POLLING;
                         local_irq_enable();
                         return;
                 }
@@ -376,7 +376,7 @@ static void acpi_processor_idle(void)
 #endif
                 /* Re-enable interrupts */
                 local_irq_enable();
-                set_thread_flag(TIF_POLLING_NRFLAG);
+                current_thread_info()->status |= TS_POLLING;
                 /* Compute time (ticks) that we were actually asleep */
                 sleep_ticks =
                     ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
@@ -420,7 +420,7 @@ static void acpi_processor_idle(void)
 #endif
                 /* Re-enable interrupts */
                 local_irq_enable();
-                set_thread_flag(TIF_POLLING_NRFLAG);
+                current_thread_info()->status |= TS_POLLING;
                 /* Compute time (ticks) that we were actually asleep */
                 sleep_ticks =
                     ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
diff --git a/drivers/char/agp/Kconfig b/drivers/char/agp/Kconfig
index 46685a54077..9826a399fa0 100644
--- a/drivers/char/agp/Kconfig
+++ b/drivers/char/agp/Kconfig
@@ -55,9 +55,9 @@ config AGP_AMD
           X on AMD Irongate, 761, and 762 chipsets.
 
 config AGP_AMD64
-        tristate "AMD Opteron/Athlon64 on-CPU GART support" if !GART_IOMMU
+        tristate "AMD Opteron/Athlon64 on-CPU GART support" if !IOMMU
         depends on AGP && X86
-        default y if GART_IOMMU
+        default y if IOMMU
         help
           This option gives you AGP support for the GLX component of
           X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs.
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index ac3c33a2e37..f690ee8cb73 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -15,11 +15,9 @@
 #include <linux/agp_backend.h>
 #include <linux/mmzone.h>
 #include <asm/page.h>           /* PAGE_SIZE */
+#include <asm/k8.h>
 #include "agp.h"
 
-/* Will need to be increased if AMD64 ever goes >8-way. */
-#define MAX_HAMMER_GARTS   8
-
 /* PTE bits. */
 #define GPTE_VALID      1
 #define GPTE_COHERENT   2
@@ -53,28 +51,12 @@
 #define ULI_X86_64_HTT_FEA_REG          0x50
 #define ULI_X86_64_ENU_SCR_REG          0x54
 
-static int nr_garts;
-static struct pci_dev * hammers[MAX_HAMMER_GARTS];
-
 static struct resource *aperture_resource;
 static int __initdata agp_try_unsupported = 1;
 
-#define for_each_nb() for(gart_iterator=0;gart_iterator<nr_garts;gart_iterator++)
-
-static void flush_amd64_tlb(struct pci_dev *dev)
-{
-        u32 tmp;
-
-        pci_read_config_dword (dev, AMD64_GARTCACHECTL, &tmp);
-        tmp |= INVGART;
-        pci_write_config_dword (dev, AMD64_GARTCACHECTL, tmp);
-}
-
 static void amd64_tlbflush(struct agp_memory *temp)
 {
-        int gart_iterator;
-        for_each_nb()
-                flush_amd64_tlb(hammers[gart_iterator]);
+        k8_flush_garts();
 }
 
 static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
@@ -153,7 +135,7 @@ static int amd64_fetch_size(void)
         u32 temp;
         struct aper_size_info_32 *values;
 
-        dev = hammers[0];
+        dev = k8_northbridges[0];
         if (dev==NULL)
                 return 0;
 
@@ -201,9 +183,6 @@ static u64 amd64_configure (struct pci_dev *hammer, u64 gatt_table)
         tmp &= ~(DISGARTCPU | DISGARTIO);
         pci_write_config_dword(hammer, AMD64_GARTAPERTURECTL, tmp);
 
-        /* keep CPU's coherent. */
-        flush_amd64_tlb (hammer);
-
         return aper_base;
 }
 
@@ -222,13 +201,14 @@ static struct aper_size_info_32 amd_8151_sizes[7] =
 static int amd_8151_configure(void)
 {
         unsigned long gatt_bus = virt_to_gart(agp_bridge->gatt_table_real);
-        int gart_iterator;
+        int i;
 
         /* Configure AGP regs in each x86-64 host bridge. */
-        for_each_nb() {
+        for (i = 0; i < num_k8_northbridges; i++) {
                 agp_bridge->gart_bus_addr =
-                                amd64_configure(hammers[gart_iterator],gatt_bus);
+                                amd64_configure(k8_northbridges[i], gatt_bus);
         }
+        k8_flush_garts();
         return 0;
 }
 
@@ -236,12 +216,13 @@ static int amd_8151_configure(void)
 static void amd64_cleanup(void)
 {
         u32 tmp;
-        int gart_iterator;
-        for_each_nb() {
+        int i;
+        for (i = 0; i < num_k8_northbridges; i++) {
+                struct pci_dev *dev = k8_northbridges[i];
                 /* disable gart translation */
-                pci_read_config_dword (hammers[gart_iterator], AMD64_GARTAPERTURECTL, &tmp);
+                pci_read_config_dword (dev, AMD64_GARTAPERTURECTL, &tmp);
                 tmp &= ~AMD64_GARTEN;
-                pci_write_config_dword (hammers[gart_iterator], AMD64_GARTAPERTURECTL, tmp);
+                pci_write_config_dword (dev, AMD64_GARTAPERTURECTL, tmp);
         }
 }
 
@@ -311,7 +292,7 @@ static int __devinit aperture_valid(u64 aper, u32 size)
 /*
  * W*s centric BIOS sometimes only set up the aperture in the AGP
  * bridge, not the northbridge. On AMD64 this is handled early
- * in aperture.c, but when GART_IOMMU is not enabled or we run
+ * in aperture.c, but when IOMMU is not enabled or we run
  * on a 32bit kernel this needs to be redone.
  * Unfortunately it is impossible to fix the aperture here because it's too late
  * to allocate that much memory. But at least error out cleanly instead of
@@ -361,17 +342,15 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp,
 
 static __devinit int cache_nbs (struct pci_dev *pdev, u32 cap_ptr)
 {
-        struct pci_dev *loop_dev = NULL;
-        int i = 0;
-
-        /* cache pci_devs of northbridges. */
-        while ((loop_dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1103, loop_dev))
-                        != NULL) {
-                if (i == MAX_HAMMER_GARTS) {
-                        printk(KERN_ERR PFX "Too many northbridges for AGP\n");
-                        return -1;
-                }
-                if (fix_northbridge(loop_dev, pdev, cap_ptr) < 0) {
+        int i;
+
+        if (cache_k8_northbridges() < 0)
+                return -ENODEV;
+
+        i = 0;
+        for (i = 0; i < num_k8_northbridges; i++) {
+                struct pci_dev *dev = k8_northbridges[i];
+                if (fix_northbridge(dev, pdev, cap_ptr) < 0) {
                         printk(KERN_ERR PFX "No usable aperture found.\n");
 #ifdef __x86_64__
                         /* should port this to i386 */
@@ -379,10 +358,8 @@ static __devinit int cache_nbs (struct pci_dev *pdev, u32 cap_ptr)
 #endif
                         return -1;
                 }
-                hammers[i++] = loop_dev;
         }
-                nr_garts = i;
-        return i == 0 ? -1 : 0;
+        return 0;
 }
 
 /* Handle AMD 8151 quirks */
@@ -450,7 +427,7 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
         }
 
         /* shadow x86-64 registers into ULi registers */
-        pci_read_config_dword (hammers[0], AMD64_GARTAPERTUREBASE, &httfea);
+        pci_read_config_dword (k8_northbridges[0], AMD64_GARTAPERTUREBASE, &httfea);
 
         /* if x86-64 aperture base is beyond 4G, exit here */
         if ((httfea & 0x7fff) >> (32 - 25))
@@ -513,7 +490,7 @@ static int __devinit nforce3_agp_init(struct pci_dev *pdev)
         pci_write_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, tmp);
 
         /* shadow x86-64 registers into NVIDIA registers */
-        pci_read_config_dword (hammers[0], AMD64_GARTAPERTUREBASE, &apbase);
+        pci_read_config_dword (k8_northbridges[0], AMD64_GARTAPERTUREBASE, &apbase);
 
         /* if x86-64 aperture base is beyond 4G, exit here */
         if ( (apbase & 0x7fff) >> (32 - 25) ) {
@@ -754,10 +731,6 @@ static struct pci_driver agp_amd64_pci_driver = {
 int __init agp_amd64_init(void)
 {
         int err = 0;
-        static struct pci_device_id amd64nb[] = {
-                { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) },
-                { },
-        };
 
         if (agp_off)
                 return -EINVAL;
@@ -774,7 +747,7 @@ int __init agp_amd64_init(void)
                 }
 
                 /* First check that we have at least one AMD64 NB */
-                if (!pci_dev_present(amd64nb))
+                if (!pci_dev_present(k8_nb_ids))
                         return -ENODEV;
 
                 /* Look for any AGP bridge */
@@ -802,7 +775,7 @@ static void __exit agp_amd64_cleanup(void)
 
 /* On AMD64 the PCI driver needs to initialize this driver early
    for the IOMMU, so it has to be called via a backdoor. */
-#ifndef CONFIG_GART_IOMMU
+#ifndef CONFIG_IOMMU
 module_init(agp_amd64_init);
 module_exit(agp_amd64_cleanup);
 #endif
diff --git a/drivers/pci/msi-apic.c b/drivers/pci/msi-apic.c
index 0eb5fe9003a..5ed798b319c 100644
--- a/drivers/pci/msi-apic.c
+++ b/drivers/pci/msi-apic.c
@@ -4,6 +4,7 @@
 
 #include <linux/pci.h>
 #include <linux/irq.h>
+#include <asm/smp.h>
 
 #include "msi.h"
 
diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c
index 35b0a6ebd3f..7cea514e810 100644
--- a/drivers/scsi/aacraid/comminit.c
+++ b/drivers/scsi/aacraid/comminit.c
@@ -104,8 +104,11 @@ static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long co
          * always true on real computers. It also has some slight problems
          * with the GART on x86-64. I've btw never tried DMA from PCI space
          * on this platform but don't be surprised if its problematic.
+         * [AK: something is very very wrong when a driver tests this symbol.
+         *  Someone should figure out what the comment writer really meant here and fix
+         *  the code. Or just remove that bad code. ]
          */
-#ifndef CONFIG_GART_IOMMU
+#ifndef CONFIG_IOMMU
         if ((num_physpages << (PAGE_SHIFT - 12)) <= AAC_MAX_HOSTPHYSMEMPAGES) {
                 init->HostPhysMemPages = 
                         cpu_to_le32(num_physpages << (PAGE_SHIFT-12));