aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorMikael Pettersson <mikpe@it.uu.se>2007-01-10 03:32:34 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-09 17:39:33 -0500
commit73fd456b2dd770ab4fcf14b9d45b7482237a2cf7 (patch)
tree6a32e6f9c95fbcb5fbf74c086527374dcdad3b89 /drivers
parent1fd7a697a37bcd484b130a71326e43cd68ced90c (diff)
sata_promise: ATAPI cleanup
Here's a cleanup for yesterday's sata_promise ATAPI patch: - add and use a symbolic constant for the altstatus register - check return status from ata_busy_wait() - add missing newline in a warning printk() - update comment in pdc_issue_atapi_pkt_cmd() to clarify that the maybe-wait-for-INT issue cannot occur in the current driver, but may occur if the driver starts issuing ATAPI non-DMA commands as PDC packets Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/sata_promise.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 9bd195fbd88..4c09d6504f0 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -59,6 +59,7 @@ enum {
59 PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */ 59 PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */
60 PDC_DEVICE = 0x18, /* Device/Head reg (per port) */ 60 PDC_DEVICE = 0x18, /* Device/Head reg (per port) */
61 PDC_COMMAND = 0x1C, /* Command/status reg (per port) */ 61 PDC_COMMAND = 0x1C, /* Command/status reg (per port) */
62 PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */
62 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ 63 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
63 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ 64 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
64 PDC_FLASH_CTL = 0x44, /* Flash control register */ 65 PDC_FLASH_CTL = 0x44, /* Flash control register */
@@ -728,7 +729,7 @@ static unsigned int pdc_wait_for_drq(struct ata_port *ap)
728 * know when to time out the outer loop. 729 * know when to time out the outer loop.
729 */ 730 */
730 for(i = 0; i < 1000; ++i) { 731 for(i = 0; i < 1000; ++i) {
731 status = readb(port_mmio + 0x38); /* altstatus */ 732 status = readb(port_mmio + PDC_ALTSTATUS);
732 if (status == 0xFF) 733 if (status == 0xFF)
733 break; 734 break;
734 if (status & ATA_BUSY) 735 if (status & ATA_BUSY)
@@ -738,7 +739,15 @@ static unsigned int pdc_wait_for_drq(struct ata_port *ap)
738 mdelay(1); 739 mdelay(1);
739 } 740 }
740 if (i >= 1000) 741 if (i >= 1000)
741 ata_port_printk(ap, KERN_WARNING, "%s timed out", __FUNCTION__); 742 ata_port_printk(ap, KERN_WARNING, "%s timed out\n", __FUNCTION__);
743 return status;
744}
745
746static unsigned int pdc_wait_on_busy(struct ata_port *ap)
747{
748 unsigned int status = ata_busy_wait(ap, ATA_BUSY, 1000);
749 if (status != 0xff && (status & ATA_BUSY))
750 ata_port_printk(ap, KERN_WARNING, "%s timed out\n", __FUNCTION__);
742 return status; 751 return status;
743} 752}
744 753
@@ -762,7 +771,7 @@ static void pdc_issue_atapi_pkt_cmd(struct ata_queued_cmd *qc)
762 tmp |= ATA_DEV1; 771 tmp |= ATA_DEV1;
763 } 772 }
764 writeb(tmp, port_mmio + PDC_DEVICE); 773 writeb(tmp, port_mmio + PDC_DEVICE);
765 ata_busy_wait(ap, ATA_BUSY, 1000); 774 pdc_wait_on_busy(ap);
766 775
767 writeb(0x00, port_mmio + PDC_SECTOR_COUNT); 776 writeb(0x00, port_mmio + PDC_SECTOR_COUNT);
768 writeb(0x00, port_mmio + PDC_SECTOR_NUMBER); 777 writeb(0x00, port_mmio + PDC_SECTOR_NUMBER);
@@ -788,14 +797,10 @@ static void pdc_issue_atapi_pkt_cmd(struct ata_queued_cmd *qc)
788 /* send ATAPI packet command 0xA0 */ 797 /* send ATAPI packet command 0xA0 */
789 writeb(ATA_CMD_PACKET, port_mmio + PDC_COMMAND); 798 writeb(ATA_CMD_PACKET, port_mmio + PDC_COMMAND);
790 799
791 /* 800 /* pdc_qc_issue_prot() currently sends ATAPI PIO packets back
792 * At this point in the issuing of a packet command, the Promise 801 * to libata. If we start handling those packets ourselves,
793 * driver busy-waits for INT (CTLSTAT bit 27) if it detected 802 * then we must busy-wait for INT (CTLSTAT bit 27) at this point
794 * (at port init time) that the device interrupts with assertion 803 * if the device has ATA_DFLAG_CDB_INTR set.
795 * of DRQ after receiving a packet command.
796 *
797 * XXX: Do we need to handle this case as well? Does libata detect
798 * this case for us, or do we have to do our own per-port init?
799 */ 804 */
800 805
801 pdc_wait_for_drq(ap); 806 pdc_wait_for_drq(ap);