diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-10-14 15:33:41 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2009-10-15 12:20:48 -0400 |
commit | 0eb96d6ed38430b72897adde58f5477a6b71757a (patch) | |
tree | 704c50f7b10f6b3bfe159aba2e21bbadac8c3191 /drivers | |
parent | 58a27471d00dc09945cbcfbbc5cbcdcd3c28211d (diff) |
drm/i915: save/restore BLC histogram control reg across suspend/resume
Turns out some machines, like the ThinkPad X40 don't come back if you
don't save/restore this register.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 2 |
3 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 24e154e4722..f6a3587ad06 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -304,6 +304,7 @@ typedef struct drm_i915_private { | |||
304 | u32 saveDSPASURF; | 304 | u32 saveDSPASURF; |
305 | u32 saveDSPATILEOFF; | 305 | u32 saveDSPATILEOFF; |
306 | u32 savePFIT_PGM_RATIOS; | 306 | u32 savePFIT_PGM_RATIOS; |
307 | u32 saveBLC_HIST_CTL; | ||
307 | u32 saveBLC_PWM_CTL; | 308 | u32 saveBLC_PWM_CTL; |
308 | u32 saveBLC_PWM_CTL2; | 309 | u32 saveBLC_PWM_CTL2; |
309 | u32 saveFPB0; | 310 | u32 saveFPB0; |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0dd87a7309e..b4813586d92 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -1080,6 +1080,8 @@ | |||
1080 | #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) | 1080 | #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) |
1081 | #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) | 1081 | #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) |
1082 | 1082 | ||
1083 | #define BLC_HIST_CTL 0x61260 | ||
1084 | |||
1083 | /* TV port control */ | 1085 | /* TV port control */ |
1084 | #define TV_CTL 0x68000 | 1086 | #define TV_CTL 0x68000 |
1085 | /** Enables the TV encoder */ | 1087 | /** Enables the TV encoder */ |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 660c5f36424..75c5bed48be 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -410,6 +410,7 @@ void i915_save_display(struct drm_device *dev) | |||
410 | dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); | 410 | dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); |
411 | dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); | 411 | dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); |
412 | dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); | 412 | dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); |
413 | dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL); | ||
413 | if (IS_I965G(dev)) | 414 | if (IS_I965G(dev)) |
414 | dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); | 415 | dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); |
415 | if (IS_MOBILE(dev) && !IS_I830(dev)) | 416 | if (IS_MOBILE(dev) && !IS_I830(dev)) |
@@ -501,6 +502,7 @@ void i915_restore_display(struct drm_device *dev) | |||
501 | 502 | ||
502 | I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); | 503 | I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); |
503 | I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); | 504 | I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); |
505 | I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL); | ||
504 | I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); | 506 | I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); |
505 | I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); | 507 | I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); |
506 | I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); | 508 | I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); |