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authorAuke Kok <auke-jan.h.kok@intel.com>2007-06-08 18:46:36 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 19:02:10 -0400
commit44c10138fd4bbc4b6d6bff0873c24902f2a9da65 (patch)
tree6e16d3ec80c87490dc743f72da086356f2906ace /drivers/video/kyro/STG4000InitDevice.c
parentb8a3a5214d7cc115f1ca3a3967b7229d97c46f4a (diff)
PCI: Change all drivers to use pci_device->revision
Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/video/kyro/STG4000InitDevice.c')
-rw-r--r--drivers/video/kyro/STG4000InitDevice.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/video/kyro/STG4000InitDevice.c b/drivers/video/kyro/STG4000InitDevice.c
index ab5285a7f1d..1d3f2080aa6 100644
--- a/drivers/video/kyro/STG4000InitDevice.c
+++ b/drivers/video/kyro/STG4000InitDevice.c
@@ -247,7 +247,6 @@ int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev)
247 u32 ulCoreClock; 247 u32 ulCoreClock;
248 u32 tmp; 248 u32 tmp;
249 u32 ulChipSpeed; 249 u32 ulChipSpeed;
250 u8 rev;
251 250
252 STG_WRITE_REG(IntMask, 0xFFFF); 251 STG_WRITE_REG(IntMask, 0xFFFF);
253 252
@@ -276,9 +275,9 @@ int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev)
276 PMX2_SOFTRESET_ROM_RST); 275 PMX2_SOFTRESET_ROM_RST);
277 276
278 pci_read_config_word(pDev, PCI_CONFIG_SUBSYS_ID, &sub); 277 pci_read_config_word(pDev, PCI_CONFIG_SUBSYS_ID, &sub);
279 pci_read_config_byte(pDev, PCI_REVISION_ID, &rev);
280 278
281 ulChipSpeed = InitSDRAMRegisters(pSTGReg, (u32)sub, (u32)rev); 279 ulChipSpeed = InitSDRAMRegisters(pSTGReg, (u32)sub,
280 (u32)pDev->revision);
282 281
283 if (ulChipSpeed == 0) 282 if (ulChipSpeed == 0)
284 return -EINVAL; 283 return -EINVAL;