diff options
author | Olimpiu Pascariu <olimpiu.pascariu@gmail.com> | 2010-03-21 13:18:19 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-05-17 23:51:13 -0400 |
commit | de2c43492017d705d3f7ffc7f89c9b5a93752871 (patch) | |
tree | 994ed81a71cf2755113680a1afc091dfa39e6917 /drivers/staging | |
parent | b5f11cc7037fad423877ac09a48f337829880a95 (diff) |
V4L/DVB: cx25821: fix coding style issues in cx25821-core.c
Fixes up warnings and errors found by the checkpatch.pl tool on
cx25821-core.c.
Signed-off-by: Olimpiu Pascariu <olimpiu.pascariu@gmail.com>
CC: Palash Bandyopadhyay <palash.bandyopadhyay@conexant.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/staging')
-rw-r--r-- | drivers/staging/cx25821/cx25821-core.c | 156 |
1 files changed, 77 insertions, 79 deletions
diff --git a/drivers/staging/cx25821/cx25821-core.c b/drivers/staging/cx25821/cx25821-core.c index 9e9b8c3c931..90090f4b5e7 100644 --- a/drivers/staging/cx25821/cx25821-core.c +++ b/drivers/staging/cx25821/cx25821-core.c | |||
@@ -32,6 +32,7 @@ MODULE_AUTHOR("Shu Lin - Hiep Huynh"); | |||
32 | MODULE_LICENSE("GPL"); | 32 | MODULE_LICENSE("GPL"); |
33 | 33 | ||
34 | struct list_head cx25821_devlist; | 34 | struct list_head cx25821_devlist; |
35 | EXPORT_SYMBOL(cx25821_devlist); | ||
35 | 36 | ||
36 | static unsigned int debug; | 37 | static unsigned int debug; |
37 | module_param(debug, int, 0644); | 38 | module_param(debug, int, 0644); |
@@ -313,6 +314,7 @@ struct sram_channel cx25821_sram_channels[] = { | |||
313 | .irq_bit = 11, | 314 | .irq_bit = 11, |
314 | }, | 315 | }, |
315 | }; | 316 | }; |
317 | EXPORT_SYMBOL(cx25821_sram_channels); | ||
316 | 318 | ||
317 | struct sram_channel *channel0 = &cx25821_sram_channels[SRAM_CH00]; | 319 | struct sram_channel *channel0 = &cx25821_sram_channels[SRAM_CH00]; |
318 | struct sram_channel *channel1 = &cx25821_sram_channels[SRAM_CH01]; | 320 | struct sram_channel *channel1 = &cx25821_sram_channels[SRAM_CH01]; |
@@ -388,70 +390,74 @@ static void cx25821_registers_init(struct cx25821_dev *dev) | |||
388 | { | 390 | { |
389 | u32 tmp; | 391 | u32 tmp; |
390 | 392 | ||
391 | // enable RUN_RISC in Pecos | 393 | /* enable RUN_RISC in Pecos */ |
392 | cx_write(DEV_CNTRL2, 0x20); | 394 | cx_write(DEV_CNTRL2, 0x20); |
393 | 395 | ||
394 | // Set the master PCI interrupt masks to enable video, audio, MBIF, and GPIO interrupts | 396 | /* Set the master PCI interrupt masks to enable video, audio, MBIF, |
395 | // I2C interrupt masking is handled by the I2C objects themselves. | 397 | * and GPIO interrupts |
398 | * I2C interrupt masking is handled by the I2C objects themselves. */ | ||
396 | cx_write(PCI_INT_MSK, 0x2001FFFF); | 399 | cx_write(PCI_INT_MSK, 0x2001FFFF); |
397 | 400 | ||
398 | tmp = cx_read(RDR_TLCTL0); | 401 | tmp = cx_read(RDR_TLCTL0); |
399 | tmp &= ~FLD_CFG_RCB_CK_EN; // Clear the RCB_CK_EN bit | 402 | tmp &= ~FLD_CFG_RCB_CK_EN; /* Clear the RCB_CK_EN bit */ |
400 | cx_write(RDR_TLCTL0, tmp); | 403 | cx_write(RDR_TLCTL0, tmp); |
401 | 404 | ||
402 | // PLL-A setting for the Audio Master Clock | 405 | /* PLL-A setting for the Audio Master Clock */ |
403 | cx_write(PLL_A_INT_FRAC, 0x9807A58B); | 406 | cx_write(PLL_A_INT_FRAC, 0x9807A58B); |
404 | 407 | ||
405 | // PLL_A_POST = 0x1C, PLL_A_OUT_TO_PIN = 0x1 | 408 | /* PLL_A_POST = 0x1C, PLL_A_OUT_TO_PIN = 0x1 */ |
406 | cx_write(PLL_A_POST_STAT_BIST, 0x8000019C); | 409 | cx_write(PLL_A_POST_STAT_BIST, 0x8000019C); |
407 | 410 | ||
408 | // clear reset bit [31] | 411 | /* clear reset bit [31] */ |
409 | tmp = cx_read(PLL_A_INT_FRAC); | 412 | tmp = cx_read(PLL_A_INT_FRAC); |
410 | cx_write(PLL_A_INT_FRAC, tmp & 0x7FFFFFFF); | 413 | cx_write(PLL_A_INT_FRAC, tmp & 0x7FFFFFFF); |
411 | 414 | ||
412 | // PLL-B setting for Mobilygen Host Bus Interface | 415 | /* PLL-B setting for Mobilygen Host Bus Interface */ |
413 | cx_write(PLL_B_INT_FRAC, 0x9883A86F); | 416 | cx_write(PLL_B_INT_FRAC, 0x9883A86F); |
414 | 417 | ||
415 | // PLL_B_POST = 0xD, PLL_B_OUT_TO_PIN = 0x0 | 418 | /* PLL_B_POST = 0xD, PLL_B_OUT_TO_PIN = 0x0 */ |
416 | cx_write(PLL_B_POST_STAT_BIST, 0x8000018D); | 419 | cx_write(PLL_B_POST_STAT_BIST, 0x8000018D); |
417 | 420 | ||
418 | // clear reset bit [31] | 421 | /* clear reset bit [31] */ |
419 | tmp = cx_read(PLL_B_INT_FRAC); | 422 | tmp = cx_read(PLL_B_INT_FRAC); |
420 | cx_write(PLL_B_INT_FRAC, tmp & 0x7FFFFFFF); | 423 | cx_write(PLL_B_INT_FRAC, tmp & 0x7FFFFFFF); |
421 | 424 | ||
422 | // PLL-C setting for video upstream channel | 425 | /* PLL-C setting for video upstream channel */ |
423 | cx_write(PLL_C_INT_FRAC, 0x96A0EA3F); | 426 | cx_write(PLL_C_INT_FRAC, 0x96A0EA3F); |
424 | 427 | ||
425 | // PLL_C_POST = 0x3, PLL_C_OUT_TO_PIN = 0x0 | 428 | /* PLL_C_POST = 0x3, PLL_C_OUT_TO_PIN = 0x0 */ |
426 | cx_write(PLL_C_POST_STAT_BIST, 0x80000103); | 429 | cx_write(PLL_C_POST_STAT_BIST, 0x80000103); |
427 | 430 | ||
428 | // clear reset bit [31] | 431 | /* clear reset bit [31] */ |
429 | tmp = cx_read(PLL_C_INT_FRAC); | 432 | tmp = cx_read(PLL_C_INT_FRAC); |
430 | cx_write(PLL_C_INT_FRAC, tmp & 0x7FFFFFFF); | 433 | cx_write(PLL_C_INT_FRAC, tmp & 0x7FFFFFFF); |
431 | 434 | ||
432 | // PLL-D setting for audio upstream channel | 435 | /* PLL-D setting for audio upstream channel */ |
433 | cx_write(PLL_D_INT_FRAC, 0x98757F5B); | 436 | cx_write(PLL_D_INT_FRAC, 0x98757F5B); |
434 | 437 | ||
435 | // PLL_D_POST = 0x13, PLL_D_OUT_TO_PIN = 0x0 | 438 | /* PLL_D_POST = 0x13, PLL_D_OUT_TO_PIN = 0x0 */ |
436 | cx_write(PLL_D_POST_STAT_BIST, 0x80000113); | 439 | cx_write(PLL_D_POST_STAT_BIST, 0x80000113); |
437 | 440 | ||
438 | // clear reset bit [31] | 441 | /* clear reset bit [31] */ |
439 | tmp = cx_read(PLL_D_INT_FRAC); | 442 | tmp = cx_read(PLL_D_INT_FRAC); |
440 | cx_write(PLL_D_INT_FRAC, tmp & 0x7FFFFFFF); | 443 | cx_write(PLL_D_INT_FRAC, tmp & 0x7FFFFFFF); |
441 | 444 | ||
442 | // This selects the PLL C clock source for the video upstream channel I and J | 445 | /* This selects the PLL C clock source for the video upstream channel |
446 | * I and J */ | ||
443 | tmp = cx_read(VID_CH_CLK_SEL); | 447 | tmp = cx_read(VID_CH_CLK_SEL); |
444 | cx_write(VID_CH_CLK_SEL, (tmp & 0x00FFFFFF) | 0x24000000); | 448 | cx_write(VID_CH_CLK_SEL, (tmp & 0x00FFFFFF) | 0x24000000); |
445 | 449 | ||
446 | // 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for channel A-C | 450 | /* 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for |
447 | //select 656/VIP DST for downstream Channel A - C | 451 | * channel A-C |
452 | * select 656/VIP DST for downstream Channel A - C */ | ||
448 | tmp = cx_read(VID_CH_MODE_SEL); | 453 | tmp = cx_read(VID_CH_MODE_SEL); |
449 | //cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF); | 454 | /* cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF); */ |
450 | cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00); | 455 | cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00); |
451 | 456 | ||
452 | // enables 656 port I and J as output | 457 | /* enables 656 port I and J as output */ |
453 | tmp = cx_read(CLK_RST); | 458 | tmp = cx_read(CLK_RST); |
454 | tmp |= FLD_USE_ALT_PLL_REF; // use external ALT_PLL_REF pin as its reference clock instead | 459 | /* use external ALT_PLL_REF pin as its reference clock instead */ |
460 | tmp |= FLD_USE_ALT_PLL_REF; | ||
455 | cx_write(CLK_RST, tmp & ~(FLD_VID_I_CLK_NOE | FLD_VID_J_CLK_NOE)); | 461 | cx_write(CLK_RST, tmp & ~(FLD_VID_I_CLK_NOE | FLD_VID_J_CLK_NOE)); |
456 | 462 | ||
457 | mdelay(100); | 463 | mdelay(100); |
@@ -476,9 +482,8 @@ int cx25821_sram_channel_setup(struct cx25821_dev *dev, | |||
476 | cdt = ch->cdt; | 482 | cdt = ch->cdt; |
477 | lines = ch->fifo_size / bpl; | 483 | lines = ch->fifo_size / bpl; |
478 | 484 | ||
479 | if (lines > 4) { | 485 | if (lines > 4) |
480 | lines = 4; | 486 | lines = 4; |
481 | } | ||
482 | 487 | ||
483 | BUG_ON(lines < 2); | 488 | BUG_ON(lines < 2); |
484 | 489 | ||
@@ -494,16 +499,15 @@ int cx25821_sram_channel_setup(struct cx25821_dev *dev, | |||
494 | cx_write(cdt + 16 * i + 12, 0); | 499 | cx_write(cdt + 16 * i + 12, 0); |
495 | } | 500 | } |
496 | 501 | ||
497 | //init the first cdt buffer | 502 | /* init the first cdt buffer */ |
498 | for (i = 0; i < 128; i++) | 503 | for (i = 0; i < 128; i++) |
499 | cx_write(ch->fifo_start + 4 * i, i); | 504 | cx_write(ch->fifo_start + 4 * i, i); |
500 | 505 | ||
501 | /* write CMDS */ | 506 | /* write CMDS */ |
502 | if (ch->jumponly) { | 507 | if (ch->jumponly) |
503 | cx_write(ch->cmds_start + 0, 8); | 508 | cx_write(ch->cmds_start + 0, 8); |
504 | } else { | 509 | else |
505 | cx_write(ch->cmds_start + 0, risc); | 510 | cx_write(ch->cmds_start + 0, risc); |
506 | } | ||
507 | 511 | ||
508 | cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */ | 512 | cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */ |
509 | cx_write(ch->cmds_start + 8, cdt); | 513 | cx_write(ch->cmds_start + 8, cdt); |
@@ -526,6 +530,7 @@ int cx25821_sram_channel_setup(struct cx25821_dev *dev, | |||
526 | 530 | ||
527 | return 0; | 531 | return 0; |
528 | } | 532 | } |
533 | EXPORT_SYMBOL(cx25821_sram_channel_setup); | ||
529 | 534 | ||
530 | int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev, | 535 | int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev, |
531 | struct sram_channel *ch, | 536 | struct sram_channel *ch, |
@@ -546,9 +551,8 @@ int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev, | |||
546 | cdt = ch->cdt; | 551 | cdt = ch->cdt; |
547 | lines = ch->fifo_size / bpl; | 552 | lines = ch->fifo_size / bpl; |
548 | 553 | ||
549 | if (lines > 3) { | 554 | if (lines > 3) |
550 | lines = 3; //for AUDIO | 555 | lines = 3; /* for AUDIO */ |
551 | } | ||
552 | 556 | ||
553 | BUG_ON(lines < 2); | 557 | BUG_ON(lines < 2); |
554 | 558 | ||
@@ -565,25 +569,23 @@ int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev, | |||
565 | } | 569 | } |
566 | 570 | ||
567 | /* write CMDS */ | 571 | /* write CMDS */ |
568 | if (ch->jumponly) { | 572 | if (ch->jumponly) |
569 | cx_write(ch->cmds_start + 0, 8); | 573 | cx_write(ch->cmds_start + 0, 8); |
570 | } else { | 574 | else |
571 | cx_write(ch->cmds_start + 0, risc); | 575 | cx_write(ch->cmds_start + 0, risc); |
572 | } | ||
573 | 576 | ||
574 | cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */ | 577 | cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */ |
575 | cx_write(ch->cmds_start + 8, cdt); | 578 | cx_write(ch->cmds_start + 8, cdt); |
576 | cx_write(ch->cmds_start + 12, (lines * 16) >> 3); | 579 | cx_write(ch->cmds_start + 12, (lines * 16) >> 3); |
577 | cx_write(ch->cmds_start + 16, ch->ctrl_start); | 580 | cx_write(ch->cmds_start + 16, ch->ctrl_start); |
578 | 581 | ||
579 | //IQ size | 582 | /* IQ size */ |
580 | if (ch->jumponly) { | 583 | if (ch->jumponly) |
581 | cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2)); | 584 | cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2)); |
582 | } else { | 585 | else |
583 | cx_write(ch->cmds_start + 20, 64 >> 2); | 586 | cx_write(ch->cmds_start + 20, 64 >> 2); |
584 | } | ||
585 | 587 | ||
586 | //zero out | 588 | /* zero out */ |
587 | for (i = 24; i < 80; i += 4) | 589 | for (i = 24; i < 80; i += 4) |
588 | cx_write(ch->cmds_start + i, 0); | 590 | cx_write(ch->cmds_start + i, 0); |
589 | 591 | ||
@@ -595,6 +597,7 @@ int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev, | |||
595 | 597 | ||
596 | return 0; | 598 | return 0; |
597 | } | 599 | } |
600 | EXPORT_SYMBOL(cx25821_sram_channel_setup_audio); | ||
598 | 601 | ||
599 | void cx25821_sram_channel_dump(struct cx25821_dev *dev, struct sram_channel *ch) | 602 | void cx25821_sram_channel_dump(struct cx25821_dev *dev, struct sram_channel *ch) |
600 | { | 603 | { |
@@ -658,6 +661,7 @@ void cx25821_sram_channel_dump(struct cx25821_dev *dev, struct sram_channel *ch) | |||
658 | printk(KERN_WARNING " : cnt2_reg: 0x%08x\n", | 661 | printk(KERN_WARNING " : cnt2_reg: 0x%08x\n", |
659 | cx_read(ch->cnt2_reg)); | 662 | cx_read(ch->cnt2_reg)); |
660 | } | 663 | } |
664 | EXPORT_SYMBOL(cx25821_sram_channel_dump); | ||
661 | 665 | ||
662 | void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev, | 666 | void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev, |
663 | struct sram_channel *ch) | 667 | struct sram_channel *ch) |
@@ -731,7 +735,7 @@ void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev, | |||
731 | printk(KERN_WARNING "instruction %d = 0x%x\n", i, risc); | 735 | printk(KERN_WARNING "instruction %d = 0x%x\n", i, risc); |
732 | } | 736 | } |
733 | 737 | ||
734 | //read data from the first cdt buffer | 738 | /* read data from the first cdt buffer */ |
735 | risc = cx_read(AUD_A_CDT); | 739 | risc = cx_read(AUD_A_CDT); |
736 | printk(KERN_WARNING "\nread cdt loc=0x%x\n", risc); | 740 | printk(KERN_WARNING "\nread cdt loc=0x%x\n", risc); |
737 | for (i = 0; i < 8; i++) { | 741 | for (i = 0; i < 8; i++) { |
@@ -741,31 +745,32 @@ void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev, | |||
741 | printk(KERN_WARNING "\n\n"); | 745 | printk(KERN_WARNING "\n\n"); |
742 | 746 | ||
743 | value = cx_read(CLK_RST); | 747 | value = cx_read(CLK_RST); |
744 | CX25821_INFO(" CLK_RST = 0x%x \n\n", value); | 748 | CX25821_INFO(" CLK_RST = 0x%x\n\n", value); |
745 | 749 | ||
746 | value = cx_read(PLL_A_POST_STAT_BIST); | 750 | value = cx_read(PLL_A_POST_STAT_BIST); |
747 | CX25821_INFO(" PLL_A_POST_STAT_BIST = 0x%x \n\n", value); | 751 | CX25821_INFO(" PLL_A_POST_STAT_BIST = 0x%x\n\n", value); |
748 | value = cx_read(PLL_A_INT_FRAC); | 752 | value = cx_read(PLL_A_INT_FRAC); |
749 | CX25821_INFO(" PLL_A_INT_FRAC = 0x%x \n\n", value); | 753 | CX25821_INFO(" PLL_A_INT_FRAC = 0x%x\n\n", value); |
750 | 754 | ||
751 | value = cx_read(PLL_B_POST_STAT_BIST); | 755 | value = cx_read(PLL_B_POST_STAT_BIST); |
752 | CX25821_INFO(" PLL_B_POST_STAT_BIST = 0x%x \n\n", value); | 756 | CX25821_INFO(" PLL_B_POST_STAT_BIST = 0x%x\n\n", value); |
753 | value = cx_read(PLL_B_INT_FRAC); | 757 | value = cx_read(PLL_B_INT_FRAC); |
754 | CX25821_INFO(" PLL_B_INT_FRAC = 0x%x \n\n", value); | 758 | CX25821_INFO(" PLL_B_INT_FRAC = 0x%x\n\n", value); |
755 | 759 | ||
756 | value = cx_read(PLL_C_POST_STAT_BIST); | 760 | value = cx_read(PLL_C_POST_STAT_BIST); |
757 | CX25821_INFO(" PLL_C_POST_STAT_BIST = 0x%x \n\n", value); | 761 | CX25821_INFO(" PLL_C_POST_STAT_BIST = 0x%x\n\n", value); |
758 | value = cx_read(PLL_C_INT_FRAC); | 762 | value = cx_read(PLL_C_INT_FRAC); |
759 | CX25821_INFO(" PLL_C_INT_FRAC = 0x%x \n\n", value); | 763 | CX25821_INFO(" PLL_C_INT_FRAC = 0x%x\n\n", value); |
760 | 764 | ||
761 | value = cx_read(PLL_D_POST_STAT_BIST); | 765 | value = cx_read(PLL_D_POST_STAT_BIST); |
762 | CX25821_INFO(" PLL_D_POST_STAT_BIST = 0x%x \n\n", value); | 766 | CX25821_INFO(" PLL_D_POST_STAT_BIST = 0x%x\n\n", value); |
763 | value = cx_read(PLL_D_INT_FRAC); | 767 | value = cx_read(PLL_D_INT_FRAC); |
764 | CX25821_INFO(" PLL_D_INT_FRAC = 0x%x \n\n", value); | 768 | CX25821_INFO(" PLL_D_INT_FRAC = 0x%x\n\n", value); |
765 | 769 | ||
766 | value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp); | 770 | value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp); |
767 | CX25821_INFO(" AFE_AB_DIAG_CTRL (0x10900090) = 0x%x \n\n", value); | 771 | CX25821_INFO(" AFE_AB_DIAG_CTRL (0x10900090) = 0x%x\n\n", value); |
768 | } | 772 | } |
773 | EXPORT_SYMBOL(cx25821_sram_channel_dump_audio); | ||
769 | 774 | ||
770 | static void cx25821_shutdown(struct cx25821_dev *dev) | 775 | static void cx25821_shutdown(struct cx25821_dev *dev) |
771 | { | 776 | { |
@@ -835,8 +840,8 @@ static void cx25821_initialize(struct cx25821_dev *dev) | |||
835 | cx_write(AUD_E_INT_STAT, 0xffffffff); | 840 | cx_write(AUD_E_INT_STAT, 0xffffffff); |
836 | 841 | ||
837 | cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000); | 842 | cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000); |
838 | cx_write(PAD_CTRL, 0x12); //for I2C | 843 | cx_write(PAD_CTRL, 0x12); /* for I2C */ |
839 | cx25821_registers_init(dev); //init Pecos registers | 844 | cx25821_registers_init(dev); /* init Pecos registers */ |
840 | mdelay(100); | 845 | mdelay(100); |
841 | 846 | ||
842 | for (i = 0; i < VID_CHANNEL_NUM; i++) { | 847 | for (i = 0; i < VID_CHANNEL_NUM; i++) { |
@@ -847,7 +852,7 @@ static void cx25821_initialize(struct cx25821_dev *dev) | |||
847 | dev->use_cif_resolution[i] = FALSE; | 852 | dev->use_cif_resolution[i] = FALSE; |
848 | } | 853 | } |
849 | 854 | ||
850 | //Probably only affect Downstream | 855 | /* Probably only affect Downstream */ |
851 | for (i = VID_UPSTREAM_SRAM_CHANNEL_I; i <= VID_UPSTREAM_SRAM_CHANNEL_J; | 856 | for (i = VID_UPSTREAM_SRAM_CHANNEL_I; i <= VID_UPSTREAM_SRAM_CHANNEL_J; |
852 | i++) { | 857 | i++) { |
853 | cx25821_set_vip_mode(dev, &dev->sram_channels[i]); | 858 | cx25821_set_vip_mode(dev, &dev->sram_channels[i]); |
@@ -944,12 +949,11 @@ static int cx25821_dev_setup(struct cx25821_dev *dev) | |||
944 | dev->clk_freq = 28000000; | 949 | dev->clk_freq = 28000000; |
945 | dev->sram_channels = cx25821_sram_channels; | 950 | dev->sram_channels = cx25821_sram_channels; |
946 | 951 | ||
947 | if (dev->nr > 1) { | 952 | if (dev->nr > 1) |
948 | CX25821_INFO("dev->nr > 1!"); | 953 | CX25821_INFO("dev->nr > 1!"); |
949 | } | ||
950 | 954 | ||
951 | /* board config */ | 955 | /* board config */ |
952 | dev->board = 1; //card[dev->nr]; | 956 | dev->board = 1; /* card[dev->nr]; */ |
953 | dev->_max_num_decoders = MAX_DECODERS; | 957 | dev->_max_num_decoders = MAX_DECODERS; |
954 | 958 | ||
955 | dev->pci_bus = dev->pci->bus->number; | 959 | dev->pci_bus = dev->pci->bus->number; |
@@ -1007,8 +1011,8 @@ static int cx25821_dev_setup(struct cx25821_dev *dev) | |||
1007 | cx25821_initialize(dev); | 1011 | cx25821_initialize(dev); |
1008 | 1012 | ||
1009 | cx25821_i2c_register(&dev->i2c_bus[0]); | 1013 | cx25821_i2c_register(&dev->i2c_bus[0]); |
1010 | // cx25821_i2c_register(&dev->i2c_bus[1]); | 1014 | /* cx25821_i2c_register(&dev->i2c_bus[1]); |
1011 | // cx25821_i2c_register(&dev->i2c_bus[2]); | 1015 | * cx25821_i2c_register(&dev->i2c_bus[2]); */ |
1012 | 1016 | ||
1013 | CX25821_INFO("i2c register! bus->i2c_rc = %d\n", | 1017 | CX25821_INFO("i2c register! bus->i2c_rc = %d\n", |
1014 | dev->i2c_bus[0].i2c_rc); | 1018 | dev->i2c_bus[0].i2c_rc); |
@@ -1026,7 +1030,7 @@ static int cx25821_dev_setup(struct cx25821_dev *dev) | |||
1026 | 1030 | ||
1027 | for (i = VID_UPSTREAM_SRAM_CHANNEL_I; | 1031 | for (i = VID_UPSTREAM_SRAM_CHANNEL_I; |
1028 | i <= AUDIO_UPSTREAM_SRAM_CHANNEL_B; i++) { | 1032 | i <= AUDIO_UPSTREAM_SRAM_CHANNEL_B; i++) { |
1029 | //Since we don't have template8 for Audio Downstream | 1033 | /* Since we don't have template8 for Audio Downstream */ |
1030 | if (cx25821_video_register(dev, i, video_template[i - 1]) < 0) { | 1034 | if (cx25821_video_register(dev, i, video_template[i - 1]) < 0) { |
1031 | printk(KERN_ERR | 1035 | printk(KERN_ERR |
1032 | "%s() Failed to register analog video adapters for Upstream channel %d.\n", | 1036 | "%s() Failed to register analog video adapters for Upstream channel %d.\n", |
@@ -1034,7 +1038,7 @@ static int cx25821_dev_setup(struct cx25821_dev *dev) | |||
1034 | } | 1038 | } |
1035 | } | 1039 | } |
1036 | 1040 | ||
1037 | // register IOCTL device | 1041 | /* register IOCTL device */ |
1038 | dev->ioctl_dev = | 1042 | dev->ioctl_dev = |
1039 | cx25821_vdev_init(dev, dev->pci, video_template[VIDEO_IOCTL_CH], | 1043 | cx25821_vdev_init(dev, dev->pci, video_template[VIDEO_IOCTL_CH], |
1040 | "video"); | 1044 | "video"); |
@@ -1112,6 +1116,7 @@ void cx25821_dev_unregister(struct cx25821_dev *dev) | |||
1112 | cx25821_i2c_unregister(&dev->i2c_bus[0]); | 1116 | cx25821_i2c_unregister(&dev->i2c_bus[0]); |
1113 | cx25821_iounmap(dev); | 1117 | cx25821_iounmap(dev); |
1114 | } | 1118 | } |
1119 | EXPORT_SYMBOL(cx25821_dev_unregister); | ||
1115 | 1120 | ||
1116 | static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist, | 1121 | static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist, |
1117 | unsigned int offset, u32 sync_line, | 1122 | unsigned int offset, u32 sync_line, |
@@ -1122,9 +1127,8 @@ static __le32 *cx25821_risc_field(__le32 * rp, struct scatterlist *sglist, | |||
1122 | unsigned int line, todo; | 1127 | unsigned int line, todo; |
1123 | 1128 | ||
1124 | /* sync instruction */ | 1129 | /* sync instruction */ |
1125 | if (sync_line != NO_SYNC_LINE) { | 1130 | if (sync_line != NO_SYNC_LINE) |
1126 | *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); | 1131 | *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); |
1127 | } | ||
1128 | 1132 | ||
1129 | /* scan lines */ | 1133 | /* scan lines */ |
1130 | sg = sglist; | 1134 | sg = sglist; |
@@ -1299,7 +1303,8 @@ int cx25821_risc_databuffer_audio(struct pci_dev *pci, | |||
1299 | instructions = 1 + (bpl * lines) / PAGE_SIZE + lines; | 1303 | instructions = 1 + (bpl * lines) / PAGE_SIZE + lines; |
1300 | instructions += 1; | 1304 | instructions += 1; |
1301 | 1305 | ||
1302 | if ((rc = btcx_riscmem_alloc(pci, risc, instructions * 12)) < 0) | 1306 | rc = btcx_riscmem_alloc(pci, risc, instructions * 12); |
1307 | if (rc < 0) | ||
1303 | return rc; | 1308 | return rc; |
1304 | 1309 | ||
1305 | /* write risc instructions */ | 1310 | /* write risc instructions */ |
@@ -1312,6 +1317,7 @@ int cx25821_risc_databuffer_audio(struct pci_dev *pci, | |||
1312 | BUG_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size); | 1317 | BUG_ON((risc->jmp - risc->cpu + 2) * sizeof(*risc->cpu) > risc->size); |
1313 | return 0; | 1318 | return 0; |
1314 | } | 1319 | } |
1320 | EXPORT_SYMBOL(cx25821_risc_databuffer_audio); | ||
1315 | 1321 | ||
1316 | int cx25821_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, | 1322 | int cx25821_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc, |
1317 | u32 reg, u32 mask, u32 value) | 1323 | u32 reg, u32 mask, u32 value) |
@@ -1375,7 +1381,7 @@ static irqreturn_t cx25821_irq(int irq, void *dev_id) | |||
1375 | } | 1381 | } |
1376 | } | 1382 | } |
1377 | 1383 | ||
1378 | out: | 1384 | out: |
1379 | return IRQ_RETVAL(handled); | 1385 | return IRQ_RETVAL(handled); |
1380 | } | 1386 | } |
1381 | 1387 | ||
@@ -1399,12 +1405,14 @@ void cx25821_print_irqbits(char *name, char *tag, char **strings, | |||
1399 | } | 1405 | } |
1400 | printk("\n"); | 1406 | printk("\n"); |
1401 | } | 1407 | } |
1408 | EXPORT_SYMBOL(cx25821_print_irqbits); | ||
1402 | 1409 | ||
1403 | struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci) | 1410 | struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci) |
1404 | { | 1411 | { |
1405 | struct cx25821_dev *dev = pci_get_drvdata(pci); | 1412 | struct cx25821_dev *dev = pci_get_drvdata(pci); |
1406 | return dev; | 1413 | return dev; |
1407 | } | 1414 | } |
1415 | EXPORT_SYMBOL(cx25821_dev_get); | ||
1408 | 1416 | ||
1409 | static int __devinit cx25821_initdev(struct pci_dev *pci_dev, | 1417 | static int __devinit cx25821_initdev(struct pci_dev *pci_dev, |
1410 | const struct pci_device_id *pci_id) | 1418 | const struct pci_device_id *pci_id) |
@@ -1430,7 +1438,7 @@ static int __devinit cx25821_initdev(struct pci_dev *pci_dev, | |||
1430 | goto fail_unregister_device; | 1438 | goto fail_unregister_device; |
1431 | } | 1439 | } |
1432 | 1440 | ||
1433 | printk(KERN_INFO "cx25821 Athena pci enable ! \n"); | 1441 | printk(KERN_INFO "cx25821 Athena pci enable !\n"); |
1434 | 1442 | ||
1435 | if (cx25821_dev_setup(dev) < 0) { | 1443 | if (cx25821_dev_setup(dev) < 0) { |
1436 | err = -EINVAL; | 1444 | err = -EINVAL; |
@@ -1464,14 +1472,14 @@ static int __devinit cx25821_initdev(struct pci_dev *pci_dev, | |||
1464 | 1472 | ||
1465 | return 0; | 1473 | return 0; |
1466 | 1474 | ||
1467 | fail_irq: | 1475 | fail_irq: |
1468 | printk(KERN_INFO "cx25821 cx25821_initdev() can't get IRQ ! \n"); | 1476 | printk(KERN_INFO "cx25821 cx25821_initdev() can't get IRQ !\n"); |
1469 | cx25821_dev_unregister(dev); | 1477 | cx25821_dev_unregister(dev); |
1470 | 1478 | ||
1471 | fail_unregister_device: | 1479 | fail_unregister_device: |
1472 | v4l2_device_unregister(&dev->v4l2_dev); | 1480 | v4l2_device_unregister(&dev->v4l2_dev); |
1473 | 1481 | ||
1474 | fail_free: | 1482 | fail_free: |
1475 | kfree(dev); | 1483 | kfree(dev); |
1476 | return err; | 1484 | return err; |
1477 | } | 1485 | } |
@@ -1536,16 +1544,6 @@ static void __exit cx25821_fini(void) | |||
1536 | pci_unregister_driver(&cx25821_pci_driver); | 1544 | pci_unregister_driver(&cx25821_pci_driver); |
1537 | } | 1545 | } |
1538 | 1546 | ||
1539 | EXPORT_SYMBOL(cx25821_devlist); | ||
1540 | EXPORT_SYMBOL(cx25821_sram_channels); | ||
1541 | EXPORT_SYMBOL(cx25821_print_irqbits); | ||
1542 | EXPORT_SYMBOL(cx25821_dev_get); | ||
1543 | EXPORT_SYMBOL(cx25821_dev_unregister); | ||
1544 | EXPORT_SYMBOL(cx25821_sram_channel_setup); | ||
1545 | EXPORT_SYMBOL(cx25821_sram_channel_dump); | ||
1546 | EXPORT_SYMBOL(cx25821_sram_channel_setup_audio); | ||
1547 | EXPORT_SYMBOL(cx25821_sram_channel_dump_audio); | ||
1548 | EXPORT_SYMBOL(cx25821_risc_databuffer_audio); | ||
1549 | EXPORT_SYMBOL(cx25821_set_gpiopin_direction); | 1547 | EXPORT_SYMBOL(cx25821_set_gpiopin_direction); |
1550 | 1548 | ||
1551 | module_init(cx25821_init); | 1549 | module_init(cx25821_init); |