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authorAlessandro Ghedini <al3xbio@gmail.com>2010-02-15 06:25:22 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-03-04 10:59:01 -0500
commit71508ee489e09dc206ea3f62542dd3bd11c0e201 (patch)
treedd10d8525a82e610e0eff34851a3ddcc10f0c989 /drivers/staging
parent49c9b5c7bd6cf87ccc1d820dec8d23ba3ae53f64 (diff)
Staging: wlan-ng: fix most of the style issues in hfa384x.h
This patch fixes all the errors and the majority of the warnings found with checkpatch.pl script in hfa384x.h, following Gábor Stefanik hints Signed-off-by: Alessandro Ghedini <al3xbio@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging')
-rw-r--r--drivers/staging/wlan-ng/hfa384x.h182
1 files changed, 107 insertions, 75 deletions
diff --git a/drivers/staging/wlan-ng/hfa384x.h b/drivers/staging/wlan-ng/hfa384x.h
index 46cce8159e5..5984d74dfce 100644
--- a/drivers/staging/wlan-ng/hfa384x.h
+++ b/drivers/staging/wlan-ng/hfa384x.h
@@ -61,17 +61,17 @@
61#include <linux/if_ether.h> 61#include <linux/if_ether.h>
62 62
63/*--- Mins & Maxs -----------------------------------*/ 63/*--- Mins & Maxs -----------------------------------*/
64#define HFA384x_PORTID_MAX ((u16)7) 64#define HFA384x_PORTID_MAX ((u16)7)
65#define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1)) 65#define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1))
66#define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */ 66#define HFA384x_PDR_LEN_MAX ((u16)512) /* in bytes, from EK */
67#define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */ 67#define HFA384x_PDA_RECS_MAX ((u16)200) /* a guess */
68#define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK */ 68#define HFA384x_PDA_LEN_MAX ((u16)1024) /* in bytes, from EK*/
69#define HFA384x_SCANRESULT_MAX ((u16)31) 69#define HFA384x_SCANRESULT_MAX ((u16)31)
70#define HFA384x_HSCANRESULT_MAX ((u16)31) 70#define HFA384x_HSCANRESULT_MAX ((u16)31)
71#define HFA384x_CHINFORESULT_MAX ((u16)16) 71#define HFA384x_CHINFORESULT_MAX ((u16)16)
72#define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */ 72#define HFA384x_RID_GUESSING_MAXLEN 2048 /* I'm not really sure */
73#define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN 73#define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN
74#define HFA384x_USB_RWMEM_MAXLEN 2048 74#define HFA384x_USB_RWMEM_MAXLEN 2048
75 75
76/*--- Support Constants -----------------------------*/ 76/*--- Support Constants -----------------------------*/
77#define HFA384x_PORTTYPE_IBSS ((u16)0) 77#define HFA384x_PORTTYPE_IBSS ((u16)0)
@@ -114,9 +114,9 @@
114#define HFA384x_ADDR_AUX_OFF_MASK (0x007f) 114#define HFA384x_ADDR_AUX_OFF_MASK (0x007f)
115 115
116/* Make a 32-bit flat address from AUX format 16-bit page and offset */ 116/* Make a 32-bit flat address from AUX format 16-bit page and offset */
117#define HFA384x_ADDR_AUX_MKFLAT(p, o) \ 117#define HFA384x_ADDR_AUX_MKFLAT(p, o) \
118 (((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \ 118 ((((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \
119 ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK)) 119 ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK)))
120 120
121/* Make CMD format offset and page from a 32-bit flat address */ 121/* Make CMD format offset and page from a 32-bit flat address */
122#define HFA384x_ADDR_CMD_MKPAGE(f) \ 122#define HFA384x_ADDR_CMD_MKPAGE(f) \
@@ -135,12 +135,21 @@
135#define HFA384x_DLSTATE_FLASHENABLED 2 135#define HFA384x_DLSTATE_FLASHENABLED 2
136 136
137/*--- Register Field Masks --------------------------*/ 137/*--- Register Field Masks --------------------------*/
138#define HFA384x_CMD_AINFO ((u16)(BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9) | BIT(8))) 138#define HFA384x_CMD_AINFO ((u16)(BIT(14) | BIT(13) \
139#define HFA384x_CMD_MACPORT ((u16)(BIT(10) | BIT(9) | BIT(8))) 139 | BIT(12) | BIT(11) \
140 | BIT(10) | BIT(9) \
141 | BIT(8)))
142#define HFA384x_CMD_MACPORT ((u16)(BIT(10) | BIT(9) | \
143 BIT(8)))
140#define HFA384x_CMD_PROGMODE ((u16)(BIT(9) | BIT(8))) 144#define HFA384x_CMD_PROGMODE ((u16)(BIT(9) | BIT(8)))
141#define HFA384x_CMD_CMDCODE ((u16)(BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0))) 145#define HFA384x_CMD_CMDCODE ((u16)(BIT(5) | BIT(4) | \
146 BIT(3) | BIT(2) | \
147 BIT(1) | BIT(0)))
142 148
143#define HFA384x_STATUS_RESULT ((u16)(BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9) | BIT(8))) 149#define HFA384x_STATUS_RESULT ((u16)(BIT(14) | BIT(13) \
150 | BIT(12) | BIT(11) \
151 | BIT(10) | BIT(9) \
152 | BIT(8)))
144 153
145/*--- Command Code Constants --------------------------*/ 154/*--- Command Code Constants --------------------------*/
146/*--- Controller Commands --------------------------*/ 155/*--- Controller Commands --------------------------*/
@@ -244,8 +253,10 @@ Information RID Lengths: MAC Information
244 This is the length of JUST the DATA part of the RID (does not 253 This is the length of JUST the DATA part of the RID (does not
245 include the len or code fields) 254 include the len or code fields)
246--------------------------------------------------------------------*/ 255--------------------------------------------------------------------*/
247#define HFA384x_RID_DBMCOMMSQUALITY_LEN ((u16)sizeof(hfa384x_dbmcommsquality_t)) 256#define HFA384x_RID_DBMCOMMSQUALITY_LEN \
248#define HFA384x_RID_JOINREQUEST_LEN ((u16)sizeof(hfa384x_JoinRequest_data_t)) 257 ((u16) sizeof(hfa384x_dbmcommsquality_t))
258#define HFA384x_RID_JOINREQUEST_LEN \
259 ((u16)sizeof(hfa384x_JoinRequest_data_t))
249 260
250/*-------------------------------------------------------------------- 261/*--------------------------------------------------------------------
251Information RIDs: Modem Information 262Information RIDs: Modem Information
@@ -322,9 +333,11 @@ PD Record codes
322 333
323/*--- Register Test/Get/Set Field macros ------------------------*/ 334/*--- Register Test/Get/Set Field macros ------------------------*/
324 335
325#define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8)) 336#define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8))
326#define HFA384x_CMD_MACPORT_SET(value) ((u16)HFA384x_CMD_AINFO_SET(value)) 337#define HFA384x_CMD_MACPORT_SET(value) \
327#define HFA384x_CMD_PROGMODE_SET(value) ((u16)HFA384x_CMD_AINFO_SET((u16)value)) 338 ((u16)HFA384x_CMD_AINFO_SET(value))
339#define HFA384x_CMD_PROGMODE_SET(value) \
340 ((u16)HFA384x_CMD_AINFO_SET((u16)value))
328#define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value)) 341#define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value))
329 342
330#define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8) 343#define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8)
@@ -402,7 +415,7 @@ typedef struct hfa384x_authenticateStation_data {
402/*-- Configuration Record: WPAData (data portion only) --*/ 415/*-- Configuration Record: WPAData (data portion only) --*/
403typedef struct hfa384x_WPAData { 416typedef struct hfa384x_WPAData {
404 u16 datalen; 417 u16 datalen;
405 u8 data[0]; // max 80 418 u8 data[0]; /* max 80 */
406} __attribute__ ((packed)) hfa384x_WPAData_t; 419} __attribute__ ((packed)) hfa384x_WPAData_t;
407 420
408/*-------------------------------------------------------------------- 421/*--------------------------------------------------------------------
@@ -479,7 +492,8 @@ Communication Frames: Field Masks for Transmit Frames
479#define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1)) 492#define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1))
480#define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0)) 493#define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0))
481/*-- Transmit Control Field --*/ 494/*-- Transmit Control Field --*/
482#define HFA384x_TX_MACPORT ((u16)(BIT(10) | BIT(9) | BIT(8))) 495#define HFA384x_TX_MACPORT ((u16)(BIT(10) | \
496 BIT(9) | BIT(8)))
483#define HFA384x_TX_STRUCTYPE ((u16)(BIT(4) | BIT(3))) 497#define HFA384x_TX_STRUCTYPE ((u16)(BIT(4) | BIT(3)))
484#define HFA384x_TX_TXEX ((u16)BIT(2)) 498#define HFA384x_TX_TXEX ((u16)BIT(2))
485#define HFA384x_TX_TXOK ((u16)BIT(1)) 499#define HFA384x_TX_TXOK ((u16)BIT(1))
@@ -496,7 +510,8 @@ Communication Frames: Test/Get/Set Field Values for Transmit Frames
496#define HFA384x_TX_SET(v, m, s) ((((u16)(v))<<((u16)(s)))&((u16)(m))) 510#define HFA384x_TX_SET(v, m, s) ((((u16)(v))<<((u16)(s)))&((u16)(m)))
497 511
498#define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8) 512#define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8)
499#define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, HFA384x_TX_STRUCTYPE, 3) 513#define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \
514 HFA384x_TX_STRUCTYPE, 3)
500#define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2) 515#define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2)
501#define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1) 516#define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1)
502/*-------------------------------------------------------------------- 517/*--------------------------------------------------------------------
@@ -534,13 +549,17 @@ Communication Frames: Field Masks for Receive Frames
534--------------------------------------------------------------------*/ 549--------------------------------------------------------------------*/
535 550
536/*-- Status Fields --*/ 551/*-- Status Fields --*/
537#define HFA384x_RXSTATUS_MACPORT ((u16)(BIT(10) | BIT(9) | BIT(8))) 552#define HFA384x_RXSTATUS_MACPORT ((u16)(BIT(10) | \
553 BIT(9) | \
554 BIT(8)))
538#define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0)) 555#define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0))
539/*-------------------------------------------------------------------- 556/*--------------------------------------------------------------------
540Communication Frames: Test/Get/Set Field Values for Receive Frames 557Communication Frames: Test/Get/Set Field Values for Receive Frames
541--------------------------------------------------------------------*/ 558--------------------------------------------------------------------*/
542#define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) & HFA384x_RXSTATUS_MACPORT) >> 8)) 559#define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) \
543#define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) & HFA384x_RXSTATUS_FCSERR)) 560 & HFA384x_RXSTATUS_MACPORT) >> 8))
561#define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) \
562 & HFA384x_RXSTATUS_FCSERR))
544/*-------------------------------------------------------------------- 563/*--------------------------------------------------------------------
545 FRAME STRUCTURES: Information Types and Information Frame Structures 564 FRAME STRUCTURES: Information Types and Information Frame Structures
546---------------------------------------------------------------------- 565----------------------------------------------------------------------
@@ -1133,7 +1152,7 @@ struct hfa384x;
1133 1152
1134typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *); 1153typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *);
1135 1154
1136typedef void (*ctlx_usercb_t) (struct hfa384x * hw, 1155typedef void (*ctlx_usercb_t) (struct hfa384x *hw,
1137 void *ctlxresult, void *usercb_data); 1156 void *ctlxresult, void *usercb_data);
1138 1157
1139typedef struct hfa384x_usbctlx { 1158typedef struct hfa384x_usbctlx {
@@ -1174,14 +1193,14 @@ typedef struct hfa484x_metacmd {
1174} hfa384x_metacmd_t; 1193} hfa384x_metacmd_t;
1175 1194
1176#define MAX_GRP_ADDR 32 1195#define MAX_GRP_ADDR 32
1177#define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */ 1196#define WLAN_COMMENT_MAX 80 /* Max. length of user comment string. */
1178 1197
1179#define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */ 1198#define WLAN_AUTH_MAX 60 /* Max. # of authenticated stations. */
1180#define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */ 1199#define WLAN_ACCESS_MAX 60 /* Max. # of stations in an access list. */
1181#define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */ 1200#define WLAN_ACCESS_NONE 0 /* No stations may be authenticated. */
1182#define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */ 1201#define WLAN_ACCESS_ALL 1 /* All stations may be authenticated. */
1183#define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */ 1202#define WLAN_ACCESS_ALLOW 2 /* Authenticate only "allowed" stations. */
1184#define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */ 1203#define WLAN_ACCESS_DENY 3 /* Do not authenticate "denied" stations. */
1185 1204
1186/* XXX These are going away ASAP */ 1205/* XXX These are going away ASAP */
1187typedef struct prism2sta_authlist { 1206typedef struct prism2sta_authlist {
@@ -1294,10 +1313,23 @@ typedef struct hfa384x {
1294 hfa384x_caplevel_t cap_sup_ap; 1313 hfa384x_caplevel_t cap_sup_ap;
1295 1314
1296 /* Actor compatibility ranges */ 1315 /* Actor compatibility ranges */
1297 hfa384x_caplevel_t cap_act_pri_cfi; /* pri f/w to controller interface */ 1316 hfa384x_caplevel_t cap_act_pri_cfi; /*
1298 hfa384x_caplevel_t cap_act_sta_cfi; /* sta f/w to controller interface */ 1317 * pri f/w to controller
1318 * interface
1319 */
1320
1321 hfa384x_caplevel_t cap_act_sta_cfi; /*
1322 * sta f/w to controller
1323 * interface
1324 */
1325
1299 hfa384x_caplevel_t cap_act_sta_mfi; /* sta f/w to modem interface */ 1326 hfa384x_caplevel_t cap_act_sta_mfi; /* sta f/w to modem interface */
1300 hfa384x_caplevel_t cap_act_ap_cfi; /* ap f/w to controller interface */ 1327
1328 hfa384x_caplevel_t cap_act_ap_cfi; /*
1329 * ap f/w to controller
1330 * interface
1331 */
1332
1301 hfa384x_caplevel_t cap_act_ap_mfi; /* ap f/w to modem interface */ 1333 hfa384x_caplevel_t cap_act_ap_mfi; /* ap f/w to modem interface */
1302 1334
1303 u32 psusercount; /* Power save user count. */ 1335 u32 psusercount; /* Power save user count. */
@@ -1320,25 +1352,25 @@ typedef struct hfa384x {
1320 1352
1321} hfa384x_t; 1353} hfa384x_t;
1322 1354
1323void hfa384x_create(hfa384x_t * hw, struct usb_device *usb); 1355void hfa384x_create(hfa384x_t *hw, struct usb_device *usb);
1324void hfa384x_destroy(hfa384x_t * hw); 1356void hfa384x_destroy(hfa384x_t *hw);
1325 1357
1326int 1358int
1327hfa384x_corereset(hfa384x_t * hw, int holdtime, int settletime, int genesis); 1359hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis);
1328int hfa384x_drvr_commtallies(hfa384x_t * hw); 1360int hfa384x_drvr_commtallies(hfa384x_t *hw);
1329int hfa384x_drvr_disable(hfa384x_t * hw, u16 macport); 1361int hfa384x_drvr_disable(hfa384x_t *hw, u16 macport);
1330int hfa384x_drvr_enable(hfa384x_t * hw, u16 macport); 1362int hfa384x_drvr_enable(hfa384x_t *hw, u16 macport);
1331int hfa384x_drvr_flashdl_enable(hfa384x_t * hw); 1363int hfa384x_drvr_flashdl_enable(hfa384x_t *hw);
1332int hfa384x_drvr_flashdl_disable(hfa384x_t * hw); 1364int hfa384x_drvr_flashdl_disable(hfa384x_t *hw);
1333int hfa384x_drvr_flashdl_write(hfa384x_t * hw, u32 daddr, void *buf, u32 len); 1365int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len);
1334int hfa384x_drvr_getconfig(hfa384x_t * hw, u16 rid, void *buf, u16 len); 1366int hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len);
1335int hfa384x_drvr_ramdl_enable(hfa384x_t * hw, u32 exeaddr); 1367int hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr);
1336int hfa384x_drvr_ramdl_disable(hfa384x_t * hw); 1368int hfa384x_drvr_ramdl_disable(hfa384x_t *hw);
1337int hfa384x_drvr_ramdl_write(hfa384x_t * hw, u32 daddr, void *buf, u32 len); 1369int hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len);
1338int hfa384x_drvr_readpda(hfa384x_t * hw, void *buf, unsigned int len); 1370int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len);
1339int hfa384x_drvr_setconfig(hfa384x_t * hw, u16 rid, void *buf, u16 len); 1371int hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len);
1340 1372
1341static inline int hfa384x_drvr_getconfig16(hfa384x_t * hw, u16 rid, void *val) 1373static inline int hfa384x_drvr_getconfig16(hfa384x_t *hw, u16 rid, void *val)
1342{ 1374{
1343 int result = 0; 1375 int result = 0;
1344 result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16)); 1376 result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16));
@@ -1347,46 +1379,46 @@ static inline int hfa384x_drvr_getconfig16(hfa384x_t * hw, u16 rid, void *val)
1347 return result; 1379 return result;
1348} 1380}
1349 1381
1350static inline int hfa384x_drvr_setconfig16(hfa384x_t * hw, u16 rid, u16 val) 1382static inline int hfa384x_drvr_setconfig16(hfa384x_t *hw, u16 rid, u16 val)
1351{ 1383{
1352 u16 value = cpu_to_le16(val); 1384 u16 value = cpu_to_le16(val);
1353 return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value)); 1385 return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value));
1354} 1386}
1355 1387
1356int 1388int
1357hfa384x_drvr_getconfig_async(hfa384x_t * hw, 1389hfa384x_drvr_getconfig_async(hfa384x_t *hw,
1358 u16 rid, ctlx_usercb_t usercb, void *usercb_data); 1390 u16 rid, ctlx_usercb_t usercb, void *usercb_data);
1359 1391
1360int 1392int
1361hfa384x_drvr_setconfig_async(hfa384x_t * hw, 1393hfa384x_drvr_setconfig_async(hfa384x_t *hw,
1362 u16 rid, 1394 u16 rid,
1363 void *buf, 1395 void *buf,
1364 u16 len, ctlx_usercb_t usercb, void *usercb_data); 1396 u16 len, ctlx_usercb_t usercb, void *usercb_data);
1365 1397
1366static inline int 1398static inline int
1367hfa384x_drvr_setconfig16_async(hfa384x_t * hw, u16 rid, u16 val) 1399hfa384x_drvr_setconfig16_async(hfa384x_t *hw, u16 rid, u16 val)
1368{ 1400{
1369 u16 value = cpu_to_le16(val); 1401 u16 value = cpu_to_le16(val);
1370 return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), 1402 return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value),
1371 NULL, NULL); 1403 NULL, NULL);
1372} 1404}
1373 1405
1374int hfa384x_drvr_start(hfa384x_t * hw); 1406int hfa384x_drvr_start(hfa384x_t *hw);
1375int hfa384x_drvr_stop(hfa384x_t * hw); 1407int hfa384x_drvr_stop(hfa384x_t *hw);
1376int 1408int
1377hfa384x_drvr_txframe(hfa384x_t * hw, struct sk_buff *skb, 1409hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb,
1378 p80211_hdr_t * p80211_hdr, p80211_metawep_t * p80211_wep); 1410 p80211_hdr_t *p80211_hdr, p80211_metawep_t *p80211_wep);
1379void hfa384x_tx_timeout(wlandevice_t * wlandev); 1411void hfa384x_tx_timeout(wlandevice_t *wlandev);
1380 1412
1381int hfa384x_cmd_initialize(hfa384x_t * hw); 1413int hfa384x_cmd_initialize(hfa384x_t *hw);
1382int hfa384x_cmd_enable(hfa384x_t * hw, u16 macport); 1414int hfa384x_cmd_enable(hfa384x_t *hw, u16 macport);
1383int hfa384x_cmd_disable(hfa384x_t * hw, u16 macport); 1415int hfa384x_cmd_disable(hfa384x_t *hw, u16 macport);
1384int hfa384x_cmd_allocate(hfa384x_t * hw, u16 len); 1416int hfa384x_cmd_allocate(hfa384x_t *hw, u16 len);
1385int hfa384x_cmd_monitor(hfa384x_t * hw, u16 enable); 1417int hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable);
1386int 1418int
1387hfa384x_cmd_download(hfa384x_t * hw, 1419hfa384x_cmd_download(hfa384x_t *hw,
1388 u16 mode, u16 lowaddr, u16 highaddr, u16 codelen); 1420 u16 mode, u16 lowaddr, u16 highaddr, u16 codelen);
1389 1421
1390#endif /* __KERNEL__ */ 1422#endif /*__KERNEL__ */
1391 1423
1392#endif /* _HFA384x_H */ 1424#endif /*_HFA384x_H */