[PATCH] acpi_pcihp: Add support for _HPX

This patch adds support for _HPX (Hot Plug Parameter Extensions)
defined in ACPI3.0a spec.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Cc: Kristen Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

4 files changed, 262 insertions, 36 deletions

diff --git a/drivers/pci/hotplug/acpi_pcihp.c b/drivers/pci/hotplug/acpi_pcihp.c
index afac5c37325..51cb9f817c2 100644
--- a/drivers/pci/hotplug/acpi_pcihp.c
+++ b/drivers/pci/hotplug/acpi_pcihp.c
@@ -47,6 +47,171 @@
 
 static int debug_acpi;
 
+static acpi_status
+decode_type0_hpx_record(union acpi_object *record, struct hotplug_params *hpx)
+{
+        int i;
+        union acpi_object *fields = record->package.elements;
+        u32 revision = fields[1].integer.value;
+
+        switch (revision) {
+        case 1:
+                if (record->package.count != 6)
+                        return AE_ERROR;
+                for (i = 2; i < 6; i++)
+                        if (fields[i].type != ACPI_TYPE_INTEGER)
+                                return AE_ERROR;
+                hpx->t0 = &hpx->type0_data;
+                hpx->t0->revision        = revision;
+                hpx->t0->cache_line_size = fields[2].integer.value;
+                hpx->t0->latency_timer   = fields[3].integer.value;
+                hpx->t0->enable_serr     = fields[4].integer.value;
+                hpx->t0->enable_perr     = fields[5].integer.value;
+                break;
+        default:
+                printk(KERN_WARNING
+                       "%s: Type 0 Revision %d record not supported\n",
+                       __FUNCTION__, revision);
+                return AE_ERROR;
+        }
+        return AE_OK;
+}
+
+static acpi_status
+decode_type1_hpx_record(union acpi_object *record, struct hotplug_params *hpx)
+{
+        int i;
+        union acpi_object *fields = record->package.elements;
+        u32 revision = fields[1].integer.value;
+
+        switch (revision) {
+        case 1:
+                if (record->package.count != 5)
+                        return AE_ERROR;
+                for (i = 2; i < 5; i++)
+                        if (fields[i].type != ACPI_TYPE_INTEGER)
+                                return AE_ERROR;
+                hpx->t1 = &hpx->type1_data;
+                hpx->t1->revision      = revision;
+                hpx->t1->max_mem_read  = fields[2].integer.value;
+                hpx->t1->avg_max_split = fields[3].integer.value;
+                hpx->t1->tot_max_split = fields[4].integer.value;
+                break;
+        default:
+                printk(KERN_WARNING
+                       "%s: Type 1 Revision %d record not supported\n",
+                       __FUNCTION__, revision);
+                return AE_ERROR;
+        }
+        return AE_OK;
+}
+
+static acpi_status
+decode_type2_hpx_record(union acpi_object *record, struct hotplug_params *hpx)
+{
+        int i;
+        union acpi_object *fields = record->package.elements;
+        u32 revision = fields[1].integer.value;
+
+        switch (revision) {
+        case 1:
+                if (record->package.count != 18)
+                        return AE_ERROR;
+                for (i = 2; i < 18; i++)
+                        if (fields[i].type != ACPI_TYPE_INTEGER)
+                                return AE_ERROR;
+                hpx->t2 = &hpx->type2_data;
+                hpx->t2->revision      = revision;
+                hpx->t2->unc_err_mask_and      = fields[2].integer.value;
+                hpx->t2->unc_err_mask_or       = fields[3].integer.value;
+                hpx->t2->unc_err_sever_and     = fields[4].integer.value;
+                hpx->t2->unc_err_sever_or      = fields[5].integer.value;
+                hpx->t2->cor_err_mask_and      = fields[6].integer.value;
+                hpx->t2->cor_err_mask_or       = fields[7].integer.value;
+                hpx->t2->adv_err_cap_and       = fields[8].integer.value;
+                hpx->t2->adv_err_cap_or        = fields[9].integer.value;
+                hpx->t2->pci_exp_devctl_and    = fields[10].integer.value;
+                hpx->t2->pci_exp_devctl_or     = fields[11].integer.value;
+                hpx->t2->pci_exp_lnkctl_and    = fields[12].integer.value;
+                hpx->t2->pci_exp_lnkctl_or     = fields[13].integer.value;
+                hpx->t2->sec_unc_err_sever_and = fields[14].integer.value;
+                hpx->t2->sec_unc_err_sever_or  = fields[15].integer.value;
+                hpx->t2->sec_unc_err_mask_and  = fields[16].integer.value;
+                hpx->t2->sec_unc_err_mask_or   = fields[17].integer.value;
+                break;
+        default:
+                printk(KERN_WARNING
+                       "%s: Type 2 Revision %d record not supported\n",
+                       __FUNCTION__, revision);
+                return AE_ERROR;
+        }
+        return AE_OK;
+}
+
+static acpi_status
+acpi_run_hpx(acpi_handle handle, struct hotplug_params *hpx)
+{
+        acpi_status status;
+        struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
+        union acpi_object *package, *record, *fields;
+        u32 type;
+        int i;
+
+        /* Clear the return buffer with zeros */
+        memset(hpx, 0, sizeof(struct hotplug_params));
+
+        status = acpi_evaluate_object(handle, "_HPX", NULL, &buffer);
+        if (ACPI_FAILURE(status))
+                return status;
+
+        package = (union acpi_object *)buffer.pointer;
+        if (package->type != ACPI_TYPE_PACKAGE) {
+                status = AE_ERROR;
+                goto exit;
+        }
+
+        for (i = 0; i < package->package.count; i++) {
+                record = &package->package.elements[i];
+                if (record->type != ACPI_TYPE_PACKAGE) {
+                        status = AE_ERROR;
+                        goto exit;
+                }
+
+                fields = record->package.elements;
+                if (fields[0].type != ACPI_TYPE_INTEGER ||
+                    fields[1].type != ACPI_TYPE_INTEGER) {
+                        status = AE_ERROR;
+                        goto exit;
+                }
+
+                type = fields[0].integer.value;
+                switch (type) {
+                case 0:
+                        status = decode_type0_hpx_record(record, hpx);
+                        if (ACPI_FAILURE(status))
+                                goto exit;
+                        break;
+                case 1:
+                        status = decode_type1_hpx_record(record, hpx);
+                        if (ACPI_FAILURE(status))
+                                goto exit;
+                        break;
+                case 2:
+                        status = decode_type2_hpx_record(record, hpx);
+                        if (ACPI_FAILURE(status))
+                                goto exit;
+                        break;
+                default:
+                        printk(KERN_ERR "%s: Type %d record not supported\n",
+                               __FUNCTION__, type);
+                        status = AE_ERROR;
+                        goto exit;
+                }
+        }
+ exit:
+        kfree(buffer.pointer);
+        return status;
+}
 
 static acpi_status
 acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
@@ -60,6 +225,9 @@ acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
 
         acpi_get_name(handle, ACPI_FULL_PATHNAME, &string);
 
+        /* Clear the return buffer with zeros */
+        memset(hpp, 0, sizeof(struct hotplug_params));
+
         /* get _hpp */
         status = acpi_evaluate_object(handle, METHOD_NAME__HPP, NULL, &ret_buf);
         switch (status) {
@@ -108,15 +276,16 @@ acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp)
                 }
         }
 
-        hpp->cache_line_size = nui[0];
-        hpp->latency_timer = nui[1];
-        hpp->enable_serr = nui[2];
-        hpp->enable_perr = nui[3];
+        hpp->t0 = &hpp->type0_data;
+        hpp->t0->cache_line_size = nui[0];
+        hpp->t0->latency_timer = nui[1];
+        hpp->t0->enable_serr = nui[2];
+        hpp->t0->enable_perr = nui[3];
 
-        pr_debug("  _HPP: cache_line_size=0x%x\n", hpp->cache_line_size);
-        pr_debug("  _HPP: latency timer  =0x%x\n", hpp->latency_timer);
-        pr_debug("  _HPP: enable SERR    =0x%x\n", hpp->enable_serr);
-        pr_debug("  _HPP: enable PERR    =0x%x\n", hpp->enable_perr);
+        pr_debug("  _HPP: cache_line_size=0x%x\n", hpp->t0->cache_line_size);
+        pr_debug("  _HPP: latency timer  =0x%x\n", hpp->t0->latency_timer);
+        pr_debug("  _HPP: enable SERR    =0x%x\n", hpp->t0->enable_serr);
+        pr_debug("  _HPP: enable PERR    =0x%x\n", hpp->t0->enable_perr);
 
 free_and_return:
         kfree(string.pointer);
@@ -188,6 +357,9 @@ acpi_status acpi_get_hp_params_from_firmware(struct pci_bus *bus,
          * this pci dev. If we don't find any _HPP, use hardcoded defaults
          */
         while (handle) {
+                status = acpi_run_hpx(handle, hpp);
+                if (ACPI_SUCCESS(status))
+                        break;
                 status = acpi_run_hpp(handle, hpp);
                 if (ACPI_SUCCESS(status))
                         break;
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 4b0988e9380..d370f999782 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -287,12 +287,18 @@ static void decode_hpp(struct acpiphp_bridge *bridge)
         acpi_status status;
 
         status = acpi_get_hp_params_from_firmware(bridge->pci_bus, &bridge->hpp);
-        if (ACPI_FAILURE(status)) {
+        if (ACPI_FAILURE(status) ||
+            !bridge->hpp.t0 || (bridge->hpp.t0->revision > 1)) {
                 /* use default numbers */
-                bridge->hpp.cache_line_size = 0x10;
-                bridge->hpp.latency_timer = 0x40;
-                bridge->hpp.enable_serr = 0;
-                bridge->hpp.enable_perr = 0;
+                printk(KERN_WARNING
+                       "%s: Could not get hotplug parameters. Use defaults\n",
+                       __FUNCTION__);
+                bridge->hpp.t0 = &bridge->hpp.type0_data;
+                bridge->hpp.t0->revision = 0;
+                bridge->hpp.t0->cache_line_size = 0x10;
+                bridge->hpp.t0->latency_timer = 0x40;
+                bridge->hpp.t0->enable_serr = 0;
+                bridge->hpp.t0->enable_perr = 0;
         }
 }
 
@@ -1206,16 +1212,17 @@ static void program_hpp(struct pci_dev *dev, struct acpiphp_bridge *bridge)
                         (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
                         (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
                 return;
+
         pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
-                        bridge->hpp.cache_line_size);
+                        bridge->hpp.t0->cache_line_size);
         pci_write_config_byte(dev, PCI_LATENCY_TIMER,
-                        bridge->hpp.latency_timer);
+                        bridge->hpp.t0->latency_timer);
         pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
-        if (bridge->hpp.enable_serr)
+        if (bridge->hpp.t0->enable_serr)
                 pci_cmd |= PCI_COMMAND_SERR;
         else
                 pci_cmd &= ~PCI_COMMAND_SERR;
-        if (bridge->hpp.enable_perr)
+        if (bridge->hpp.t0->enable_perr)
                 pci_cmd |= PCI_COMMAND_PARITY;
         else
                 pci_cmd &= ~PCI_COMMAND_PARITY;
@@ -1224,13 +1231,13 @@ static void program_hpp(struct pci_dev *dev, struct acpiphp_bridge *bridge)
         /* Program bridge control value and child devices */
         if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
                 pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
-                                bridge->hpp.latency_timer);
+                                bridge->hpp.t0->latency_timer);
                 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
-                if (bridge->hpp.enable_serr)
+                if (bridge->hpp.t0->enable_serr)
                         pci_bctl |= PCI_BRIDGE_CTL_SERR;
                 else
                         pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
-                if (bridge->hpp.enable_perr)
+                if (bridge->hpp.t0->enable_perr)
                         pci_bctl |= PCI_BRIDGE_CTL_PARITY;
                 else
                         pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;
diff --git a/drivers/pci/hotplug/pci_hotplug.h b/drivers/pci/hotplug/pci_hotplug.h
index 6913ace70e9..e929b7c1142 100644
--- a/drivers/pci/hotplug/pci_hotplug.h
+++ b/drivers/pci/hotplug/pci_hotplug.h
@@ -176,11 +176,51 @@ extern int pci_hp_change_slot_info	(struct hotplug_slot *slot,
                                          struct hotplug_slot_info *info);
 extern struct subsystem pci_hotplug_slots_subsys;
 
+/* PCI Setting Record (Type 0) */
+struct hpp_type0 {
+        u32 revision;
+        u8  cache_line_size;
+        u8  latency_timer;
+        u8  enable_serr;
+        u8  enable_perr;
+};
+
+/* PCI-X Setting Record (Type 1) */
+struct hpp_type1 {
+        u32 revision;
+        u8  max_mem_read;
+        u8  avg_max_split;
+        u16 tot_max_split;
+};
+
+/* PCI Express Setting Record (Type 2) */
+struct hpp_type2 {
+        u32 revision;
+        u32 unc_err_mask_and;
+        u32 unc_err_mask_or;
+        u32 unc_err_sever_and;
+        u32 unc_err_sever_or;
+        u32 cor_err_mask_and;
+        u32 cor_err_mask_or;
+        u32 adv_err_cap_and;
+        u32 adv_err_cap_or;
+        u16 pci_exp_devctl_and;
+        u16 pci_exp_devctl_or;
+        u16 pci_exp_lnkctl_and;
+        u16 pci_exp_lnkctl_or;
+        u32 sec_unc_err_sever_and;
+        u32 sec_unc_err_sever_or;
+        u32 sec_unc_err_mask_and;
+        u32 sec_unc_err_mask_or;
+};
+
 struct hotplug_params {
-        u8 cache_line_size;
-        u8 latency_timer;
-        u8 enable_serr;
-        u8 enable_perr;
+        struct hpp_type0 *t0;           /* Type0: NULL if not available */
+        struct hpp_type1 *t1;           /* Type1: NULL if not available */
+        struct hpp_type2 *t2;           /* Type2: NULL if not available */
+        struct hpp_type0 type0_data;
+        struct hpp_type1 type1_data;
+        struct hpp_type2 type2_data;
 };
 
 #ifdef CONFIG_ACPI
diff --git a/drivers/pci/hotplug/shpchp_pci.c b/drivers/pci/hotplug/shpchp_pci.c
index 257adc23399..0a6b25ef194 100644
--- a/drivers/pci/hotplug/shpchp_pci.c
+++ b/drivers/pci/hotplug/shpchp_pci.c
@@ -47,21 +47,28 @@ static void program_fw_provided_values(struct pci_dev *dev)
                 return;
 
         /* use default values if we can't get them from firmware */
-        if (get_hp_params_from_firmware(dev, &hpp)) {
-                hpp.cache_line_size = 8;
-                hpp.latency_timer = 0x40;
-                hpp.enable_serr = 0;
-                hpp.enable_perr = 0;
+        if (get_hp_params_from_firmware(dev, &hpp) ||
+            !hpp.t0 || (hpp.t0->revision > 1)) {
+                printk(KERN_WARNING
+                       "%s: Could not get hotplug parameters. Use defaults\n",
+                       __FUNCTION__);
+                hpp.t0 = &hpp.type0_data;
+                hpp.t0->revision = 0;
+                hpp.t0->cache_line_size = 8;
+                hpp.t0->latency_timer = 0x40;
+                hpp.t0->enable_serr = 0;
+                hpp.t0->enable_perr = 0;
         }
 
-        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp.cache_line_size);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.latency_timer);
+        pci_write_config_byte(dev,
+                              PCI_CACHE_LINE_SIZE, hpp.t0->cache_line_size);
+        pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.t0->latency_timer);
         pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
-        if (hpp.enable_serr)
+        if (hpp.t0->enable_serr)
                 pci_cmd |= PCI_COMMAND_SERR;
         else
                 pci_cmd &= ~PCI_COMMAND_SERR;
-        if (hpp.enable_perr)
+        if (hpp.t0->enable_perr)
                 pci_cmd |= PCI_COMMAND_PARITY;
         else
                 pci_cmd &= ~PCI_COMMAND_PARITY;
@@ -70,13 +77,13 @@ static void program_fw_provided_values(struct pci_dev *dev)
         /* Program bridge control value and child devices */
         if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
                 pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
-                                hpp.latency_timer);
+                                hpp.t0->latency_timer);
                 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
-                if (hpp.enable_serr)
+                if (hpp.t0->enable_serr)
                         pci_bctl |= PCI_BRIDGE_CTL_SERR;
                 else
                         pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
-                if (hpp.enable_perr)
+                if (hpp.t0->enable_perr)
                         pci_bctl |= PCI_BRIDGE_CTL_PARITY;
                 else
                         pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;