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authorYu Zhao <yu.zhao@intel.com>2008-11-21 13:40:40 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-01-07 14:13:02 -0500
commit0b400c7ed4d027e02f6231afa39852a2d48e6f25 (patch)
tree976e87d95aefac36b14c8407ff3ba9aa34f0cd03 /drivers/pci
parentbc5f5a8277cb353161454b6704b3186ebcf3a2a3 (diff)
PCI: export __pci_read_base()
Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci.h9
-rw-r--r--drivers/pci/probe.c20
2 files changed, 18 insertions, 11 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 392388468f6..d881fde8bb8 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -162,6 +162,15 @@ struct pci_slot_attribute {
162}; 162};
163#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 163#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
164 164
165enum pci_bar_type {
166 pci_bar_unknown, /* Standard PCI BAR probe */
167 pci_bar_io, /* An io port BAR */
168 pci_bar_mem32, /* A 32-bit memory BAR */
169 pci_bar_mem64, /* A 64-bit memory BAR */
170};
171
172extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
173 struct resource *res, unsigned int reg);
165extern void pci_enable_ari(struct pci_dev *dev); 174extern void pci_enable_ari(struct pci_dev *dev);
166/** 175/**
167 * pci_ari_enabled - query ARI forwarding status 176 * pci_ari_enabled - query ARI forwarding status
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index e1cf5d50ed4..5372d3699e0 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -135,13 +135,6 @@ static u64 pci_size(u64 base, u64 maxbase, u64 mask)
135 return size; 135 return size;
136} 136}
137 137
138enum pci_bar_type {
139 pci_bar_unknown, /* Standard PCI BAR probe */
140 pci_bar_io, /* An io port BAR */
141 pci_bar_mem32, /* A 32-bit memory BAR */
142 pci_bar_mem64, /* A 64-bit memory BAR */
143};
144
145static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar) 138static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
146{ 139{
147 if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { 140 if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
@@ -156,11 +149,16 @@ static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
156 return pci_bar_mem32; 149 return pci_bar_mem32;
157} 150}
158 151
159/* 152/**
160 * If the type is not unknown, we assume that the lowest bit is 'enable'. 153 * pci_read_base - read a PCI BAR
161 * Returns 1 if the BAR was 64-bit and 0 if it was 32-bit. 154 * @dev: the PCI device
155 * @type: type of the BAR
156 * @res: resource buffer to be filled in
157 * @pos: BAR position in the config space
158 *
159 * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
162 */ 160 */
163static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 161int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
164 struct resource *res, unsigned int pos) 162 struct resource *res, unsigned int pos)
165{ 163{
166 u32 l, sz, mask; 164 u32 l, sz, mask;