diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-01-25 09:52:48 -0500 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-01-25 09:52:48 -0500 |
| commit | f1487fcbe47cd2bc0c71e8598bf9eb6a82dec544 (patch) | |
| tree | 4c7abed6047538c13dd024a8ecffd15f31b4609a /drivers/pci/pcie/aspm.c | |
| parent | 84549d239ab9bb2e3a85c6efcf0e6478a38b4260 (diff) | |
| parent | 40aa7030e5213a43e9e0554fd7f95534ea310bf3 (diff) | |
Merge branch 'for-2.6.33' into for-2.6.34
Diffstat (limited to 'drivers/pci/pcie/aspm.c')
| -rw-r--r-- | drivers/pci/pcie/aspm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 5a01fc7fbf0..be53d98fa38 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * File: drivers/pci/pcie/aspm.c | 2 | * File: drivers/pci/pcie/aspm.c |
| 3 | * Enabling PCIE link L0s/L1 state and Clock Power Management | 3 | * Enabling PCIe link L0s/L1 state and Clock Power Management |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2007 Intel | 5 | * Copyright (C) 2007 Intel |
| 6 | * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) | 6 | * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) |
| @@ -499,7 +499,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev) | |||
| 499 | int pos; | 499 | int pos; |
| 500 | u32 reg32; | 500 | u32 reg32; |
| 501 | /* | 501 | /* |
| 502 | * Some functions in a slot might not all be PCIE functions, | 502 | * Some functions in a slot might not all be PCIe functions, |
| 503 | * very strange. Disable ASPM for the whole slot | 503 | * very strange. Disable ASPM for the whole slot |
| 504 | */ | 504 | */ |
| 505 | list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { | 505 | list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { |