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authorGrant Grundler <grundler@parisc-linux.org>2006-05-11 02:31:31 -0400
committerKyle McMartin <kyle@hera.kernel.org>2006-06-27 19:28:34 -0400
commit40d78de1aced7e0f3ce112698d847adcc643efdf (patch)
tree74d06a5cf453da3dd414e6ea5578d6e94e389df8 /drivers/parisc
parent3fd3a74f45c935f7d6d5c2fb48f06324b18826b7 (diff)
[PARISC] Fix gcc 4.1 warnings in sba_iommu.c
Clean up gcc 4.1 warnings noted by Joel Soete. Kyle McMartin gets kudos for pointing out the issues. Matthew Wilcox noticed sba_iommu was using open coded versions of (read|write)X. Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Matthew Wilcox <willy@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'drivers/parisc')
-rw-r--r--drivers/parisc/sba_iommu.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c
index 278f325021e..49b61755119 100644
--- a/drivers/parisc/sba_iommu.c
+++ b/drivers/parisc/sba_iommu.c
@@ -316,10 +316,10 @@ static int reserve_sba_gart = 1;
316** 316**
317** Superdome (in particular, REO) allows only 64-bit CSR accesses. 317** Superdome (in particular, REO) allows only 64-bit CSR accesses.
318*/ 318*/
319#define READ_REG32(addr) le32_to_cpu(__raw_readl(addr)) 319#define READ_REG32(addr) readl(addr)
320#define READ_REG64(addr) le64_to_cpu(__raw_readq(addr)) 320#define READ_REG64(addr) readq(addr)
321#define WRITE_REG32(val, addr) __raw_writel(cpu_to_le32(val), addr) 321#define WRITE_REG32(val, addr) writel((val), (addr))
322#define WRITE_REG64(val, addr) __raw_writeq(cpu_to_le64(val), addr) 322#define WRITE_REG64(val, addr) writeq((val), (addr))
323 323
324#ifdef CONFIG_64BIT 324#ifdef CONFIG_64BIT
325#define READ_REG(addr) READ_REG64(addr) 325#define READ_REG(addr) READ_REG64(addr)
@@ -1427,7 +1427,7 @@ sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
1427 iov_order = get_order(iova_space_size >> (IOVP_SHIFT - PAGE_SHIFT)); 1427 iov_order = get_order(iova_space_size >> (IOVP_SHIFT - PAGE_SHIFT));
1428 ioc->pdir_size = (iova_space_size / IOVP_SIZE) * sizeof(u64); 1428 ioc->pdir_size = (iova_space_size / IOVP_SIZE) * sizeof(u64);
1429 1429
1430 DBG_INIT("%s() hpa 0x%lx IOV %dMB (%d bits)\n", 1430 DBG_INIT("%s() hpa 0x%p IOV %dMB (%d bits)\n",
1431 __FUNCTION__, ioc->ioc_hpa, iova_space_size >> 20, 1431 __FUNCTION__, ioc->ioc_hpa, iova_space_size >> 20,
1432 iov_order + PAGE_SHIFT); 1432 iov_order + PAGE_SHIFT);
1433 1433
@@ -1764,7 +1764,7 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
1764 1764
1765 sba_dev->num_ioc = num_ioc; 1765 sba_dev->num_ioc = num_ioc;
1766 for (i = 0; i < num_ioc; i++) { 1766 for (i = 0; i < num_ioc; i++) {
1767 unsigned long ioc_hpa = sba_dev->ioc[i].ioc_hpa; 1767 void __iomem *ioc_hpa = sba_dev->ioc[i].ioc_hpa;
1768 unsigned int j; 1768 unsigned int j;
1769 1769
1770 for (j=0; j < sizeof(u64) * ROPES_PER_IOC; j+=sizeof(u64)) { 1770 for (j=0; j < sizeof(u64) * ROPES_PER_IOC; j+=sizeof(u64)) {
@@ -1776,7 +1776,8 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
1776 * Improves netperf UDP_STREAM by ~10% for bcm5701. 1776 * Improves netperf UDP_STREAM by ~10% for bcm5701.
1777 */ 1777 */
1778 if (IS_PLUTO(sba_dev->iodc)) { 1778 if (IS_PLUTO(sba_dev->iodc)) {
1779 unsigned long rope_cfg, cfg_val; 1779 void __iomem *rope_cfg;
1780 unsigned long cfg_val;
1780 1781
1781 rope_cfg = ioc_hpa + IOC_ROPE0_CFG + j; 1782 rope_cfg = ioc_hpa + IOC_ROPE0_CFG + j;
1782 cfg_val = READ_REG(rope_cfg); 1783 cfg_val = READ_REG(rope_cfg);