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authorRafał Miłecki <zajec5@gmail.com>2010-11-28 06:59:43 -0500
committerJohn W. Linville <linville@tuxdriver.com>2010-12-02 14:37:01 -0500
commit161d540c8ef31e5adbced3248873024476e2c26f (patch)
treeb63c86466602830cf289de2bafb1918f67426b8f /drivers/net
parent40277cabfee7c8ef45055155895dcbef0f983c63 (diff)
b43: N-PHY: implement very basic TX power control management
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/wireless/b43/phy_n.c159
-rw-r--r--drivers/net/wireless/b43/phy_n.h2
2 files changed, 153 insertions, 8 deletions
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 9769483156e..8690551f087 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -67,6 +67,8 @@ enum b43_nphy_rf_sequence {
67 B43_RFSEQ_UPDATE_GAINU, 67 B43_RFSEQ_UPDATE_GAINU,
68}; 68};
69 69
70static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev,
71 bool enable);
70static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd, 72static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
71 u8 *events, u8 *delays, u8 length); 73 u8 *events, u8 *delays, u8 length);
72static void b43_nphy_force_rf_sequence(struct b43_wldev *dev, 74static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
@@ -145,9 +147,153 @@ static void b43_chantab_phy_upload(struct b43_wldev *dev,
145 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6); 147 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
146} 148}
147 149
150/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlEnable */
151static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
152{
153 struct b43_phy_n *nphy = dev->phy.n;
154 u8 i;
155 u16 tmp;
156
157 if (nphy->hang_avoid)
158 b43_nphy_stay_in_carrier_search(dev, 1);
159
160 nphy->txpwrctrl = enable;
161 if (!enable) {
162 if (dev->phy.rev >= 3)
163 ; /* TODO */
164
165 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840);
166 for (i = 0; i < 84; i++)
167 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
168
169 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6C40);
170 for (i = 0; i < 84; i++)
171 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
172
173 tmp = B43_NPHY_TXPCTL_CMD_COEFF | B43_NPHY_TXPCTL_CMD_HWPCTLEN;
174 if (dev->phy.rev >= 3)
175 tmp |= B43_NPHY_TXPCTL_CMD_PCTLEN;
176 b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, ~tmp);
177
178 if (dev->phy.rev >= 3) {
179 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
180 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
181 } else {
182 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
183 }
184
185 if (dev->phy.rev == 2)
186 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
187 ~B43_NPHY_BPHY_CTL3_SCALE, 0x53);
188 else if (dev->phy.rev < 2)
189 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
190 ~B43_NPHY_BPHY_CTL3_SCALE, 0x5A);
191
192 if (dev->phy.rev < 2 && 0)
193 ; /* TODO */
194 } else {
195 b43err(dev->wl, "enabling tx pwr ctrl not implemented yet\n");
196 }
197
198 if (nphy->hang_avoid)
199 b43_nphy_stay_in_carrier_search(dev, 0);
200}
201
202/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrFix */
148static void b43_nphy_tx_power_fix(struct b43_wldev *dev) 203static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
149{ 204{
150 //TODO 205 struct b43_phy_n *nphy = dev->phy.n;
206 struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
207
208 u8 txpi[2], bbmult, i;
209 u16 tmp, radio_gain, dac_gain;
210 u16 freq = dev->phy.channel_freq;
211 u32 txgain;
212 /* u32 gaintbl; rev3+ */
213
214 if (nphy->hang_avoid)
215 b43_nphy_stay_in_carrier_search(dev, 1);
216
217 if (dev->phy.rev >= 3) {
218 txpi[0] = 40;
219 txpi[1] = 40;
220 } else if (sprom->revision < 4) {
221 txpi[0] = 72;
222 txpi[1] = 72;
223 } else {
224 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
225 txpi[0] = sprom->txpid2g[0];
226 txpi[1] = sprom->txpid2g[1];
227 } else if (freq >= 4900 && freq < 5100) {
228 txpi[0] = sprom->txpid5gl[0];
229 txpi[1] = sprom->txpid5gl[1];
230 } else if (freq >= 5100 && freq < 5500) {
231 txpi[0] = sprom->txpid5g[0];
232 txpi[1] = sprom->txpid5g[1];
233 } else if (freq >= 5500) {
234 txpi[0] = sprom->txpid5gh[0];
235 txpi[1] = sprom->txpid5gh[1];
236 } else {
237 txpi[0] = 91;
238 txpi[1] = 91;
239 }
240 }
241
242 /*
243 for (i = 0; i < 2; i++) {
244 nphy->txpwrindex[i].index_internal = txpi[i];
245 nphy->txpwrindex[i].index_internal_save = txpi[i];
246 }
247 */
248
249 for (i = 0; i < 2; i++) {
250 if (dev->phy.rev >= 3) {
251 /* TODO */
252 radio_gain = (txgain >> 16) & 0x1FFFF;
253 } else {
254 txgain = b43_ntab_tx_gain_rev0_1_2[txpi[i]];
255 radio_gain = (txgain >> 16) & 0x1FFF;
256 }
257
258 dac_gain = (txgain >> 8) & 0x3F;
259 bbmult = txgain & 0xFF;
260
261 if (dev->phy.rev >= 3) {
262 if (i == 0)
263 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
264 else
265 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
266 } else {
267 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
268 }
269
270 if (i == 0)
271 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN1, dac_gain);
272 else
273 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain);
274
275 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D10 + i);
276 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, radio_gain);
277
278 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
279 tmp = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
280
281 if (i == 0)
282 tmp = (tmp & 0x00FF) | (bbmult << 8);
283 else
284 tmp = (tmp & 0xFF00) | bbmult;
285
286 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
287 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, tmp);
288
289 if (0)
290 ; /* TODO */
291 }
292
293 b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT);
294
295 if (nphy->hang_avoid)
296 b43_nphy_stay_in_carrier_search(dev, 0);
151} 297}
152 298
153 299
@@ -2351,7 +2497,7 @@ static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2351 struct nphy_txgains target; 2497 struct nphy_txgains target;
2352 const u32 *table = NULL; 2498 const u32 *table = NULL;
2353 2499
2354 if (nphy->txpwrctrl == 0) { 2500 if (!nphy->txpwrctrl) {
2355 int i; 2501 int i;
2356 2502
2357 if (nphy->hang_avoid) 2503 if (nphy->hang_avoid)
@@ -3260,9 +3406,8 @@ int b43_phy_initn(struct b43_wldev *dev)
3260 b43_nphy_bphy_init(dev); 3406 b43_nphy_bphy_init(dev);
3261 3407
3262 tx_pwr_state = nphy->txpwrctrl; 3408 tx_pwr_state = nphy->txpwrctrl;
3263 /* TODO N PHY TX power control with argument 0 3409 b43_nphy_tx_power_ctrl(dev, false);
3264 (turning off power control) */ 3410 b43_nphy_tx_power_fix(dev);
3265 /* TODO Fix the TX Power Settings */
3266 /* TODO N PHY TX Power Control Idle TSSI */ 3411 /* TODO N PHY TX Power Control Idle TSSI */
3267 /* TODO N PHY TX Power Control Setup */ 3412 /* TODO N PHY TX Power Control Setup */
3268 3413
@@ -3333,7 +3478,7 @@ int b43_phy_initn(struct b43_wldev *dev)
3333 } 3478 }
3334 3479
3335 b43_nphy_tx_pwr_ctrl_coef_setup(dev); 3480 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
3336 /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */ 3481 b43_nphy_tx_power_ctrl(dev, tx_pwr_state);
3337 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015); 3482 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
3338 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320); 3483 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
3339 if (phy->rev >= 3 && phy->rev <= 6) 3484 if (phy->rev >= 3 && phy->rev <= 6)
@@ -3384,7 +3529,7 @@ static void b43_nphy_channel_setup(struct b43_wldev *dev,
3384 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840); 3529 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3385 } 3530 }
3386 3531
3387 if (nphy->txpwrctrl) 3532 if (!nphy->txpwrctrl)
3388 b43_nphy_tx_power_fix(dev); 3533 b43_nphy_tx_power_fix(dev);
3389 3534
3390 if (dev->phy.rev < 3) 3535 if (dev->phy.rev < 3)
diff --git a/drivers/net/wireless/b43/phy_n.h b/drivers/net/wireless/b43/phy_n.h
index c144e59a708..001e841f118 100644
--- a/drivers/net/wireless/b43/phy_n.h
+++ b/drivers/net/wireless/b43/phy_n.h
@@ -782,7 +782,7 @@ struct b43_phy_n {
782 u16 mphase_txcal_numcmds; 782 u16 mphase_txcal_numcmds;
783 u16 mphase_txcal_bestcoeffs[11]; 783 u16 mphase_txcal_bestcoeffs[11];
784 784
785 u8 txpwrctrl; 785 bool txpwrctrl;
786 u16 txcal_bbmult; 786 u16 txcal_bbmult;
787 u16 txiqlocal_bestc[11]; 787 u16 txiqlocal_bestc[11];
788 bool txiqlocal_coeffsvalid; 788 bool txiqlocal_coeffsvalid;