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authorKalle Valo <kalle.valo@nokia.com>2009-04-29 16:33:31 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-05-06 15:14:54 -0400
commit2f01a1f58889fbfeb68b1bc1b52e4197f3333490 (patch)
tree949cf33c4e3dcdf7abcf95c9bda4d8372da04f97 /drivers/net/wireless/wl12xx/acx.h
parentd53d9e67b55f6a9fc3f836c5c392eb41ce5676f4 (diff)
wl12xx: add driver
wl12xx is a driver for TI wl1251 802.11 chipset designed for embedded devices, supporting both SDIO and SPI busses. Currently the driver supports only SPI. Adding support 1253 (the 5 GHz version) should be relatively easy. More information here: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?contentId=4711&navigationId=12494&templateId=6123 (Collapsed original sequence of pre-merge patches into single commit for initial merge. -- JWL) Signed-off-by: Kalle Valo <kalle.valo@nokia.com> Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/wl12xx/acx.h')
-rw-r--r--drivers/net/wireless/wl12xx/acx.h1245
1 files changed, 1245 insertions, 0 deletions
diff --git a/drivers/net/wireless/wl12xx/acx.h b/drivers/net/wireless/wl12xx/acx.h
new file mode 100644
index 00000000000..fb2d2340993
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/acx.h
@@ -0,0 +1,1245 @@
1/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_ACX_H__
26#define __WL12XX_ACX_H__
27
28#include "wl12xx.h"
29
30/* Target's information element */
31struct acx_header {
32 u16 id;
33 u16 len;
34};
35
36struct acx_error_counter {
37 struct acx_header header;
38
39 /* The number of PLCP errors since the last time this */
40 /* information element was interrogated. This field is */
41 /* automatically cleared when it is interrogated.*/
42 u32 PLCP_error;
43
44 /* The number of FCS errors since the last time this */
45 /* information element was interrogated. This field is */
46 /* automatically cleared when it is interrogated.*/
47 u32 FCS_error;
48
49 /* The number of MPDUs without PLCP header errors received*/
50 /* since the last time this information element was interrogated. */
51 /* This field is automatically cleared when it is interrogated.*/
52 u32 valid_frame;
53
54 /* the number of missed sequence numbers in the squentially */
55 /* values of frames seq numbers */
56 u32 seq_num_miss;
57} __attribute__ ((packed));
58
59struct acx_revision {
60 struct acx_header header;
61
62 /*
63 * The WiLink firmware version, an ASCII string x.x.x.x,
64 * that uniquely identifies the current firmware.
65 * The left most digit is incremented each time a
66 * significant change is made to the firmware, such as
67 * code redesign or new platform support.
68 * The second digit is incremented when major enhancements
69 * are added or major fixes are made.
70 * The third digit is incremented for each GA release.
71 * The fourth digit is incremented for each build.
72 * The first two digits identify a firmware release version,
73 * in other words, a unique set of features.
74 * The first three digits identify a GA release.
75 */
76 char fw_version[20];
77
78 /*
79 * This 4 byte field specifies the WiLink hardware version.
80 * bits 0 - 15: Reserved.
81 * bits 16 - 23: Version ID - The WiLink version ID
82 * (1 = first spin, 2 = second spin, and so on).
83 * bits 24 - 31: Chip ID - The WiLink chip ID.
84 */
85 u32 hw_version;
86} __attribute__ ((packed));
87
88enum wl12xx_psm_mode {
89 /* Active mode */
90 WL12XX_PSM_CAM = 0,
91
92 /* Power save mode */
93 WL12XX_PSM_PS = 1,
94
95 /* Extreme low power */
96 WL12XX_PSM_ELP = 2,
97};
98
99struct acx_sleep_auth {
100 struct acx_header header;
101
102 /* The sleep level authorization of the device. */
103 /* 0 - Always active*/
104 /* 1 - Power down mode: light / fast sleep*/
105 /* 2 - ELP mode: Deep / Max sleep*/
106 u8 sleep_auth;
107 u8 padding[3];
108} __attribute__ ((packed));
109
110#define TIM_ELE_ID 5
111#define PARTIAL_VBM_MAX 251
112
113struct tim {
114 u8 identity;
115 u8 length;
116 u8 dtim_count;
117 u8 dtim_period;
118 u8 bitmap_ctrl;
119 u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */
120} __attribute__ ((packed));
121
122/* Virtual Bit Map update */
123struct vbm_update_request {
124 __le16 len;
125 u8 padding[2];
126 struct tim tim;
127} __attribute__ ((packed));
128
129enum {
130 HOSTIF_PCI_MASTER_HOST_INDIRECT,
131 HOSTIF_PCI_MASTER_HOST_DIRECT,
132 HOSTIF_SLAVE,
133 HOSTIF_PKT_RING,
134 HOSTIF_DONTCARE = 0xFF
135};
136
137#define DEFAULT_UCAST_PRIORITY 0
138#define DEFAULT_RX_Q_PRIORITY 0
139#define DEFAULT_NUM_STATIONS 1
140#define DEFAULT_RXQ_PRIORITY 0 /* low 0 .. 15 high */
141#define DEFAULT_RXQ_TYPE 0x07 /* All frames, Data/Ctrl/Mgmt */
142#define TRACE_BUFFER_MAX_SIZE 256
143
144#define DP_RX_PACKET_RING_CHUNK_SIZE 1600
145#define DP_TX_PACKET_RING_CHUNK_SIZE 1600
146#define DP_RX_PACKET_RING_CHUNK_NUM 2
147#define DP_TX_PACKET_RING_CHUNK_NUM 2
148#define DP_TX_COMPLETE_TIME_OUT 20
149#define FW_TX_CMPLT_BLOCK_SIZE 16
150
151struct acx_data_path_params {
152 struct acx_header header;
153
154 u16 rx_packet_ring_chunk_size;
155 u16 tx_packet_ring_chunk_size;
156
157 u8 rx_packet_ring_chunk_num;
158 u8 tx_packet_ring_chunk_num;
159
160 /*
161 * Maximum number of packets that can be gathered
162 * in the TX complete ring before an interrupt
163 * is generated.
164 */
165 u8 tx_complete_threshold;
166
167 /* Number of pending TX complete entries in cyclic ring.*/
168 u8 tx_complete_ring_depth;
169
170 /*
171 * Max num microseconds since a packet enters the TX
172 * complete ring until an interrupt is generated.
173 */
174 u32 tx_complete_timeout;
175} __attribute__ ((packed));
176
177
178struct acx_data_path_params_resp {
179 struct acx_header header;
180
181 u16 rx_packet_ring_chunk_size;
182 u16 tx_packet_ring_chunk_size;
183
184 u8 rx_packet_ring_chunk_num;
185 u8 tx_packet_ring_chunk_num;
186
187 u8 pad[2];
188
189 u32 rx_packet_ring_addr;
190 u32 tx_packet_ring_addr;
191
192 u32 rx_control_addr;
193 u32 tx_control_addr;
194
195 u32 tx_complete_addr;
196} __attribute__ ((packed));
197
198#define TX_MSDU_LIFETIME_MIN 0
199#define TX_MSDU_LIFETIME_MAX 3000
200#define TX_MSDU_LIFETIME_DEF 512
201#define RX_MSDU_LIFETIME_MIN 0
202#define RX_MSDU_LIFETIME_MAX 0xFFFFFFFF
203#define RX_MSDU_LIFETIME_DEF 512000
204
205struct rx_msdu_lifetime {
206 struct acx_header header;
207
208 /*
209 * The maximum amount of time, in TU, before the
210 * firmware discards the MSDU.
211 */
212 u32 lifetime;
213} __attribute__ ((packed));
214
215/*
216 * RX Config Options Table
217 * Bit Definition
218 * === ==========
219 * 31:14 Reserved
220 * 13 Copy RX Status - when set, write three receive status words
221 * to top of rx'd MPDUs.
222 * When cleared, do not write three status words (added rev 1.5)
223 * 12 Reserved
224 * 11 RX Complete upon FCS error - when set, give rx complete
225 * interrupt for FCS errors, after the rx filtering, e.g. unicast
226 * frames not to us with FCS error will not generate an interrupt.
227 * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
228 * probe request, and probe response frames with an SSID that does
229 * not match the SSID specified by the host in the START/JOIN
230 * command.
231 * When clear, the WiLink receives frames with any SSID.
232 * 9 Broadcast Filter Enable - When set, the WiLink discards all
233 * broadcast frames. When clear, the WiLink receives all received
234 * broadcast frames.
235 * 8:6 Reserved
236 * 5 BSSID Filter Enable - When set, the WiLink discards any frames
237 * with a BSSID that does not match the BSSID specified by the
238 * host.
239 * When clear, the WiLink receives frames from any BSSID.
240 * 4 MAC Addr Filter - When set, the WiLink discards any frames
241 * with a destination address that does not match the MAC address
242 * of the adaptor.
243 * When clear, the WiLink receives frames destined to any MAC
244 * address.
245 * 3 Promiscuous - When set, the WiLink receives all valid frames
246 * (i.e., all frames that pass the FCS check).
247 * When clear, only frames that pass the other filters specified
248 * are received.
249 * 2 FCS - When set, the WiLink includes the FCS with the received
250 * frame.
251 * When cleared, the FCS is discarded.
252 * 1 PLCP header - When set, write all data from baseband to frame
253 * buffer including PHY header.
254 * 0 Reserved - Always equal to 0.
255 *
256 * RX Filter Options Table
257 * Bit Definition
258 * === ==========
259 * 31:12 Reserved - Always equal to 0.
260 * 11 Association - When set, the WiLink receives all association
261 * related frames (association request/response, reassocation
262 * request/response, and disassociation). When clear, these frames
263 * are discarded.
264 * 10 Auth/De auth - When set, the WiLink receives all authentication
265 * and de-authentication frames. When clear, these frames are
266 * discarded.
267 * 9 Beacon - When set, the WiLink receives all beacon frames.
268 * When clear, these frames are discarded.
269 * 8 Contention Free - When set, the WiLink receives all contention
270 * free frames.
271 * When clear, these frames are discarded.
272 * 7 Control - When set, the WiLink receives all control frames.
273 * When clear, these frames are discarded.
274 * 6 Data - When set, the WiLink receives all data frames.
275 * When clear, these frames are discarded.
276 * 5 FCS Error - When set, the WiLink receives frames that have FCS
277 * errors.
278 * When clear, these frames are discarded.
279 * 4 Management - When set, the WiLink receives all management
280 * frames.
281 * When clear, these frames are discarded.
282 * 3 Probe Request - When set, the WiLink receives all probe request
283 * frames.
284 * When clear, these frames are discarded.
285 * 2 Probe Response - When set, the WiLink receives all probe
286 * response frames.
287 * When clear, these frames are discarded.
288 * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
289 * frames.
290 * When clear, these frames are discarded.
291 * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
292 * that have reserved frame types and sub types as defined by the
293 * 802.11 specification.
294 * When clear, these frames are discarded.
295 */
296struct acx_rx_config {
297 struct acx_header header;
298
299 u32 config_options;
300 u32 filter_options;
301} __attribute__ ((packed));
302
303enum {
304 QOS_AC_BE = 0,
305 QOS_AC_BK,
306 QOS_AC_VI,
307 QOS_AC_VO,
308 QOS_HIGHEST_AC_INDEX = QOS_AC_VO,
309};
310
311#define MAX_NUM_OF_AC (QOS_HIGHEST_AC_INDEX+1)
312#define FIRST_AC_INDEX QOS_AC_BE
313#define MAX_NUM_OF_802_1d_TAGS 8
314#define AC_PARAMS_MAX_TSID 15
315#define MAX_APSD_CONF 0xffff
316
317#define QOS_TX_HIGH_MIN (0)
318#define QOS_TX_HIGH_MAX (100)
319
320#define QOS_TX_HIGH_BK_DEF (25)
321#define QOS_TX_HIGH_BE_DEF (35)
322#define QOS_TX_HIGH_VI_DEF (35)
323#define QOS_TX_HIGH_VO_DEF (35)
324
325#define QOS_TX_LOW_BK_DEF (15)
326#define QOS_TX_LOW_BE_DEF (25)
327#define QOS_TX_LOW_VI_DEF (25)
328#define QOS_TX_LOW_VO_DEF (25)
329
330struct acx_tx_queue_qos_config {
331 struct acx_header header;
332
333 u8 qid;
334 u8 pad[3];
335
336 /* Max number of blocks allowd in the queue */
337 u16 high_threshold;
338
339 /* Lowest memory blocks guaranteed for this queue */
340 u16 low_threshold;
341} __attribute__ ((packed));
342
343struct acx_packet_detection {
344 struct acx_header header;
345
346 u32 threshold;
347} __attribute__ ((packed));
348
349
350enum acx_slot_type {
351 SLOT_TIME_LONG = 0,
352 SLOT_TIME_SHORT = 1,
353 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT,
354 MAX_SLOT_TIMES = 0xFF
355};
356
357#define STATION_WONE_INDEX 0
358
359struct acx_slot {
360 struct acx_header header;
361
362 u8 wone_index; /* Reserved */
363 u8 slot_time;
364 u8 reserved[6];
365} __attribute__ ((packed));
366
367
368#define ADDRESS_GROUP_MAX (8)
369#define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ADDRESS_GROUP_MAX)
370
371struct multicast_grp_addr_start {
372 struct acx_header header;
373
374 u8 enabled;
375 u8 num_groups;
376 u8 pad[2];
377 u8 mac_table[ADDRESS_GROUP_MAX_LEN];
378} __attribute__ ((packed));
379
380
381#define RX_TIMEOUT_PS_POLL_MIN 0
382#define RX_TIMEOUT_PS_POLL_MAX (200000)
383#define RX_TIMEOUT_PS_POLL_DEF (15)
384#define RX_TIMEOUT_UPSD_MIN 0
385#define RX_TIMEOUT_UPSD_MAX (200000)
386#define RX_TIMEOUT_UPSD_DEF (15)
387
388struct acx_rx_timeout {
389 struct acx_header header;
390
391 /*
392 * The longest time the STA will wait to receive
393 * traffic from the AP after a PS-poll has been
394 * transmitted.
395 */
396 u16 ps_poll_timeout;
397
398 /*
399 * The longest time the STA will wait to receive
400 * traffic from the AP after a frame has been sent
401 * from an UPSD enabled queue.
402 */
403 u16 upsd_timeout;
404} __attribute__ ((packed));
405
406#define RTS_THRESHOLD_MIN 0
407#define RTS_THRESHOLD_MAX 4096
408#define RTS_THRESHOLD_DEF 2347
409
410struct acx_rts_threshold {
411 struct acx_header header;
412
413 u16 threshold;
414 u8 pad[2];
415} __attribute__ ((packed));
416
417struct acx_beacon_filter_option {
418 struct acx_header header;
419
420 u8 enable;
421
422 /*
423 * The number of beacons without the unicast TIM
424 * bit set that the firmware buffers before
425 * signaling the host about ready frames.
426 * When set to 0 and the filter is enabled, beacons
427 * without the unicast TIM bit set are dropped.
428 */
429 u8 max_num_beacons;
430 u8 pad[2];
431} __attribute__ ((packed));
432
433/*
434 * ACXBeaconFilterEntry (not 221)
435 * Byte Offset Size (Bytes) Definition
436 * =========== ============ ==========
437 * 0 1 IE identifier
438 * 1 1 Treatment bit mask
439 *
440 * ACXBeaconFilterEntry (221)
441 * Byte Offset Size (Bytes) Definition
442 * =========== ============ ==========
443 * 0 1 IE identifier
444 * 1 1 Treatment bit mask
445 * 2 3 OUI
446 * 5 1 Type
447 * 6 2 Version
448 *
449 *
450 * Treatment bit mask - The information element handling:
451 * bit 0 - The information element is compared and transferred
452 * in case of change.
453 * bit 1 - The information element is transferred to the host
454 * with each appearance or disappearance.
455 * Note that both bits can be set at the same time.
456 */
457#define BEACON_FILTER_TABLE_MAX_IE_NUM (32)
458#define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6)
459#define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2)
460#define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6)
461#define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * \
462 BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \
463 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
464 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
465
466struct acx_beacon_filter_ie_table {
467 struct acx_header header;
468
469 u8 num_ie;
470 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
471 u8 pad[3];
472} __attribute__ ((packed));
473
474enum {
475 SG_ENABLE = 0,
476 SG_DISABLE,
477 SG_SENSE_NO_ACTIVITY,
478 SG_SENSE_ACTIVE
479};
480
481struct acx_bt_wlan_coex {
482 struct acx_header header;
483
484 /*
485 * 0 -> PTA enabled
486 * 1 -> PTA disabled
487 * 2 -> sense no active mode, i.e.
488 * an interrupt is sent upon
489 * BT activity.
490 * 3 -> PTA is switched on in response
491 * to the interrupt sending.
492 */
493 u8 enable;
494 u8 pad[3];
495} __attribute__ ((packed));
496
497#define PTA_ANTENNA_TYPE_DEF (0)
498#define PTA_BT_HP_MAXTIME_DEF (2000)
499#define PTA_WLAN_HP_MAX_TIME_DEF (5000)
500#define PTA_SENSE_DISABLE_TIMER_DEF (1350)
501#define PTA_PROTECTIVE_RX_TIME_DEF (1500)
502#define PTA_PROTECTIVE_TX_TIME_DEF (1500)
503#define PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF (3000)
504#define PTA_SIGNALING_TYPE_DEF (1)
505#define PTA_AFH_LEVERAGE_ON_DEF (0)
506#define PTA_NUMBER_QUIET_CYCLE_DEF (0)
507#define PTA_MAX_NUM_CTS_DEF (3)
508#define PTA_NUMBER_OF_WLAN_PACKETS_DEF (2)
509#define PTA_NUMBER_OF_BT_PACKETS_DEF (2)
510#define PTA_PROTECTIVE_RX_TIME_FAST_DEF (1500)
511#define PTA_PROTECTIVE_TX_TIME_FAST_DEF (3000)
512#define PTA_CYCLE_TIME_FAST_DEF (8700)
513#define PTA_RX_FOR_AVALANCHE_DEF (5)
514#define PTA_ELP_HP_DEF (0)
515#define PTA_ANTI_STARVE_PERIOD_DEF (500)
516#define PTA_ANTI_STARVE_NUM_CYCLE_DEF (4)
517#define PTA_ALLOW_PA_SD_DEF (1)
518#define PTA_TIME_BEFORE_BEACON_DEF (6300)
519#define PTA_HPDM_MAX_TIME_DEF (1600)
520#define PTA_TIME_OUT_NEXT_WLAN_DEF (2550)
521#define PTA_AUTO_MODE_NO_CTS_DEF (0)
522#define PTA_BT_HP_RESPECTED_DEF (3)
523#define PTA_WLAN_RX_MIN_RATE_DEF (24)
524#define PTA_ACK_MODE_DEF (1)
525
526struct acx_bt_wlan_coex_param {
527 struct acx_header header;
528
529 /*
530 * The minimum rate of a received WLAN packet in the STA,
531 * during protective mode, of which a new BT-HP request
532 * during this Rx will always be respected and gain the antenna.
533 */
534 u32 min_rate;
535
536 /* Max time the BT HP will be respected. */
537 u16 bt_hp_max_time;
538
539 /* Max time the WLAN HP will be respected. */
540 u16 wlan_hp_max_time;
541
542 /*
543 * The time between the last BT activity
544 * and the moment when the sense mode returns
545 * to SENSE_INACTIVE.
546 */
547 u16 sense_disable_timer;
548
549 /* Time before the next BT HP instance */
550 u16 rx_time_bt_hp;
551 u16 tx_time_bt_hp;
552
553 /* range: 10-20000 default: 1500 */
554 u16 rx_time_bt_hp_fast;
555 u16 tx_time_bt_hp_fast;
556
557 /* range: 2000-65535 default: 8700 */
558 u16 wlan_cycle_fast;
559
560 /* range: 0 - 15000 (Msec) default: 1000 */
561 u16 bt_anti_starvation_period;
562
563 /* range 400-10000(Usec) default: 3000 */
564 u16 next_bt_lp_packet;
565
566 /* Deafult: worst case for BT DH5 traffic */
567 u16 wake_up_beacon;
568
569 /* range: 0-50000(Usec) default: 1050 */
570 u16 hp_dm_max_guard_time;
571
572 /*
573 * This is to prevent both BT & WLAN antenna
574 * starvation.
575 * Range: 100-50000(Usec) default:2550
576 */
577 u16 next_wlan_packet;
578
579 /* 0 -> shared antenna */
580 u8 antenna_type;
581
582 /*
583 * 0 -> TI legacy
584 * 1 -> Palau
585 */
586 u8 signal_type;
587
588 /*
589 * BT AFH status
590 * 0 -> no AFH
591 * 1 -> from dedicated GPIO
592 * 2 -> AFH on (from host)
593 */
594 u8 afh_leverage_on;
595
596 /*
597 * The number of cycles during which no
598 * TX will be sent after 1 cycle of RX
599 * transaction in protective mode
600 */
601 u8 quiet_cycle_num;
602
603 /*
604 * The maximum number of CTSs that will
605 * be sent for receiving RX packet in
606 * protective mode
607 */
608 u8 max_cts;
609
610 /*
611 * The number of WLAN packets
612 * transferred in common mode before
613 * switching to BT.
614 */
615 u8 wlan_packets_num;
616
617 /*
618 * The number of BT packets
619 * transferred in common mode before
620 * switching to WLAN.
621 */
622 u8 bt_packets_num;
623
624 /* range: 1-255 default: 5 */
625 u8 missed_rx_avalanche;
626
627 /* range: 0-1 default: 1 */
628 u8 wlan_elp_hp;
629
630 /* range: 0 - 15 default: 4 */
631 u8 bt_anti_starvation_cycles;
632
633 u8 ack_mode_dual_ant;
634
635 /*
636 * Allow PA_SD assertion/de-assertion
637 * during enabled BT activity.
638 */
639 u8 pa_sd_enable;
640
641 /*
642 * Enable/Disable PTA in auto mode:
643 * Support Both Active & P.S modes
644 */
645 u8 pta_auto_mode_enable;
646
647 /* range: 0 - 20 default: 1 */
648 u8 bt_hp_respected_num;
649} __attribute__ ((packed));
650
651#define CCA_THRSH_ENABLE_ENERGY_D 0x140A
652#define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF
653
654struct acx_energy_detection {
655 struct acx_header header;
656
657 /* The RX Clear Channel Assessment threshold in the PHY */
658 u16 rx_cca_threshold;
659 u8 tx_energy_detection;
660 u8 pad;
661} __attribute__ ((packed));
662
663#define BCN_RX_TIMEOUT_DEF_VALUE 10000
664#define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000
665#define RX_BROADCAST_IN_PS_DEF_VALUE 1
666#define CONSECUTIVE_PS_POLL_FAILURE_DEF 4
667
668struct acx_beacon_broadcast {
669 struct acx_header header;
670
671 u16 beacon_rx_timeout;
672 u16 broadcast_timeout;
673
674 /* Enables receiving of broadcast packets in PS mode */
675 u8 rx_broadcast_in_ps;
676
677 /* Consecutive PS Poll failures before updating the host */
678 u8 ps_poll_threshold;
679 u8 pad[2];
680} __attribute__ ((packed));
681
682struct acx_event_mask {
683 struct acx_header header;
684
685 u32 event_mask;
686 u32 high_event_mask; /* Unused */
687} __attribute__ ((packed));
688
689#define CFG_RX_FCS BIT(2)
690#define CFG_RX_ALL_GOOD BIT(3)
691#define CFG_UNI_FILTER_EN BIT(4)
692#define CFG_BSSID_FILTER_EN BIT(5)
693#define CFG_MC_FILTER_EN BIT(6)
694#define CFG_MC_ADDR0_EN BIT(7)
695#define CFG_MC_ADDR1_EN BIT(8)
696#define CFG_BC_REJECT_EN BIT(9)
697#define CFG_SSID_FILTER_EN BIT(10)
698#define CFG_RX_INT_FCS_ERROR BIT(11)
699#define CFG_RX_INT_ENCRYPTED BIT(12)
700#define CFG_RX_WR_RX_STATUS BIT(13)
701#define CFG_RX_FILTER_NULTI BIT(14)
702#define CFG_RX_RESERVE BIT(15)
703#define CFG_RX_TIMESTAMP_TSF BIT(16)
704
705#define CFG_RX_RSV_EN BIT(0)
706#define CFG_RX_RCTS_ACK BIT(1)
707#define CFG_RX_PRSP_EN BIT(2)
708#define CFG_RX_PREQ_EN BIT(3)
709#define CFG_RX_MGMT_EN BIT(4)
710#define CFG_RX_FCS_ERROR BIT(5)
711#define CFG_RX_DATA_EN BIT(6)
712#define CFG_RX_CTL_EN BIT(7)
713#define CFG_RX_CF_EN BIT(8)
714#define CFG_RX_BCN_EN BIT(9)
715#define CFG_RX_AUTH_EN BIT(10)
716#define CFG_RX_ASSOC_EN BIT(11)
717
718#define SCAN_PASSIVE BIT(0)
719#define SCAN_5GHZ_BAND BIT(1)
720#define SCAN_TRIGGERED BIT(2)
721#define SCAN_PRIORITY_HIGH BIT(3)
722
723struct acx_fw_gen_frame_rates {
724 struct acx_header header;
725
726 u8 tx_ctrl_frame_rate; /* RATE_* */
727 u8 tx_ctrl_frame_mod; /* CCK_* or PBCC_* */
728 u8 tx_mgt_frame_rate;
729 u8 tx_mgt_frame_mod;
730} __attribute__ ((packed));
731
732/* STA MAC */
733struct dot11_station_id {
734 struct acx_header header;
735
736 u8 mac[ETH_ALEN];
737 u8 pad[2];
738} __attribute__ ((packed));
739
740/* HW encryption keys */
741#define NUM_ACCESS_CATEGORIES_COPY 4
742#define MAX_KEY_SIZE 32
743
744/* When set, disable HW encryption */
745#define DF_ENCRYPTION_DISABLE 0x01
746/* When set, disable HW decryption */
747#define DF_SNIFF_MODE_ENABLE 0x80
748
749struct acx_feature_config {
750 struct acx_header header;
751
752 u32 options;
753 u32 data_flow_options;
754} __attribute__ ((packed));
755
756enum acx_key_action {
757 KEY_ADD_OR_REPLACE = 1,
758 KEY_REMOVE = 2,
759 KEY_SET_ID = 3,
760 MAX_KEY_ACTION = 0xffff,
761};
762
763enum acx_key_type {
764 KEY_WEP_DEFAULT = 0,
765 KEY_WEP_ADDR = 1,
766 KEY_AES_GROUP = 4,
767 KEY_AES_PAIRWISE = 5,
768 KEY_WEP_GROUP = 6,
769 KEY_TKIP_MIC_GROUP = 10,
770 KEY_TKIP_MIC_PAIRWISE = 11,
771};
772
773/*
774 *
775 * key_type_e key size key format
776 * ---------- --------- ----------
777 * 0x00 5, 13, 29 Key data
778 * 0x01 5, 13, 29 Key data
779 * 0x04 16 16 bytes of key data
780 * 0x05 16 16 bytes of key data
781 * 0x0a 32 16 bytes of TKIP key data
782 * 8 bytes of RX MIC key data
783 * 8 bytes of TX MIC key data
784 * 0x0b 32 16 bytes of TKIP key data
785 * 8 bytes of RX MIC key data
786 * 8 bytes of TX MIC key data
787 *
788 */
789
790struct acx_set_key {
791 /* Ignored for default WEP key */
792 u8 addr[ETH_ALEN];
793
794 /* key_action_e */
795 u16 key_action;
796
797 u16 reserved_1;
798
799 /* key size in bytes */
800 u8 key_size;
801
802 /* key_type_e */
803 u8 key_type;
804 u8 ssid_profile;
805
806 /*
807 * TKIP, AES: frame's key id field.
808 * For WEP default key: key id;
809 */
810 u8 id;
811 u8 reserved_2[6];
812 u8 key[MAX_KEY_SIZE];
813 u16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY];
814 u32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY];
815} __attribute__ ((packed));
816
817struct acx_current_tx_power {
818 struct acx_header header;
819
820 u8 current_tx_power;
821 u8 padding[3];
822} __attribute__ ((packed));
823
824struct acx_dot11_default_key {
825 struct acx_header header;
826
827 u8 id;
828 u8 pad[3];
829} __attribute__ ((packed));
830
831struct acx_tsf_info {
832 struct acx_header header;
833
834 u32 current_tsf_msb;
835 u32 current_tsf_lsb;
836 u32 last_TBTT_msb;
837 u32 last_TBTT_lsb;
838 u8 last_dtim_count;
839 u8 pad[3];
840} __attribute__ ((packed));
841
842/* 802.11 PS */
843enum acx_ps_mode {
844 STATION_ACTIVE_MODE,
845 STATION_POWER_SAVE_MODE
846};
847
848struct acx_ps_params {
849 u8 ps_mode; /* STATION_* */
850 u8 send_null_data; /* Do we have to send NULL data packet ? */
851 u8 retries; /* Number of retires for the initial NULL data packet */
852
853 /*
854 * TUs during which the target stays awake after switching
855 * to power save mode.
856 */
857 u8 hang_over_period;
858 u16 null_data_rate;
859 u8 pad[2];
860} __attribute__ ((packed));
861
862enum acx_wake_up_event {
863 WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/
864 WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/
865 WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM */
866 WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon */
867 WAKE_UP_EVENT_BITS_MASK = 0x0F
868};
869
870struct acx_wake_up_condition {
871 struct acx_header header;
872
873 u8 wake_up_event; /* Only one bit can be set */
874 u8 listen_interval;
875 u8 pad[2];
876} __attribute__ ((packed));
877
878struct acx_aid {
879 struct acx_header header;
880
881 /*
882 * To be set when associated with an AP.
883 */
884 u16 aid;
885 u8 pad[2];
886} __attribute__ ((packed));
887
888enum acx_preamble_type {
889 ACX_PREAMBLE_LONG = 0,
890 ACX_PREAMBLE_SHORT = 1
891};
892
893struct acx_preamble {
894 struct acx_header header;
895 /*
896 * When set, the WiLink transmits the frames with a short preamble and
897 * when cleared, the WiLink transmits the frames with a long preamble.
898 */
899 u8 preamble;
900 u8 padding[3];
901} __attribute__ ((packed));
902
903enum acx_ctsprotect_type {
904 CTSPROTECT_DISABLE = 0,
905 CTSPROTECT_ENABLE = 1
906};
907
908struct acx_ctsprotect {
909 struct acx_header header;
910 u8 ctsprotect;
911 u8 padding[3];
912} __attribute__ ((packed));
913
914struct acx_tx_statistics {
915 u32 internal_desc_overflow;
916} __attribute__ ((packed));
917
918struct acx_rx_statistics {
919 u32 out_of_mem;
920 u32 hdr_overflow;
921 u32 hw_stuck;
922 u32 dropped;
923 u32 fcs_err;
924 u32 xfr_hint_trig;
925 u32 path_reset;
926 u32 reset_counter;
927} __attribute__ ((packed));
928
929struct acx_dma_statistics {
930 u32 rx_requested;
931 u32 rx_errors;
932 u32 tx_requested;
933 u32 tx_errors;
934} __attribute__ ((packed));
935
936struct acx_isr_statistics {
937 /* host command complete */
938 u32 cmd_cmplt;
939
940 /* fiqisr() */
941 u32 fiqs;
942
943 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
944 u32 rx_headers;
945
946 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
947 u32 rx_completes;
948
949 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
950 u32 rx_mem_overflow;
951
952 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
953 u32 rx_rdys;
954
955 /* irqisr() */
956 u32 irqs;
957
958 /* (INT_STS_ND & INT_TRIG_TX_PROC) */
959 u32 tx_procs;
960
961 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
962 u32 decrypt_done;
963
964 /* (INT_STS_ND & INT_TRIG_DMA0) */
965 u32 dma0_done;
966
967 /* (INT_STS_ND & INT_TRIG_DMA1) */
968 u32 dma1_done;
969
970 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
971 u32 tx_exch_complete;
972
973 /* (INT_STS_ND & INT_TRIG_COMMAND) */
974 u32 commands;
975
976 /* (INT_STS_ND & INT_TRIG_RX_PROC) */
977 u32 rx_procs;
978
979 /* (INT_STS_ND & INT_TRIG_PM_802) */
980 u32 hw_pm_mode_changes;
981
982 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
983 u32 host_acknowledges;
984
985 /* (INT_STS_ND & INT_TRIG_PM_PCI) */
986 u32 pci_pm;
987
988 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
989 u32 wakeups;
990
991 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
992 u32 low_rssi;
993} __attribute__ ((packed));
994
995struct acx_wep_statistics {
996 /* WEP address keys configured */
997 u32 addr_key_count;
998
999 /* default keys configured */
1000 u32 default_key_count;
1001
1002 u32 reserved;
1003
1004 /* number of times that WEP key not found on lookup */
1005 u32 key_not_found;
1006
1007 /* number of times that WEP key decryption failed */
1008 u32 decrypt_fail;
1009
1010 /* WEP packets decrypted */
1011 u32 packets;
1012
1013 /* WEP decrypt interrupts */
1014 u32 interrupt;
1015} __attribute__ ((packed));
1016
1017#define ACX_MISSED_BEACONS_SPREAD 10
1018
1019struct acx_pwr_statistics {
1020 /* the amount of enters into power save mode (both PD & ELP) */
1021 u32 ps_enter;
1022
1023 /* the amount of enters into ELP mode */
1024 u32 elp_enter;
1025
1026 /* the amount of missing beacon interrupts to the host */
1027 u32 missing_bcns;
1028
1029 /* the amount of wake on host-access times */
1030 u32 wake_on_host;
1031
1032 /* the amount of wake on timer-expire */
1033 u32 wake_on_timer_exp;
1034
1035 /* the number of packets that were transmitted with PS bit set */
1036 u32 tx_with_ps;
1037
1038 /* the number of packets that were transmitted with PS bit clear */
1039 u32 tx_without_ps;
1040
1041 /* the number of received beacons */
1042 u32 rcvd_beacons;
1043
1044 /* the number of entering into PowerOn (power save off) */
1045 u32 power_save_off;
1046
1047 /* the number of entries into power save mode */
1048 u16 enable_ps;
1049
1050 /*
1051 * the number of exits from power save, not including failed PS
1052 * transitions
1053 */
1054 u16 disable_ps;
1055
1056 /*
1057 * the number of times the TSF counter was adjusted because
1058 * of drift
1059 */
1060 u32 fix_tsf_ps;
1061
1062 /* Gives statistics about the spread continuous missed beacons.
1063 * The 16 LSB are dedicated for the PS mode.
1064 * The 16 MSB are dedicated for the PS mode.
1065 * cont_miss_bcns_spread[0] - single missed beacon.
1066 * cont_miss_bcns_spread[1] - two continuous missed beacons.
1067 * cont_miss_bcns_spread[2] - three continuous missed beacons.
1068 * ...
1069 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
1070 */
1071 u32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
1072
1073 /* the number of beacons in awake mode */
1074 u32 rcvd_awake_beacons;
1075} __attribute__ ((packed));
1076
1077struct acx_mic_statistics {
1078 u32 rx_pkts;
1079 u32 calc_failure;
1080} __attribute__ ((packed));
1081
1082struct acx_aes_statistics {
1083 u32 encrypt_fail;
1084 u32 decrypt_fail;
1085 u32 encrypt_packets;
1086 u32 decrypt_packets;
1087 u32 encrypt_interrupt;
1088 u32 decrypt_interrupt;
1089} __attribute__ ((packed));
1090
1091struct acx_event_statistics {
1092 u32 heart_beat;
1093 u32 calibration;
1094 u32 rx_mismatch;
1095 u32 rx_mem_empty;
1096 u32 rx_pool;
1097 u32 oom_late;
1098 u32 phy_transmit_error;
1099 u32 tx_stuck;
1100} __attribute__ ((packed));
1101
1102struct acx_ps_statistics {
1103 u32 pspoll_timeouts;
1104 u32 upsd_timeouts;
1105 u32 upsd_max_sptime;
1106 u32 upsd_max_apturn;
1107 u32 pspoll_max_apturn;
1108 u32 pspoll_utilization;
1109 u32 upsd_utilization;
1110} __attribute__ ((packed));
1111
1112struct acx_rxpipe_statistics {
1113 u32 rx_prep_beacon_drop;
1114 u32 descr_host_int_trig_rx_data;
1115 u32 beacon_buffer_thres_host_int_trig_rx_data;
1116 u32 missed_beacon_host_int_trig_rx_data;
1117 u32 tx_xfr_host_int_trig_rx_data;
1118} __attribute__ ((packed));
1119
1120struct acx_statistics {
1121 struct acx_header header;
1122
1123 struct acx_tx_statistics tx;
1124 struct acx_rx_statistics rx;
1125 struct acx_dma_statistics dma;
1126 struct acx_isr_statistics isr;
1127 struct acx_wep_statistics wep;
1128 struct acx_pwr_statistics pwr;
1129 struct acx_aes_statistics aes;
1130 struct acx_mic_statistics mic;
1131 struct acx_event_statistics event;
1132 struct acx_ps_statistics ps;
1133 struct acx_rxpipe_statistics rxpipe;
1134} __attribute__ ((packed));
1135
1136enum {
1137 ACX_WAKE_UP_CONDITIONS = 0x0002,
1138 ACX_MEM_CFG = 0x0003,
1139 ACX_SLOT = 0x0004,
1140 ACX_QUEUE_HEAD = 0x0005, /* for MASTER mode only */
1141 ACX_AC_CFG = 0x0007,
1142 ACX_MEM_MAP = 0x0008,
1143 ACX_AID = 0x000A,
1144 ACX_RADIO_PARAM = 0x000B, /* Not used */
1145 ACX_CFG = 0x000C, /* Not used */
1146 ACX_FW_REV = 0x000D,
1147 ACX_MEDIUM_USAGE = 0x000F,
1148 ACX_RX_CFG = 0x0010,
1149 ACX_TX_QUEUE_CFG = 0x0011, /* FIXME: only used by wl1251 */
1150 ACX_BSS_IN_PS = 0x0012, /* for AP only */
1151 ACX_STATISTICS = 0x0013, /* Debug API */
1152 ACX_FEATURE_CFG = 0x0015,
1153 ACX_MISC_CFG = 0x0017, /* Not used */
1154 ACX_TID_CFG = 0x001A,
1155 ACX_BEACON_FILTER_OPT = 0x001F,
1156 ACX_LOW_RSSI = 0x0020,
1157 ACX_NOISE_HIST = 0x0021,
1158 ACX_HDK_VERSION = 0x0022, /* ??? */
1159 ACX_PD_THRESHOLD = 0x0023,
1160 ACX_DATA_PATH_PARAMS = 0x0024, /* WO */
1161 ACX_DATA_PATH_RESP_PARAMS = 0x0024, /* RO */
1162 ACX_CCA_THRESHOLD = 0x0025,
1163 ACX_EVENT_MBOX_MASK = 0x0026,
1164#ifdef FW_RUNNING_AS_AP
1165 ACX_DTIM_PERIOD = 0x0027, /* for AP only */
1166#else
1167 ACX_WR_TBTT_AND_DTIM = 0x0027, /* STA only */
1168#endif
1169 ACX_ACI_OPTION_CFG = 0x0029, /* OBSOLETE (for 1251)*/
1170 ACX_GPIO_CFG = 0x002A, /* Not used */
1171 ACX_GPIO_SET = 0x002B, /* Not used */
1172 ACX_PM_CFG = 0x002C, /* To Be Documented */
1173 ACX_CONN_MONIT_PARAMS = 0x002D,
1174 ACX_AVERAGE_RSSI = 0x002E, /* Not used */
1175 ACX_CONS_TX_FAILURE = 0x002F,
1176 ACX_BCN_DTIM_OPTIONS = 0x0031,
1177 ACX_SG_ENABLE = 0x0032,
1178 ACX_SG_CFG = 0x0033,
1179 ACX_ANTENNA_DIVERSITY_CFG = 0x0035, /* To Be Documented */
1180 ACX_LOW_SNR = 0x0037, /* To Be Documented */
1181 ACX_BEACON_FILTER_TABLE = 0x0038,
1182 ACX_ARP_IP_FILTER = 0x0039,
1183 ACX_ROAMING_STATISTICS_TBL = 0x003B,
1184 ACX_RATE_POLICY = 0x003D,
1185 ACX_CTS_PROTECTION = 0x003E,
1186 ACX_SLEEP_AUTH = 0x003F,
1187 ACX_PREAMBLE_TYPE = 0x0040,
1188 ACX_ERROR_CNT = 0x0041,
1189 ACX_FW_GEN_FRAME_RATES = 0x0042,
1190 ACX_IBSS_FILTER = 0x0044,
1191 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045,
1192 ACX_TSF_INFO = 0x0046,
1193 ACX_CONFIG_PS_WMM = 0x0049,
1194 ACX_ENABLE_RX_DATA_FILTER = 0x004A,
1195 ACX_SET_RX_DATA_FILTER = 0x004B,
1196 ACX_GET_DATA_FILTER_STATISTICS = 0x004C,
1197 ACX_POWER_LEVEL_TABLE = 0x004D,
1198 ACX_BET_ENABLE = 0x0050,
1199 DOT11_STATION_ID = 0x1001,
1200 DOT11_RX_MSDU_LIFE_TIME = 0x1004,
1201 DOT11_CUR_TX_PWR = 0x100D,
1202 DOT11_DEFAULT_KEY = 0x1010,
1203 DOT11_RX_DOT11_MODE = 0x1012,
1204 DOT11_RTS_THRESHOLD = 0x1013,
1205 DOT11_GROUP_ADDRESS_TBL = 0x1014,
1206
1207 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
1208
1209 MAX_IE = 0xFFFF
1210};
1211
1212
1213int wl12xx_acx_frame_rates(struct wl12xx *wl, u8 ctrl_rate, u8 ctrl_mod,
1214 u8 mgt_rate, u8 mgt_mod);
1215int wl12xx_acx_station_id(struct wl12xx *wl);
1216int wl12xx_acx_default_key(struct wl12xx *wl, u8 key_id);
1217int wl12xx_acx_wake_up_conditions(struct wl12xx *wl, u8 listen_interval);
1218int wl12xx_acx_sleep_auth(struct wl12xx *wl, u8 sleep_auth);
1219int wl12xx_acx_fw_version(struct wl12xx *wl, char *buf, size_t len);
1220int wl12xx_acx_tx_power(struct wl12xx *wl, int power);
1221int wl12xx_acx_feature_cfg(struct wl12xx *wl);
1222int wl12xx_acx_mem_map(struct wl12xx *wl, void *mem_map, size_t len);
1223int wl12xx_acx_data_path_params(struct wl12xx *wl,
1224 struct acx_data_path_params_resp *data_path);
1225int wl12xx_acx_rx_msdu_life_time(struct wl12xx *wl, u32 life_time);
1226int wl12xx_acx_rx_config(struct wl12xx *wl, u32 config, u32 filter);
1227int wl12xx_acx_pd_threshold(struct wl12xx *wl);
1228int wl12xx_acx_slot(struct wl12xx *wl, enum acx_slot_type slot_time);
1229int wl12xx_acx_group_address_tbl(struct wl12xx *wl);
1230int wl12xx_acx_service_period_timeout(struct wl12xx *wl);
1231int wl12xx_acx_rts_threshold(struct wl12xx *wl, u16 rts_threshold);
1232int wl12xx_acx_beacon_filter_opt(struct wl12xx *wl);
1233int wl12xx_acx_beacon_filter_table(struct wl12xx *wl);
1234int wl12xx_acx_sg_enable(struct wl12xx *wl);
1235int wl12xx_acx_sg_cfg(struct wl12xx *wl);
1236int wl12xx_acx_cca_threshold(struct wl12xx *wl);
1237int wl12xx_acx_bcn_dtim_options(struct wl12xx *wl);
1238int wl12xx_acx_aid(struct wl12xx *wl, u16 aid);
1239int wl12xx_acx_event_mbox_mask(struct wl12xx *wl, u32 event_mask);
1240int wl12xx_acx_set_preamble(struct wl12xx *wl, enum acx_preamble_type preamble);
1241int wl12xx_acx_cts_protect(struct wl12xx *wl,
1242 enum acx_ctsprotect_type ctsprotect);
1243int wl12xx_acx_statistics(struct wl12xx *wl, struct acx_statistics *stats);
1244
1245#endif /* __WL12XX_ACX_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 09:16:15 -0500