diff options
author | Chaoming_Li <chaoming_li@realsil.com.cn> | 2011-04-25 13:53:45 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-26 16:13:33 -0400 |
commit | c07ccff326a2b3d81520e8c7a8e0f5e8cbc77416 (patch) | |
tree | 1dd79b795ba1e00b1e164eef6863dcc8cfbadf53 /drivers/net/wireless/rtlwifi/rtl8192c | |
parent | 3ac5e26a1e935469a8bdae1d624bc3b59d1fcdc5 (diff) |
rtlwifi: rtl8192c-common: Change common PHY routines for addition of rtl8192se and rtl8192de
Change common PHY routines for addition of RTL8192SE and RTL8192DE code.
Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn>
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8192c')
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c | 119 | ||||
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h | 60 |
2 files changed, 83 insertions, 96 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c index a7022827839..3915a1ba59f 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c +++ b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c | |||
@@ -78,18 +78,20 @@ void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw, | |||
78 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x)," | 78 | RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x)," |
79 | " data(%#x)\n", regaddr, bitmask, | 79 | " data(%#x)\n", regaddr, bitmask, |
80 | data)); | 80 | data)); |
81 | |||
81 | } | 82 | } |
82 | EXPORT_SYMBOL(rtl92c_phy_set_bb_reg); | 83 | EXPORT_SYMBOL(rtl92c_phy_set_bb_reg); |
83 | 84 | ||
84 | u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw, | 85 | static u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw, |
85 | enum radio_path rfpath, u32 offset) | 86 | enum radio_path rfpath, u32 offset) |
86 | { | 87 | { |
87 | RT_ASSERT(false, ("deprecated!\n")); | 88 | RT_ASSERT(false, ("deprecated!\n")); |
88 | return 0; | 89 | return 0; |
90 | |||
89 | } | 91 | } |
90 | EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_read); | 92 | EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_read); |
91 | 93 | ||
92 | void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw, | 94 | static void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw, |
93 | enum radio_path rfpath, u32 offset, | 95 | enum radio_path rfpath, u32 offset, |
94 | u32 data) | 96 | u32 data) |
95 | { | 97 | { |
@@ -97,7 +99,7 @@ void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw, | |||
97 | } | 99 | } |
98 | EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_write); | 100 | EXPORT_SYMBOL(_rtl92c_phy_fw_rf_serial_write); |
99 | 101 | ||
100 | u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, | 102 | static u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, |
101 | enum radio_path rfpath, u32 offset) | 103 | enum radio_path rfpath, u32 offset) |
102 | { | 104 | { |
103 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 105 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
@@ -148,7 +150,7 @@ u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, | |||
148 | } | 150 | } |
149 | EXPORT_SYMBOL(_rtl92c_phy_rf_serial_read); | 151 | EXPORT_SYMBOL(_rtl92c_phy_rf_serial_read); |
150 | 152 | ||
151 | void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw, | 153 | static void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw, |
152 | enum radio_path rfpath, u32 offset, | 154 | enum radio_path rfpath, u32 offset, |
153 | u32 data) | 155 | u32 data) |
154 | { | 156 | { |
@@ -197,6 +199,7 @@ static void _rtl92c_phy_bb_config_1t(struct ieee80211_hw *hw) | |||
197 | rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2); | 199 | rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2); |
198 | rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2); | 200 | rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2); |
199 | } | 201 | } |
202 | |||
200 | bool rtl92c_phy_rf_config(struct ieee80211_hw *hw) | 203 | bool rtl92c_phy_rf_config(struct ieee80211_hw *hw) |
201 | { | 204 | { |
202 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 205 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
@@ -205,7 +208,7 @@ bool rtl92c_phy_rf_config(struct ieee80211_hw *hw) | |||
205 | } | 208 | } |
206 | EXPORT_SYMBOL(rtl92c_phy_rf_config); | 209 | EXPORT_SYMBOL(rtl92c_phy_rf_config); |
207 | 210 | ||
208 | bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw) | 211 | static bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw) |
209 | { | 212 | { |
210 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 213 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
211 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 214 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
@@ -241,6 +244,7 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw) | |||
241 | rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw, | 244 | rtlphy->cck_high_power = (bool) (rtl_get_bbreg(hw, |
242 | RFPGA0_XA_HSSIPARAMETER2, | 245 | RFPGA0_XA_HSSIPARAMETER2, |
243 | 0x200)); | 246 | 0x200)); |
247 | |||
244 | return true; | 248 | return true; |
245 | } | 249 | } |
246 | EXPORT_SYMBOL(_rtl92c_phy_bb8192c_config_parafile); | 250 | EXPORT_SYMBOL(_rtl92c_phy_bb8192c_config_parafile); |
@@ -317,61 +321,48 @@ void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw, | |||
317 | } | 321 | } |
318 | if (regaddr == RTXAGC_B_RATE54_24) { | 322 | if (regaddr == RTXAGC_B_RATE54_24) { |
319 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][9] = data; | 323 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][9] = data; |
320 | |||
321 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 324 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
322 | ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n", | 325 | ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n", |
323 | rtlphy->pwrgroup_cnt, | 326 | rtlphy->pwrgroup_cnt, |
324 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][9])); | 327 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][9])); |
325 | } | 328 | } |
326 | |||
327 | if (regaddr == RTXAGC_B_CCK1_55_MCS32) { | 329 | if (regaddr == RTXAGC_B_CCK1_55_MCS32) { |
328 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][14] = data; | 330 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][14] = data; |
329 | |||
330 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 331 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
331 | ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n", | 332 | ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n", |
332 | rtlphy->pwrgroup_cnt, | 333 | rtlphy->pwrgroup_cnt, |
333 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][14])); | 334 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][14])); |
334 | } | 335 | } |
335 | |||
336 | if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) { | 336 | if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) { |
337 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][15] = data; | 337 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][15] = data; |
338 | |||
339 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 338 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
340 | ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n", | 339 | ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n", |
341 | rtlphy->pwrgroup_cnt, | 340 | rtlphy->pwrgroup_cnt, |
342 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][15])); | 341 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][15])); |
343 | } | 342 | } |
344 | |||
345 | if (regaddr == RTXAGC_B_MCS03_MCS00) { | 343 | if (regaddr == RTXAGC_B_MCS03_MCS00) { |
346 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][10] = data; | 344 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][10] = data; |
347 | |||
348 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 345 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
349 | ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n", | 346 | ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n", |
350 | rtlphy->pwrgroup_cnt, | 347 | rtlphy->pwrgroup_cnt, |
351 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][10])); | 348 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][10])); |
352 | } | 349 | } |
353 | |||
354 | if (regaddr == RTXAGC_B_MCS07_MCS04) { | 350 | if (regaddr == RTXAGC_B_MCS07_MCS04) { |
355 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][11] = data; | 351 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][11] = data; |
356 | |||
357 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 352 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
358 | ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n", | 353 | ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n", |
359 | rtlphy->pwrgroup_cnt, | 354 | rtlphy->pwrgroup_cnt, |
360 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][11])); | 355 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][11])); |
361 | } | 356 | } |
362 | |||
363 | if (regaddr == RTXAGC_B_MCS11_MCS08) { | 357 | if (regaddr == RTXAGC_B_MCS11_MCS08) { |
364 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][12] = data; | 358 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][12] = data; |
365 | |||
366 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 359 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
367 | ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n", | 360 | ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n", |
368 | rtlphy->pwrgroup_cnt, | 361 | rtlphy->pwrgroup_cnt, |
369 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][12])); | 362 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][12])); |
370 | } | 363 | } |
371 | |||
372 | if (regaddr == RTXAGC_B_MCS15_MCS12) { | 364 | if (regaddr == RTXAGC_B_MCS15_MCS12) { |
373 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][13] = data; | 365 | rtlphy->MCS_TXPWR[rtlphy->pwrgroup_cnt][13] = data; |
374 | |||
375 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, | 366 | RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
376 | ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n", | 367 | ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n", |
377 | rtlphy->pwrgroup_cnt, | 368 | rtlphy->pwrgroup_cnt, |
@@ -583,6 +574,7 @@ static void _rtl92c_ccxpower_index_check(struct ieee80211_hw *hw, | |||
583 | 574 | ||
584 | rtlphy->cur_cck_txpwridx = cckpowerlevel[0]; | 575 | rtlphy->cur_cck_txpwridx = cckpowerlevel[0]; |
585 | rtlphy->cur_ofdm24g_txpwridx = ofdmpowerlevel[0]; | 576 | rtlphy->cur_ofdm24g_txpwridx = ofdmpowerlevel[0]; |
577 | |||
586 | } | 578 | } |
587 | 579 | ||
588 | void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel) | 580 | void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel) |
@@ -611,7 +603,6 @@ bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, long power_indbm) | |||
611 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); | 603 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); |
612 | u8 idx; | 604 | u8 idx; |
613 | u8 rf_path; | 605 | u8 rf_path; |
614 | |||
615 | u8 ccktxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw, | 606 | u8 ccktxpwridx = _rtl92c_phy_dbm_to_txpwr_Idx(hw, |
616 | WIRELESS_MODE_B, | 607 | WIRELESS_MODE_B, |
617 | power_indbm); | 608 | power_indbm); |
@@ -639,11 +630,6 @@ bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, long power_indbm) | |||
639 | } | 630 | } |
640 | EXPORT_SYMBOL(rtl92c_phy_update_txpower_dbm); | 631 | EXPORT_SYMBOL(rtl92c_phy_update_txpower_dbm); |
641 | 632 | ||
642 | void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval) | ||
643 | { | ||
644 | } | ||
645 | EXPORT_SYMBOL(rtl92c_phy_set_beacon_hw_reg); | ||
646 | |||
647 | u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw, | 633 | u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw, |
648 | enum wireless_mode wirelessmode, | 634 | enum wireless_mode wirelessmode, |
649 | long power_indbm) | 635 | long power_indbm) |
@@ -741,9 +727,9 @@ void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw, | |||
741 | if (rtlphy->set_bwmode_inprogress) | 727 | if (rtlphy->set_bwmode_inprogress) |
742 | return; | 728 | return; |
743 | rtlphy->set_bwmode_inprogress = true; | 729 | rtlphy->set_bwmode_inprogress = true; |
744 | if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) | 730 | if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) { |
745 | rtlpriv->cfg->ops->phy_set_bw_mode_callback(hw); | 731 | rtlphy->set_bwmode_inprogress = false; |
746 | else { | 732 | } else { |
747 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, | 733 | RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
748 | ("FALSE driver sleep or unload\n")); | 734 | ("FALSE driver sleep or unload\n")); |
749 | rtlphy->set_bwmode_inprogress = false; | 735 | rtlphy->set_bwmode_inprogress = false; |
@@ -773,8 +759,9 @@ void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw) | |||
773 | mdelay(delay); | 759 | mdelay(delay); |
774 | else | 760 | else |
775 | continue; | 761 | continue; |
776 | } else | 762 | } else { |
777 | rtlphy->sw_chnl_inprogress = false; | 763 | rtlphy->sw_chnl_inprogress = false; |
764 | } | ||
778 | break; | 765 | break; |
779 | } while (true); | 766 | } while (true); |
780 | RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n")); | 767 | RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n")); |
@@ -811,9 +798,32 @@ u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw) | |||
811 | } | 798 | } |
812 | EXPORT_SYMBOL(rtl92c_phy_sw_chnl); | 799 | EXPORT_SYMBOL(rtl92c_phy_sw_chnl); |
813 | 800 | ||
814 | static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, | 801 | static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable, |
815 | u8 channel, u8 *stage, u8 *step, | 802 | u32 cmdtableidx, u32 cmdtablesz, |
816 | u32 *delay) | 803 | enum swchnlcmd_id cmdid, |
804 | u32 para1, u32 para2, u32 msdelay) | ||
805 | { | ||
806 | struct swchnlcmd *pcmd; | ||
807 | |||
808 | if (cmdtable == NULL) { | ||
809 | RT_ASSERT(false, ("cmdtable cannot be NULL.\n")); | ||
810 | return false; | ||
811 | } | ||
812 | |||
813 | if (cmdtableidx >= cmdtablesz) | ||
814 | return false; | ||
815 | |||
816 | pcmd = cmdtable + cmdtableidx; | ||
817 | pcmd->cmdid = cmdid; | ||
818 | pcmd->para1 = para1; | ||
819 | pcmd->para2 = para2; | ||
820 | pcmd->msdelay = msdelay; | ||
821 | return true; | ||
822 | } | ||
823 | |||
824 | bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, | ||
825 | u8 channel, u8 *stage, u8 *step, | ||
826 | u32 *delay) | ||
817 | { | 827 | { |
818 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 828 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
819 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 829 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
@@ -917,29 +927,6 @@ static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, | |||
917 | return false; | 927 | return false; |
918 | } | 928 | } |
919 | 929 | ||
920 | static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable, | ||
921 | u32 cmdtableidx, u32 cmdtablesz, | ||
922 | enum swchnlcmd_id cmdid, | ||
923 | u32 para1, u32 para2, u32 msdelay) | ||
924 | { | ||
925 | struct swchnlcmd *pcmd; | ||
926 | |||
927 | if (cmdtable == NULL) { | ||
928 | RT_ASSERT(false, ("cmdtable cannot be NULL.\n")); | ||
929 | return false; | ||
930 | } | ||
931 | |||
932 | if (cmdtableidx >= cmdtablesz) | ||
933 | return false; | ||
934 | |||
935 | pcmd = cmdtable + cmdtableidx; | ||
936 | pcmd->cmdid = cmdid; | ||
937 | pcmd->para1 = para1; | ||
938 | pcmd->para2 = para2; | ||
939 | pcmd->msdelay = msdelay; | ||
940 | return true; | ||
941 | } | ||
942 | |||
943 | bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, u32 rfpath) | 930 | bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, u32 rfpath) |
944 | { | 931 | { |
945 | return true; | 932 | return true; |
@@ -1002,13 +989,13 @@ static u8 _rtl92c_phy_path_b_iqk(struct ieee80211_hw *hw) | |||
1002 | reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD); | 989 | reg_ebc = rtl_get_bbreg(hw, 0xebc, MASKDWORD); |
1003 | reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD); | 990 | reg_ec4 = rtl_get_bbreg(hw, 0xec4, MASKDWORD); |
1004 | reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD); | 991 | reg_ecc = rtl_get_bbreg(hw, 0xecc, MASKDWORD); |
992 | |||
1005 | if (!(reg_eac & BIT(31)) && | 993 | if (!(reg_eac & BIT(31)) && |
1006 | (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) && | 994 | (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) && |
1007 | (((reg_ebc & 0x03FF0000) >> 16) != 0x42)) | 995 | (((reg_ebc & 0x03FF0000) >> 16) != 0x42)) |
1008 | result |= 0x01; | 996 | result |= 0x01; |
1009 | else | 997 | else |
1010 | return result; | 998 | return result; |
1011 | |||
1012 | if (!(reg_eac & BIT(30)) && | 999 | if (!(reg_eac & BIT(30)) && |
1013 | (((reg_ec4 & 0x03FF0000) >> 16) != 0x132) && | 1000 | (((reg_ec4 & 0x03FF0000) >> 16) != 0x132) && |
1014 | (((reg_ecc & 0x03FF0000) >> 16) != 0x36)) | 1001 | (((reg_ecc & 0x03FF0000) >> 16) != 0x36)) |
@@ -1023,9 +1010,9 @@ static void _rtl92c_phy_path_a_fill_iqk_matrix(struct ieee80211_hw *hw, | |||
1023 | u32 oldval_0, x, tx0_a, reg; | 1010 | u32 oldval_0, x, tx0_a, reg; |
1024 | long y, tx0_c; | 1011 | long y, tx0_c; |
1025 | 1012 | ||
1026 | if (final_candidate == 0xFF) | 1013 | if (final_candidate == 0xFF) { |
1027 | return; | 1014 | return; |
1028 | else if (iqk_ok) { | 1015 | } else if (iqk_ok) { |
1029 | oldval_0 = (rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE, | 1016 | oldval_0 = (rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE, |
1030 | MASKDWORD) >> 22) & 0x3FF; | 1017 | MASKDWORD) >> 22) & 0x3FF; |
1031 | x = result[final_candidate][0]; | 1018 | x = result[final_candidate][0]; |
@@ -1063,9 +1050,9 @@ static void _rtl92c_phy_path_b_fill_iqk_matrix(struct ieee80211_hw *hw, | |||
1063 | u32 oldval_1, x, tx1_a, reg; | 1050 | u32 oldval_1, x, tx1_a, reg; |
1064 | long y, tx1_c; | 1051 | long y, tx1_c; |
1065 | 1052 | ||
1066 | if (final_candidate == 0xFF) | 1053 | if (final_candidate == 0xFF) { |
1067 | return; | 1054 | return; |
1068 | else if (iqk_ok) { | 1055 | } else if (iqk_ok) { |
1069 | oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, | 1056 | oldval_1 = (rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, |
1070 | MASKDWORD) >> 22) & 0x3FF; | 1057 | MASKDWORD) >> 22) & 0x3FF; |
1071 | x = result[final_candidate][4]; | 1058 | x = result[final_candidate][4]; |
@@ -1282,6 +1269,7 @@ static void _rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, | |||
1282 | RFPGA0_XA_HSSIPARAMETER1, | 1269 | RFPGA0_XA_HSSIPARAMETER1, |
1283 | BIT(8)); | 1270 | BIT(8)); |
1284 | } | 1271 | } |
1272 | |||
1285 | if (!rtlphy->rfpi_enable) | 1273 | if (!rtlphy->rfpi_enable) |
1286 | _rtl92c_phy_pi_mode_switch(hw, true); | 1274 | _rtl92c_phy_pi_mode_switch(hw, true); |
1287 | if (t == 0) { | 1275 | if (t == 0) { |
@@ -1317,9 +1305,10 @@ static void _rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, | |||
1317 | 0x3FF0000) >> 16; | 1305 | 0x3FF0000) >> 16; |
1318 | break; | 1306 | break; |
1319 | } else if (i == (retrycount - 1) && patha_ok == 0x01) | 1307 | } else if (i == (retrycount - 1) && patha_ok == 0x01) |
1308 | |||
1320 | result[t][0] = (rtl_get_bbreg(hw, 0xe94, | 1309 | result[t][0] = (rtl_get_bbreg(hw, 0xe94, |
1321 | MASKDWORD) & 0x3FF0000) >> | 1310 | MASKDWORD) & 0x3FF0000) >> |
1322 | 16; | 1311 | 16; |
1323 | result[t][1] = | 1312 | result[t][1] = |
1324 | (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & 0x3FF0000) >> 16; | 1313 | (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) & 0x3FF0000) >> 16; |
1325 | 1314 | ||
@@ -1434,7 +1423,7 @@ static void _rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, | |||
1434 | 0x04db25a4, 0x0b1b25a4 | 1423 | 0x04db25a4, 0x0b1b25a4 |
1435 | }; | 1424 | }; |
1436 | 1425 | ||
1437 | u32 apk_offset[PATH_NUM] = { 0xb68, 0xb6c }; | 1426 | const u32 apk_offset[PATH_NUM] = { 0xb68, 0xb6c }; |
1438 | 1427 | ||
1439 | u32 apk_normal_offset[PATH_NUM] = { 0xb28, 0xb98 }; | 1428 | u32 apk_normal_offset[PATH_NUM] = { 0xb28, 0xb98 }; |
1440 | 1429 | ||
@@ -1463,13 +1452,15 @@ static void _rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, | |||
1463 | 0x00050006 | 1452 | 0x00050006 |
1464 | }; | 1453 | }; |
1465 | 1454 | ||
1466 | const u32 apk_result[PATH_NUM][APK_BB_REG_NUM]; | 1455 | u32 apk_result[PATH_NUM][APK_BB_REG_NUM]; |
1467 | 1456 | ||
1468 | long bb_offset, delta_v, delta_offset; | 1457 | long bb_offset, delta_v, delta_offset; |
1469 | 1458 | ||
1470 | if (!is2t) | 1459 | if (!is2t) |
1471 | pathbound = 1; | 1460 | pathbound = 1; |
1472 | 1461 | ||
1462 | return; | ||
1463 | |||
1473 | for (index = 0; index < PATH_NUM; index++) { | 1464 | for (index = 0; index < PATH_NUM; index++) { |
1474 | apk_offset[index] = apk_normal_offset[index]; | 1465 | apk_offset[index] = apk_normal_offset[index]; |
1475 | apk_value[index] = apk_normal_value[index]; | 1466 | apk_value[index] = apk_normal_value[index]; |
@@ -1730,8 +1721,7 @@ static void _rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, | |||
1730 | 0x08)); | 1721 | 0x08)); |
1731 | 1722 | ||
1732 | } | 1723 | } |
1733 | 1724 | rtlphy->b_apk_done = true; | |
1734 | rtlphy->apk_done = true; | ||
1735 | #endif | 1725 | #endif |
1736 | } | 1726 | } |
1737 | 1727 | ||
@@ -1758,6 +1748,7 @@ static void _rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, | |||
1758 | rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1); | 1748 | rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1); |
1759 | 1749 | ||
1760 | } | 1750 | } |
1751 | |||
1761 | } | 1752 | } |
1762 | 1753 | ||
1763 | #undef IQK_ADDA_REG_NUM | 1754 | #undef IQK_ADDA_REG_NUM |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h index 53ffb098158..b09a45842d6 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h +++ b/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h | |||
@@ -27,8 +27,8 @@ | |||
27 | * | 27 | * |
28 | *****************************************************************************/ | 28 | *****************************************************************************/ |
29 | 29 | ||
30 | #ifndef __RTL92C_PHY_H__ | 30 | #ifndef __RTL92C_PHY_COMMON_H__ |
31 | #define __RTL92C_PHY_H__ | 31 | #define __RTL92C_PHY_COMMON_H__ |
32 | 32 | ||
33 | #define MAX_PRECMD_CNT 16 | 33 | #define MAX_PRECMD_CNT 16 |
34 | #define MAX_RFDEPENDCMD_CNT 16 | 34 | #define MAX_RFDEPENDCMD_CNT 16 |
@@ -39,6 +39,7 @@ | |||
39 | #define RT_CANNOT_IO(hw) false | 39 | #define RT_CANNOT_IO(hw) false |
40 | #define HIGHPOWER_RADIOA_ARRAYLEN 22 | 40 | #define HIGHPOWER_RADIOA_ARRAYLEN 22 |
41 | 41 | ||
42 | #define IQK_ADDA_REG_NUM 16 | ||
42 | #define MAX_TOLERANCE 5 | 43 | #define MAX_TOLERANCE 5 |
43 | #define IQK_DELAY_TIME 1 | 44 | #define IQK_DELAY_TIME 1 |
44 | 45 | ||
@@ -56,6 +57,7 @@ | |||
56 | #define IQK_ADDA_REG_NUM 16 | 57 | #define IQK_ADDA_REG_NUM 16 |
57 | #define IQK_MAC_REG_NUM 4 | 58 | #define IQK_MAC_REG_NUM 4 |
58 | 59 | ||
60 | #define IQK_DELAY_TIME 1 | ||
59 | #define RF90_PATH_MAX 2 | 61 | #define RF90_PATH_MAX 2 |
60 | 62 | ||
61 | #define CT_OFFSET_MAC_ADDR 0X16 | 63 | #define CT_OFFSET_MAC_ADDR 0X16 |
@@ -77,6 +79,7 @@ | |||
77 | 79 | ||
78 | #define RTL92C_MAX_PATH_NUM 2 | 80 | #define RTL92C_MAX_PATH_NUM 2 |
79 | #define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER 255 | 81 | #define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER 255 |
82 | |||
80 | enum swchnlcmd_id { | 83 | enum swchnlcmd_id { |
81 | CMDID_END, | 84 | CMDID_END, |
82 | CMDID_SET_TXPOWEROWER_LEVEL, | 85 | CMDID_SET_TXPOWEROWER_LEVEL, |
@@ -184,45 +187,41 @@ struct tx_power_struct { | |||
184 | u32 mcs_original_offset[4][16]; | 187 | u32 mcs_original_offset[4][16]; |
185 | }; | 188 | }; |
186 | 189 | ||
187 | extern u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, | 190 | u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, |
188 | u32 regaddr, u32 bitmask); | 191 | u32 regaddr, u32 bitmask); |
189 | extern void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw, | 192 | void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw, |
190 | u32 regaddr, u32 bitmask, u32 data); | 193 | u32 regaddr, u32 bitmask, u32 data); |
191 | extern u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw, | 194 | u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw, |
192 | enum radio_path rfpath, u32 regaddr, | 195 | enum radio_path rfpath, u32 regaddr, |
193 | u32 bitmask); | 196 | u32 bitmask); |
194 | extern void rtl92c_phy_set_rf_reg(struct ieee80211_hw *hw, | 197 | bool rtl92c_phy_mac_config(struct ieee80211_hw *hw); |
195 | enum radio_path rfpath, u32 regaddr, | 198 | bool rtl92c_phy_bb_config(struct ieee80211_hw *hw); |
196 | u32 bitmask, u32 data); | 199 | bool rtl92c_phy_rf_config(struct ieee80211_hw *hw); |
197 | extern bool rtl92c_phy_mac_config(struct ieee80211_hw *hw); | 200 | bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw, |
198 | extern bool rtl92c_phy_bb_config(struct ieee80211_hw *hw); | ||
199 | extern bool rtl92c_phy_rf_config(struct ieee80211_hw *hw); | ||
200 | extern bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw, | ||
201 | enum radio_path rfpath); | 201 | enum radio_path rfpath); |
202 | extern void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw); | 202 | void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw); |
203 | extern void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, | 203 | void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, |
204 | long *powerlevel); | 204 | long *powerlevel); |
205 | extern void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel); | 205 | void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel); |
206 | extern bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, | 206 | bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw, |
207 | long power_indbm); | 207 | long power_indbm); |
208 | extern void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw, | 208 | void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw, |
209 | u8 operation); | 209 | u8 operation); |
210 | extern void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw); | 210 | void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw, |
211 | extern void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw, | ||
212 | enum nl80211_channel_type ch_type); | 211 | enum nl80211_channel_type ch_type); |
213 | extern void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw); | 212 | void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw); |
214 | extern u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw); | 213 | u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw); |
215 | extern void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery); | 214 | void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery); |
216 | extern void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, | 215 | void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, |
217 | u16 beaconinterval); | 216 | u16 beaconinterval); |
218 | void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta); | 217 | void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta); |
219 | void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw); | 218 | void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw); |
220 | void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain); | 219 | void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain); |
221 | bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, | 220 | bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, |
222 | enum radio_path rfpath); | 221 | enum radio_path rfpath); |
223 | extern bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, | 222 | bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw, |
224 | u32 rfpath); | 223 | u32 rfpath); |
225 | extern bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw, | 224 | bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw, |
226 | enum rf_pwrstate rfpwr_state); | 225 | enum rf_pwrstate rfpwr_state); |
227 | void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw); | 226 | void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw); |
228 | void rtl92c_phy_set_io(struct ieee80211_hw *hw); | 227 | void rtl92c_phy_set_io(struct ieee80211_hw *hw); |
@@ -235,12 +234,9 @@ u8 _rtl92c_phy_dbm_to_txpwr_Idx(struct ieee80211_hw *hw, | |||
235 | enum wireless_mode wirelessmode, | 234 | enum wireless_mode wirelessmode, |
236 | long power_indbm); | 235 | long power_indbm); |
237 | void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw); | 236 | void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw); |
238 | static bool _rtl92c_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable, | 237 | void _rtl92c_phy_set_rf_sleep(struct ieee80211_hw *hw); |
239 | u32 cmdtableidx, u32 cmdtablesz, | 238 | bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, |
240 | enum swchnlcmd_id cmdid, u32 para1, | 239 | u8 channel, u8 *stage, u8 *step, |
241 | u32 para2, u32 msdelay); | 240 | u32 *delay); |
242 | static bool _rtl92c_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw, | ||
243 | u8 channel, u8 *stage, u8 *step, | ||
244 | u32 *delay); | ||
245 | 241 | ||
246 | #endif | 242 | #endif |