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authorLarry Finger <Larry.Finger@lwfinger.net>2007-09-25 19:46:54 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:51:38 -0400
commit75388acd0cd827dc1498043daa7d1c760902cd67 (patch)
tree43fac7501291145963444e439f2ff30b9e5726e3 /drivers/net/wireless/b43legacy/phy.h
parente4d6b7951812d98417feb10784e400e253caf633 (diff)
[B43LEGACY]: add mac80211-based driver for legacy BCM43xx devices
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/wireless/b43legacy/phy.h')
-rw-r--r--drivers/net/wireless/b43legacy/phy.h219
1 files changed, 219 insertions, 0 deletions
diff --git a/drivers/net/wireless/b43legacy/phy.h b/drivers/net/wireless/b43legacy/phy.h
new file mode 100644
index 00000000000..f11b4271714
--- /dev/null
+++ b/drivers/net/wireless/b43legacy/phy.h
@@ -0,0 +1,219 @@
1/*
2
3 Broadcom B43legacy wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11
12 Some parts of the code in this file are derived from the ipw2200
13 driver Copyright(c) 2003 - 2004 Intel Corporation.
14
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
19
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
24
25 You should have received a copy of the GNU General Public License
26 along with this program; see the file COPYING. If not, write to
27 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 Boston, MA 02110-1301, USA.
29
30*/
31
32#ifndef B43legacy_PHY_H_
33#define B43legacy_PHY_H_
34
35#include <linux/types.h>
36
37enum {
38 B43legacy_ANTENNA0, /* Antenna 0 */
39 B43legacy_ANTENNA1, /* Antenna 0 */
40 B43legacy_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */
41 B43legacy_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */
42
43 B43legacy_ANTENNA_AUTO = B43legacy_ANTENNA_AUTO0,
44 B43legacy_ANTENNA_DEFAULT = B43legacy_ANTENNA_AUTO,
45};
46
47enum {
48 B43legacy_INTERFMODE_NONE,
49 B43legacy_INTERFMODE_NONWLAN,
50 B43legacy_INTERFMODE_MANUALWLAN,
51 B43legacy_INTERFMODE_AUTOWLAN,
52};
53
54/*** PHY Registers ***/
55
56/* Routing */
57#define B43legacy_PHYROUTE_OFDM_GPHY 0x400
58#define B43legacy_PHYROUTE_EXT_GPHY 0x800
59
60/* Base registers. */
61#define B43legacy_PHY_BASE(reg) (reg)
62/* OFDM (A) registers of a G-PHY */
63#define B43legacy_PHY_OFDM(reg) ((reg) | B43legacy_PHYROUTE_OFDM_GPHY)
64/* Extended G-PHY registers */
65#define B43legacy_PHY_EXTG(reg) ((reg) | B43legacy_PHYROUTE_EXT_GPHY)
66
67
68/* Extended G-PHY Registers */
69#define B43legacy_PHY_CLASSCTL B43legacy_PHY_EXTG(0x02) /* Classify control */
70#define B43legacy_PHY_GTABCTL B43legacy_PHY_EXTG(0x03) /* G-PHY table control (see below) */
71#define B43legacy_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */
72#define B43legacy_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */
73#define B43legacy_PHY_GTABNR_SHIFT 10
74#define B43legacy_PHY_GTABDATA B43legacy_PHY_EXTG(0x04) /* G-PHY table data */
75#define B43legacy_PHY_LO_MASK B43legacy_PHY_EXTG(0x0F) /* Local Oscillator control mask */
76#define B43legacy_PHY_LO_CTL B43legacy_PHY_EXTG(0x10) /* Local Oscillator control */
77#define B43legacy_PHY_RFOVER B43legacy_PHY_EXTG(0x11) /* RF override */
78#define B43legacy_PHY_RFOVERVAL B43legacy_PHY_EXTG(0x12) /* RF override value */
79/*** OFDM table numbers ***/
80#define B43legacy_OFDMTAB(number, offset) \
81 (((number) << B43legacy_PHY_OTABLENR_SHIFT) \
82 | (offset))
83#define B43legacy_OFDMTAB_AGC1 B43legacy_OFDMTAB(0x00, 0)
84#define B43legacy_OFDMTAB_GAIN0 B43legacy_OFDMTAB(0x00, 0)
85#define B43legacy_OFDMTAB_GAINX B43legacy_OFDMTAB(0x01, 0)
86#define B43legacy_OFDMTAB_GAIN1 B43legacy_OFDMTAB(0x01, 4)
87#define B43legacy_OFDMTAB_AGC3 B43legacy_OFDMTAB(0x02, 0)
88#define B43legacy_OFDMTAB_GAIN2 B43legacy_OFDMTAB(0x02, 3)
89#define B43legacy_OFDMTAB_LNAHPFGAIN1 B43legacy_OFDMTAB(0x03, 0)
90#define B43legacy_OFDMTAB_WRSSI B43legacy_OFDMTAB(0x04, 0)
91#define B43legacy_OFDMTAB_LNAHPFGAIN2 B43legacy_OFDMTAB(0x04, 0)
92#define B43legacy_OFDMTAB_NOISESCALE B43legacy_OFDMTAB(0x05, 0)
93#define B43legacy_OFDMTAB_AGC2 B43legacy_OFDMTAB(0x06, 0)
94#define B43legacy_OFDMTAB_ROTOR B43legacy_OFDMTAB(0x08, 0)
95#define B43legacy_OFDMTAB_ADVRETARD B43legacy_OFDMTAB(0x09, 0)
96#define B43legacy_OFDMTAB_DAC B43legacy_OFDMTAB(0x0C, 0)
97#define B43legacy_OFDMTAB_DC B43legacy_OFDMTAB(0x0E, 7)
98#define B43legacy_OFDMTAB_PWRDYN2 B43legacy_OFDMTAB(0x0E, 12)
99#define B43legacy_OFDMTAB_LNAGAIN B43legacy_OFDMTAB(0x0E, 13)
100
101#define B43legacy_OFDMTAB_LPFGAIN B43legacy_OFDMTAB(0x0F, 12)
102#define B43legacy_OFDMTAB_RSSI B43legacy_OFDMTAB(0x10, 0)
103
104#define B43legacy_OFDMTAB_AGC1_R1 B43legacy_OFDMTAB(0x13, 0)
105#define B43legacy_OFDMTAB_GAINX_R1 B43legacy_OFDMTAB(0x14, 0)
106#define B43legacy_OFDMTAB_MINSIGSQ B43legacy_OFDMTAB(0x14, 1)
107#define B43legacy_OFDMTAB_AGC3_R1 B43legacy_OFDMTAB(0x15, 0)
108#define B43legacy_OFDMTAB_WRSSI_R1 B43legacy_OFDMTAB(0x15, 4)
109#define B43legacy_OFDMTAB_TSSI B43legacy_OFDMTAB(0x15, 0)
110#define B43legacy_OFDMTAB_DACRFPABB B43legacy_OFDMTAB(0x16, 0)
111#define B43legacy_OFDMTAB_DACOFF B43legacy_OFDMTAB(0x17, 0)
112#define B43legacy_OFDMTAB_DCBIAS B43legacy_OFDMTAB(0x18, 0)
113
114void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt);
115
116/* OFDM (A) PHY Registers */
117#define B43legacy_PHY_VERSION_OFDM B43legacy_PHY_OFDM(0x00) /* Versioning register for A-PHY */
118#define B43legacy_PHY_BBANDCFG B43legacy_PHY_OFDM(0x01) /* Baseband config */
119#define B43legacy_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */
120#define B43legacy_PHY_BBANDCFG_RXANT_SHIFT 7
121#define B43legacy_PHY_PWRDOWN B43legacy_PHY_OFDM(0x03) /* Powerdown */
122#define B43legacy_PHY_CRSTHRES1 B43legacy_PHY_OFDM(0x06) /* CRS Threshold 1 */
123#define B43legacy_PHY_LNAHPFCTL B43legacy_PHY_OFDM(0x1C) /* LNA/HPF control */
124#define B43legacy_PHY_ADIVRELATED B43legacy_PHY_OFDM(0x27) /* FIXME rename */
125#define B43legacy_PHY_CRS0 B43legacy_PHY_OFDM(0x29)
126#define B43legacy_PHY_ANTDWELL B43legacy_PHY_OFDM(0x2B) /* Antenna dwell */
127#define B43legacy_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */
128#define B43legacy_PHY_ENCORE B43legacy_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */
129#define B43legacy_PHY_ENCORE_EN 0x0200 /* Encore enable */
130#define B43legacy_PHY_LMS B43legacy_PHY_OFDM(0x55)
131#define B43legacy_PHY_OFDM61 B43legacy_PHY_OFDM(0x61) /* FIXME rename */
132#define B43legacy_PHY_OFDM61_10 0x0010 /* FIXME rename */
133#define B43legacy_PHY_IQBAL B43legacy_PHY_OFDM(0x69) /* I/Q balance */
134#define B43legacy_PHY_OTABLECTL B43legacy_PHY_OFDM(0x72) /* OFDM table control (see below) */
135#define B43legacy_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */
136#define B43legacy_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */
137#define B43legacy_PHY_OTABLENR_SHIFT 10
138#define B43legacy_PHY_OTABLEI B43legacy_PHY_OFDM(0x73) /* OFDM table data I */
139#define B43legacy_PHY_OTABLEQ B43legacy_PHY_OFDM(0x74) /* OFDM table data Q */
140#define B43legacy_PHY_HPWR_TSSICTL B43legacy_PHY_OFDM(0x78) /* Hardware power TSSI control */
141#define B43legacy_PHY_NRSSITHRES B43legacy_PHY_OFDM(0x8A) /* NRSSI threshold */
142#define B43legacy_PHY_ANTWRSETT B43legacy_PHY_OFDM(0x8C) /* Antenna WR settle */
143#define B43legacy_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */
144#define B43legacy_PHY_CLIPPWRDOWNT B43legacy_PHY_OFDM(0x93) /* Clip powerdown threshold */
145#define B43legacy_PHY_OFDM9B B43legacy_PHY_OFDM(0x9B) /* FIXME rename */
146#define B43legacy_PHY_N1P1GAIN B43legacy_PHY_OFDM(0xA0)
147#define B43legacy_PHY_P1P2GAIN B43legacy_PHY_OFDM(0xA1)
148#define B43legacy_PHY_N1N2GAIN B43legacy_PHY_OFDM(0xA2)
149#define B43legacy_PHY_CLIPTHRES B43legacy_PHY_OFDM(0xA3)
150#define B43legacy_PHY_CLIPN1P2THRES B43legacy_PHY_OFDM(0xA4)
151#define B43legacy_PHY_DIVSRCHIDX B43legacy_PHY_OFDM(0xA8) /* Divider search gain/index */
152#define B43legacy_PHY_CLIPP2THRES B43legacy_PHY_OFDM(0xA9)
153#define B43legacy_PHY_CLIPP3THRES B43legacy_PHY_OFDM(0xAA)
154#define B43legacy_PHY_DIVP1P2GAIN B43legacy_PHY_OFDM(0xAB)
155#define B43legacy_PHY_DIVSRCHGAINBACK B43legacy_PHY_OFDM(0xAD) /* Divider search gain back */
156#define B43legacy_PHY_DIVSRCHGAINCHNG B43legacy_PHY_OFDM(0xAE) /* Divider search gain change */
157#define B43legacy_PHY_CRSTHRES1_R1 B43legacy_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */
158#define B43legacy_PHY_CRSTHRES2_R1 B43legacy_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */
159#define B43legacy_PHY_TSSIP_LTBASE B43legacy_PHY_OFDM(0x380) /* TSSI power lookup table base */
160#define B43legacy_PHY_DC_LTBASE B43legacy_PHY_OFDM(0x3A0) /* DC lookup table base */
161#define B43legacy_PHY_GAIN_LTBASE B43legacy_PHY_OFDM(0x3C0) /* Gain lookup table base */
162
163void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt);
164
165/* Masks for the different PHY versioning registers. */
166#define B43legacy_PHYVER_ANALOG 0xF000
167#define B43legacy_PHYVER_ANALOG_SHIFT 12
168#define B43legacy_PHYVER_TYPE 0x0F00
169#define B43legacy_PHYVER_TYPE_SHIFT 8
170#define B43legacy_PHYVER_VERSION 0x00FF
171
172struct b43legacy_wldev;
173
174void b43legacy_raw_phy_lock(struct b43legacy_wldev *dev);
175#define b43legacy_phy_lock(bcm, flags) \
176 do { \
177 local_irq_save(flags); \
178 b43legacy_raw_phy_lock(bcm); \
179 } while (0)
180void b43legacy_raw_phy_unlock(struct b43legacy_wldev *dev);
181#define b43legacy_phy_unlock(bcm, flags) \
182 do { \
183 b43legacy_raw_phy_unlock(bcm); \
184 local_irq_restore(flags); \
185 } while (0)
186
187/* Card uses the loopback gain stuff */
188#define has_loopback_gain(phy) \
189 (((phy)->rev > 1) || ((phy)->gmode))
190
191u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset);
192void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val);
193
194int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev);
195int b43legacy_phy_init(struct b43legacy_wldev *dev);
196
197void b43legacy_set_rx_antenna(struct b43legacy_wldev *dev, int antenna);
198
199void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev);
200void b43legacy_phy_calibrate(struct b43legacy_wldev *dev);
201int b43legacy_phy_connect(struct b43legacy_wldev *dev, int connect);
202
203void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev);
204void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev);
205void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev);
206
207/* Adjust the LocalOscillator to the saved values.
208 * "fixed" is only set to 1 once in initialization. Set to 0 otherwise.
209 */
210void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed);
211void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev);
212
213void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev,
214 u16 baseband_attenuation);
215
216void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev,
217 int bit25, int bit26);
218
219#endif /* B43legacy_PHY_H_ */