diff options
author | Vasanthakumar Thiagarajan <vasanth@atheros.com> | 2010-04-15 17:38:28 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-04-16 15:43:22 -0400 |
commit | ad7b806065f5791696a1c9a4c2665f6421cbbf05 (patch) | |
tree | 89c106bfc49e6407e51a3c2dabfec0feff3090b7 /drivers/net/wireless/ath | |
parent | ae3bb6d4628dae7ead588263177a0674221fea78 (diff) |
ath9k_hw: Add few routines for rx edma support
* Set rx buf size in register 0x60
* Set rxdp on the respective hw rx queue (HP and LP queues)
* Process rx descriptor
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_mac.c | 95 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_mac.h | 12 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 6 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/mac.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 6 |
5 files changed, 121 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c index ee84e64b8b0..20890060ee2 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c | |||
@@ -26,3 +26,98 @@ void ar9003_hw_attach_mac_ops(struct ath_hw *hw) | |||
26 | 26 | ||
27 | ops->rx_enable = ar9003_hw_rx_enable; | 27 | ops->rx_enable = ar9003_hw_rx_enable; |
28 | } | 28 | } |
29 | |||
30 | void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size) | ||
31 | { | ||
32 | REG_WRITE(ah, AR_DATABUF_SIZE, buf_size & AR_DATABUF_SIZE_MASK); | ||
33 | } | ||
34 | EXPORT_SYMBOL(ath9k_hw_set_rx_bufsize); | ||
35 | |||
36 | void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp, | ||
37 | enum ath9k_rx_qtype qtype) | ||
38 | { | ||
39 | if (qtype == ATH9K_RX_QUEUE_HP) | ||
40 | REG_WRITE(ah, AR_HP_RXDP, rxdp); | ||
41 | else | ||
42 | REG_WRITE(ah, AR_LP_RXDP, rxdp); | ||
43 | } | ||
44 | EXPORT_SYMBOL(ath9k_hw_addrxbuf_edma); | ||
45 | |||
46 | int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs, | ||
47 | void *buf_addr) | ||
48 | { | ||
49 | struct ar9003_rxs *rxsp = (struct ar9003_rxs *) buf_addr; | ||
50 | unsigned int phyerr; | ||
51 | |||
52 | /* TODO: byte swap on big endian for ar9300_10 */ | ||
53 | |||
54 | if ((rxsp->status11 & AR_RxDone) == 0) | ||
55 | return -EINPROGRESS; | ||
56 | |||
57 | if (MS(rxsp->ds_info, AR_DescId) != 0x168c) | ||
58 | return -EINVAL; | ||
59 | |||
60 | if ((rxsp->ds_info & (AR_TxRxDesc | AR_CtrlStat)) != 0) | ||
61 | return -EINPROGRESS; | ||
62 | |||
63 | rxs->rs_status = 0; | ||
64 | rxs->rs_flags = 0; | ||
65 | |||
66 | rxs->rs_datalen = rxsp->status2 & AR_DataLen; | ||
67 | rxs->rs_tstamp = rxsp->status3; | ||
68 | |||
69 | /* XXX: Keycache */ | ||
70 | rxs->rs_rssi = MS(rxsp->status5, AR_RxRSSICombined); | ||
71 | rxs->rs_rssi_ctl0 = MS(rxsp->status1, AR_RxRSSIAnt00); | ||
72 | rxs->rs_rssi_ctl1 = MS(rxsp->status1, AR_RxRSSIAnt01); | ||
73 | rxs->rs_rssi_ctl2 = MS(rxsp->status1, AR_RxRSSIAnt02); | ||
74 | rxs->rs_rssi_ext0 = MS(rxsp->status5, AR_RxRSSIAnt10); | ||
75 | rxs->rs_rssi_ext1 = MS(rxsp->status5, AR_RxRSSIAnt11); | ||
76 | rxs->rs_rssi_ext2 = MS(rxsp->status5, AR_RxRSSIAnt12); | ||
77 | |||
78 | if (rxsp->status11 & AR_RxKeyIdxValid) | ||
79 | rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx); | ||
80 | else | ||
81 | rxs->rs_keyix = ATH9K_RXKEYIX_INVALID; | ||
82 | |||
83 | rxs->rs_rate = MS(rxsp->status1, AR_RxRate); | ||
84 | rxs->rs_more = (rxsp->status2 & AR_RxMore) ? 1 : 0; | ||
85 | |||
86 | rxs->rs_isaggr = (rxsp->status11 & AR_RxAggr) ? 1 : 0; | ||
87 | rxs->rs_moreaggr = (rxsp->status11 & AR_RxMoreAggr) ? 1 : 0; | ||
88 | rxs->rs_antenna = (MS(rxsp->status4, AR_RxAntenna) & 0x7); | ||
89 | rxs->rs_flags = (rxsp->status4 & AR_GI) ? ATH9K_RX_GI : 0; | ||
90 | rxs->rs_flags |= (rxsp->status4 & AR_2040) ? ATH9K_RX_2040 : 0; | ||
91 | |||
92 | rxs->evm0 = rxsp->status6; | ||
93 | rxs->evm1 = rxsp->status7; | ||
94 | rxs->evm2 = rxsp->status8; | ||
95 | rxs->evm3 = rxsp->status9; | ||
96 | rxs->evm4 = (rxsp->status10 & 0xffff); | ||
97 | |||
98 | if (rxsp->status11 & AR_PreDelimCRCErr) | ||
99 | rxs->rs_flags |= ATH9K_RX_DELIM_CRC_PRE; | ||
100 | |||
101 | if (rxsp->status11 & AR_PostDelimCRCErr) | ||
102 | rxs->rs_flags |= ATH9K_RX_DELIM_CRC_POST; | ||
103 | |||
104 | if (rxsp->status11 & AR_DecryptBusyErr) | ||
105 | rxs->rs_flags |= ATH9K_RX_DECRYPT_BUSY; | ||
106 | |||
107 | if ((rxsp->status11 & AR_RxFrameOK) == 0) { | ||
108 | if (rxsp->status11 & AR_CRCErr) { | ||
109 | rxs->rs_status |= ATH9K_RXERR_CRC; | ||
110 | } else if (rxsp->status11 & AR_PHYErr) { | ||
111 | rxs->rs_status |= ATH9K_RXERR_PHY; | ||
112 | phyerr = MS(rxsp->status11, AR_PHYErrCode); | ||
113 | rxs->rs_phyerr = phyerr; | ||
114 | } else if (rxsp->status11 & AR_DecryptCRCErr) { | ||
115 | rxs->rs_status |= ATH9K_RXERR_DECRYPT; | ||
116 | } else if (rxsp->status11 & AR_MichaelErr) { | ||
117 | rxs->rs_status |= ATH9K_RXERR_MIC; | ||
118 | } | ||
119 | } | ||
120 | |||
121 | return 0; | ||
122 | } | ||
123 | EXPORT_SYMBOL(ath9k_hw_process_rxdesc_edma); | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.h b/drivers/net/wireless/ath/ath9k/ar9003_mac.h index 2a9d80e9e0c..b22f78c320c 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.h | |||
@@ -17,6 +17,11 @@ | |||
17 | #ifndef AR9003_MAC_H | 17 | #ifndef AR9003_MAC_H |
18 | #define AR9003_MAC_H | 18 | #define AR9003_MAC_H |
19 | 19 | ||
20 | #define AR_DescId 0xffff0000 | ||
21 | #define AR_DescId_S 16 | ||
22 | #define AR_CtrlStat 0x00004000 | ||
23 | #define AR_TxRxDesc 0x00008000 | ||
24 | |||
20 | struct ar9003_rxs { | 25 | struct ar9003_rxs { |
21 | u32 ds_info; | 26 | u32 ds_info; |
22 | u32 status1; | 27 | u32 status1; |
@@ -33,5 +38,12 @@ struct ar9003_rxs { | |||
33 | } __packed; | 38 | } __packed; |
34 | 39 | ||
35 | void ar9003_hw_attach_mac_ops(struct ath_hw *hw); | 40 | void ar9003_hw_attach_mac_ops(struct ath_hw *hw); |
41 | void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size); | ||
42 | void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp, | ||
43 | enum ath9k_rx_qtype qtype); | ||
44 | |||
45 | int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, | ||
46 | struct ath_rx_status *rxs, | ||
47 | void *buf_addr); | ||
36 | 48 | ||
37 | #endif | 49 | #endif |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index b07ee8d6d33..d713ff2dfc5 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -370,6 +370,12 @@ enum ser_reg_mode { | |||
370 | SER_REG_MODE_AUTO = 2, | 370 | SER_REG_MODE_AUTO = 2, |
371 | }; | 371 | }; |
372 | 372 | ||
373 | enum ath9k_rx_qtype { | ||
374 | ATH9K_RX_QUEUE_HP, | ||
375 | ATH9K_RX_QUEUE_LP, | ||
376 | ATH9K_RX_QUEUE_MAX, | ||
377 | }; | ||
378 | |||
373 | struct ath9k_beacon_state { | 379 | struct ath9k_beacon_state { |
374 | u32 bs_nexttbtt; | 380 | u32 bs_nexttbtt; |
375 | u32 bs_nextdtim; | 381 | u32 bs_nextdtim; |
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h index 9e8500a8c80..126a4030be1 100644 --- a/drivers/net/wireless/ath/ath9k/mac.h +++ b/drivers/net/wireless/ath/ath9k/mac.h | |||
@@ -148,6 +148,8 @@ struct ath_rx_status { | |||
148 | u32 evm0; | 148 | u32 evm0; |
149 | u32 evm1; | 149 | u32 evm1; |
150 | u32 evm2; | 150 | u32 evm2; |
151 | u32 evm3; | ||
152 | u32 evm4; | ||
151 | }; | 153 | }; |
152 | 154 | ||
153 | struct ath_htc_rx_status { | 155 | struct ath_htc_rx_status { |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index d5248914916..bc48bc92076 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -144,6 +144,9 @@ | |||
144 | #define AR_MACMISC_MISC_OBS_BUS_MSB_S 15 | 144 | #define AR_MACMISC_MISC_OBS_BUS_MSB_S 15 |
145 | #define AR_MACMISC_MISC_OBS_BUS_1 1 | 145 | #define AR_MACMISC_MISC_OBS_BUS_1 1 |
146 | 146 | ||
147 | #define AR_DATABUF_SIZE 0x0060 | ||
148 | #define AR_DATABUF_SIZE_MASK 0x00000FFF | ||
149 | |||
147 | #define AR_GTXTO 0x0064 | 150 | #define AR_GTXTO 0x0064 |
148 | #define AR_GTXTO_TIMEOUT_COUNTER 0x0000FFFF | 151 | #define AR_GTXTO_TIMEOUT_COUNTER 0x0000FFFF |
149 | #define AR_GTXTO_TIMEOUT_LIMIT 0xFFFF0000 | 152 | #define AR_GTXTO_TIMEOUT_LIMIT 0xFFFF0000 |
@@ -160,6 +163,9 @@ | |||
160 | #define AR_CST_TIMEOUT_LIMIT 0xFFFF0000 | 163 | #define AR_CST_TIMEOUT_LIMIT 0xFFFF0000 |
161 | #define AR_CST_TIMEOUT_LIMIT_S 16 | 164 | #define AR_CST_TIMEOUT_LIMIT_S 16 |
162 | 165 | ||
166 | #define AR_HP_RXDP 0x0074 | ||
167 | #define AR_LP_RXDP 0x0078 | ||
168 | |||
163 | #define AR_ISR 0x0080 | 169 | #define AR_ISR 0x0080 |
164 | #define AR_ISR_RXOK 0x00000001 | 170 | #define AR_ISR_RXOK 0x00000001 |
165 | #define AR_ISR_RXDESC 0x00000002 | 171 | #define AR_ISR_RXDESC 0x00000002 |