diff options
author | Vasanthakumar Thiagarajan <vasanth@atheros.com> | 2011-04-19 09:59:15 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-25 14:50:12 -0400 |
commit | 2976bc5ebfb6c6dd37b4513540e567de0a2313f7 (patch) | |
tree | 8d6eccfdccb245ac33185277790fec26baa04914 /drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | |
parent | 2be7bfe0b454bc7c60ede777907ec817baa6196e (diff) |
ath9k_hw: Configure chain switch table and attenuation control only for active chains
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_eeprom.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 44 |
1 files changed, 26 insertions, 18 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 262fb62c9a8..fd9b8c400f7 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | |||
@@ -3501,23 +3501,28 @@ static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, | |||
3501 | 3501 | ||
3502 | static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) | 3502 | static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) |
3503 | { | 3503 | { |
3504 | int chain; | ||
3505 | static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = { | ||
3506 | AR_PHY_SWITCH_CHAIN_0, | ||
3507 | AR_PHY_SWITCH_CHAIN_1, | ||
3508 | AR_PHY_SWITCH_CHAIN_2, | ||
3509 | }; | ||
3510 | |||
3504 | u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz); | 3511 | u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz); |
3512 | |||
3505 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, AR_SWITCH_TABLE_COM_ALL, value); | 3513 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, AR_SWITCH_TABLE_COM_ALL, value); |
3506 | 3514 | ||
3507 | value = ar9003_hw_ant_ctrl_common_2_get(ah, is2ghz); | 3515 | value = ar9003_hw_ant_ctrl_common_2_get(ah, is2ghz); |
3508 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value); | 3516 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value); |
3509 | 3517 | ||
3510 | value = ar9003_hw_ant_ctrl_chain_get(ah, 0, is2ghz); | 3518 | for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { |
3511 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_CHAIN_0, AR_SWITCH_TABLE_ALL, value); | 3519 | if ((ah->rxchainmask & BIT(chain)) || |
3512 | 3520 | (ah->txchainmask & BIT(chain))) { | |
3513 | if (!AR_SREV_9485(ah)) { | 3521 | value = ar9003_hw_ant_ctrl_chain_get(ah, chain, |
3514 | value = ar9003_hw_ant_ctrl_chain_get(ah, 1, is2ghz); | 3522 | is2ghz); |
3515 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_CHAIN_1, AR_SWITCH_TABLE_ALL, | 3523 | REG_RMW_FIELD(ah, switch_chain_reg[chain], |
3516 | value); | 3524 | AR_SWITCH_TABLE_ALL, value); |
3517 | 3525 | } | |
3518 | value = ar9003_hw_ant_ctrl_chain_get(ah, 2, is2ghz); | ||
3519 | REG_RMW_FIELD(ah, AR_PHY_SWITCH_CHAIN_2, AR_SWITCH_TABLE_ALL, | ||
3520 | value); | ||
3521 | } | 3526 | } |
3522 | 3527 | ||
3523 | if (AR_SREV_9485(ah)) { | 3528 | if (AR_SREV_9485(ah)) { |
@@ -3638,13 +3643,16 @@ static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan) | |||
3638 | 3643 | ||
3639 | /* Test value. if 0 then attenuation is unused. Don't load anything. */ | 3644 | /* Test value. if 0 then attenuation is unused. Don't load anything. */ |
3640 | for (i = 0; i < 3; i++) { | 3645 | for (i = 0; i < 3; i++) { |
3641 | value = ar9003_hw_atten_chain_get(ah, i, chan); | 3646 | if (ah->txchainmask & BIT(i)) { |
3642 | REG_RMW_FIELD(ah, ext_atten_reg[i], | 3647 | value = ar9003_hw_atten_chain_get(ah, i, chan); |
3643 | AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value); | 3648 | REG_RMW_FIELD(ah, ext_atten_reg[i], |
3644 | 3649 | AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value); | |
3645 | value = ar9003_hw_atten_chain_get_margin(ah, i, chan); | 3650 | |
3646 | REG_RMW_FIELD(ah, ext_atten_reg[i], | 3651 | value = ar9003_hw_atten_chain_get_margin(ah, i, chan); |
3647 | AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, value); | 3652 | REG_RMW_FIELD(ah, ext_atten_reg[i], |
3653 | AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, | ||
3654 | value); | ||
3655 | } | ||
3648 | } | 3656 | } |
3649 | } | 3657 | } |
3650 | 3658 | ||