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authorInaky Perez-Gonzalez <inaky@linux.intel.com>2008-12-20 19:57:47 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-01-07 13:00:19 -0500
commitaa5a7acabe31ec27a212cbd25cad9f72aa476591 (patch)
tree1008c15e2288ca03580ee2b403006ad879938e51 /drivers/net/wimax/i2400m/tx.c
parent467cc396fb4665957bc7d182c96e45a4d7c575e4 (diff)
i2400m: RX and TX data/control paths
Handling of TX/RX data to/from the i2400m device (IP packets, control and diagnostics). On RX, this parses the received read transaction from the device, breaks it in chunks and passes it to the corresponding subsystems (network and control). Transmission to the device is done through a software FIFO, as data/control frames can be coalesced (while the device is reading the previous tx transaction, others accumulate). A FIFO is used because at the end it is resource-cheaper that scatter/gather over USB. As well, most traffic is going to be download (vs upload). Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/net/wimax/i2400m/tx.c')
-rw-r--r--drivers/net/wimax/i2400m/tx.c817
1 files changed, 817 insertions, 0 deletions
diff --git a/drivers/net/wimax/i2400m/tx.c b/drivers/net/wimax/i2400m/tx.c
new file mode 100644
index 00000000000..613a88ffd65
--- /dev/null
+++ b/drivers/net/wimax/i2400m/tx.c
@@ -0,0 +1,817 @@
1/*
2 * Intel Wireless WiMAX Connection 2400m
3 * Generic (non-bus specific) TX handling
4 *
5 *
6 * Copyright (C) 2007-2008 Intel Corporation. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * * Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in
16 * the documentation and/or other materials provided with the
17 * distribution.
18 * * Neither the name of Intel Corporation nor the names of its
19 * contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 *
35 * Intel Corporation <linux-wimax@intel.com>
36 * Yanir Lubetkin <yanirx.lubetkin@intel.com>
37 * - Initial implementation
38 *
39 * Intel Corporation <linux-wimax@intel.com>
40 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
41 * - Rewritten to use a single FIFO to lower the memory allocation
42 * pressure and optimize cache hits when copying to the queue, as
43 * well as splitting out bus-specific code.
44 *
45 *
46 * Implements data transmission to the device; this is done through a
47 * software FIFO, as data/control frames can be coalesced (while the
48 * device is reading the previous tx transaction, others accumulate).
49 *
50 * A FIFO is used because at the end it is resource-cheaper that trying
51 * to implement scatter/gather over USB. As well, most traffic is going
52 * to be download (vs upload).
53 *
54 * The format for sending/receiving data to/from the i2400m is
55 * described in detail in rx.c:PROTOCOL FORMAT. In here we implement
56 * the transmission of that. This is split between a bus-independent
57 * part that just prepares everything and a bus-specific part that
58 * does the actual transmission over the bus to the device (in the
59 * bus-specific driver).
60 *
61 *
62 * The general format of a device-host transaction is MSG-HDR, PLD1,
63 * PLD2...PLDN, PL1, PL2,...PLN, PADDING.
64 *
65 * Because we need the send payload descriptors and then payloads and
66 * because it is kind of expensive to do scatterlists in USB (one URB
67 * per node), it becomes cheaper to append all the data to a FIFO
68 * (copying to a FIFO potentially in cache is cheaper).
69 *
70 * Then the bus-specific code takes the parts of that FIFO that are
71 * written and passes them to the device.
72 *
73 * So the concepts to keep in mind there are:
74 *
75 * We use a FIFO to queue the data in a linear buffer. We first append
76 * a MSG-HDR, space for I2400M_TX_PLD_MAX payload descriptors and then
77 * go appending payloads until we run out of space or of payload
78 * descriptors. Then we append padding to make the whole transaction a
79 * multiple of i2400m->bus_tx_block_size (as defined by the bus layer).
80 *
81 * - A TX message: a combination of a message header, payload
82 * descriptors and payloads.
83 *
84 * Open: it is marked as active (i2400m->tx_msg is valid) and we
85 * can keep adding payloads to it.
86 *
87 * Closed: we are not appending more payloads to this TX message
88 * (exahusted space in the queue, too many payloads or
89 * whichever). We have appended padding so the whole message
90 * length is aligned to i2400m->bus_tx_block_size (as set by the
91 * bus/transport layer).
92 *
93 * - Most of the time we keep a TX message open to which we append
94 * payloads.
95 *
96 * - If we are going to append and there is no more space (we are at
97 * the end of the FIFO), we close the message, mark the rest of the
98 * FIFO space unusable (skip_tail), create a new message at the
99 * beginning of the FIFO (if there is space) and append the message
100 * there.
101 *
102 * This is because we need to give linear TX messages to the bus
103 * engine. So we don't write a message to the remaining FIFO space
104 * until the tail and continue at the head of it.
105 *
106 * - We overload one of the fields in the message header to use it as
107 * 'size' of the TX message, so we can iterate over them. It also
108 * contains a flag that indicates if we have to skip it or not.
109 * When we send the buffer, we update that to its real on-the-wire
110 * value.
111 *
112 * - The MSG-HDR PLD1...PLD2 stuff has to be a size multiple of 16.
113 *
114 * It follows that if MSG-HDR says we have N messages, the whole
115 * header + descriptors is 16 + 4*N; for those to be a multiple of
116 * 16, it follows that N can be 4, 8, 12, ... (32, 48, 64, 80...
117 * bytes).
118 *
119 * So if we have only 1 payload, we have to submit a header that in
120 * all truth has space for 4.
121 *
122 * The implication is that we reserve space for 12 (64 bytes); but
123 * if we fill up only (eg) 2, our header becomes 32 bytes only. So
124 * the TX engine has to shift those 32 bytes of msg header and 2
125 * payloads and padding so that right after it the payloads start
126 * and the TX engine has to know about that.
127 *
128 * It is cheaper to move the header up than the whole payloads down.
129 *
130 * We do this in i2400m_tx_close(). See 'i2400m_msg_hdr->offset'.
131 *
132 * - Each payload has to be size-padded to 16 bytes; before appending
133 * it, we just do it.
134 *
135 * - The whole message has to be padded to i2400m->bus_tx_block_size;
136 * we do this at close time. Thus, when reserving space for the
137 * payload, we always make sure there is also free space for this
138 * padding that sooner or later will happen.
139 *
140 * When we append a message, we tell the bus specific code to kick in
141 * TXs. It will TX (in parallel) until the buffer is exhausted--hence
142 * the lockin we do. The TX code will only send a TX message at the
143 * time (which remember, might contain more than one payload). Of
144 * course, when the bus-specific driver attempts to TX a message that
145 * is still open, it gets closed first.
146 *
147 * Gee, this is messy; well a picture. In the example below we have a
148 * partially full FIFO, with a closed message ready to be delivered
149 * (with a moved message header to make sure it is size-aligned to
150 * 16), TAIL room that was unusable (and thus is marked with a message
151 * header that says 'skip this') and at the head of the buffer, an
152 * imcomplete message with a couple of payloads.
153 *
154 * N ___________________________________________________
155 * | |
156 * | TAIL room |
157 * | |
158 * | msg_hdr to skip (size |= 0x80000) |
159 * |---------------------------------------------------|-------
160 * | | /|\
161 * | | |
162 * | TX message padding | |
163 * | | |
164 * | | |
165 * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
166 * | | |
167 * | payload 1 | |
168 * | | N * tx_block_size
169 * | | |
170 * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
171 * | | |
172 * | payload 1 | |
173 * | | |
174 * | | |
175 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- -|- - - -
176 * | padding 3 /|\ | | /|\
177 * | padding 2 | | | |
178 * | pld 1 32 bytes (2 * 16) | | |
179 * | pld 0 | | | |
180 * | moved msg_hdr \|/ | \|/ |
181 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- - - |
182 * | | _PLD_SIZE
183 * | unused | |
184 * | | |
185 * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
186 * | msg_hdr (size X) [this message is closed] | \|/
187 * |===================================================|========== <=== OUT
188 * | |
189 * | |
190 * | |
191 * | Free rooom |
192 * | |
193 * | |
194 * | |
195 * | |
196 * | |
197 * | |
198 * | |
199 * | |
200 * | |
201 * |===================================================|========== <=== IN
202 * | |
203 * | |
204 * | |
205 * | |
206 * | payload 1 |
207 * | |
208 * | |
209 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
210 * | |
211 * | payload 0 |
212 * | |
213 * | |
214 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
215 * | pld 11 /|\ |
216 * | ... | |
217 * | pld 1 64 bytes (2 * 16) |
218 * | pld 0 | |
219 * | msg_hdr (size X) \|/ [message is open] |
220 * 0 ---------------------------------------------------
221 *
222 *
223 * ROADMAP
224 *
225 * i2400m_tx_setup() Called by i2400m_setup
226 * i2400m_tx_release() Called by i2400m_release()
227 *
228 * i2400m_tx() Called to send data or control frames
229 * i2400m_tx_fifo_push() Allocates append-space in the FIFO
230 * i2400m_tx_new() Opens a new message in the FIFO
231 * i2400m_tx_fits() Checks if a new payload fits in the message
232 * i2400m_tx_close() Closes an open message in the FIFO
233 * i2400m_tx_skip_tail() Marks unusable FIFO tail space
234 * i2400m->bus_tx_kick()
235 *
236 * Now i2400m->bus_tx_kick() is the the bus-specific driver backend
237 * implementation; that would do:
238 *
239 * i2400m->bus_tx_kick()
240 * i2400m_tx_msg_get() Gets first message ready to go
241 * ...sends it...
242 * i2400m_tx_msg_sent() Ack the message is sent; repeat from
243 * _tx_msg_get() until it returns NULL
244 * (FIFO empty).
245 */
246#include <linux/netdevice.h>
247#include "i2400m.h"
248
249
250#define D_SUBMODULE tx
251#include "debug-levels.h"
252
253enum {
254 /**
255 * TX Buffer size
256 *
257 * Doc says maximum transaction is 16KiB. If we had 16KiB en
258 * route and 16KiB being queued, it boils down to needing
259 * 32KiB.
260 */
261 I2400M_TX_BUF_SIZE = 32768,
262 /**
263 * Message header and payload descriptors have to be 16
264 * aligned (16 + 4 * N = 16 * M). If we take that average sent
265 * packets are MTU size (~1400-~1500) it follows that we could
266 * fit at most 10-11 payloads in one transaction. To meet the
267 * alignment requirement, that means we need to leave space
268 * for 12 (64 bytes). To simplify, we leave space for that. If
269 * at the end there are less, we pad up to the nearest
270 * multiple of 16.
271 */
272 I2400M_TX_PLD_MAX = 12,
273 I2400M_TX_PLD_SIZE = sizeof(struct i2400m_msg_hdr)
274 + I2400M_TX_PLD_MAX * sizeof(struct i2400m_pld),
275 I2400M_TX_SKIP = 0x80000000,
276};
277
278#define TAIL_FULL ((void *)~(unsigned long)NULL)
279
280/*
281 * Allocate @size bytes in the TX fifo, return a pointer to it
282 *
283 * @i2400m: device descriptor
284 * @size: size of the buffer we need to allocate
285 * @padding: ensure that there is at least this many bytes of free
286 * contiguous space in the fifo. This is needed because later on
287 * we might need to add padding.
288 *
289 * Returns:
290 *
291 * Pointer to the allocated space. NULL if there is no
292 * space. TAIL_FULL if there is no space at the tail but there is at
293 * the head (Case B below).
294 *
295 * These are the two basic cases we need to keep an eye for -- it is
296 * much better explained in linux/kernel/kfifo.c, but this code
297 * basically does the same. No rocket science here.
298 *
299 * Case A Case B
300 * N ___________ ___________
301 * | tail room | | data |
302 * | | | |
303 * |<- IN ->| |<- OUT ->|
304 * | | | |
305 * | data | | room |
306 * | | | |
307 * |<- OUT ->| |<- IN ->|
308 * | | | |
309 * | head room | | data |
310 * 0 ----------- -----------
311 *
312 * We allocate only *contiguous* space.
313 *
314 * We can allocate only from 'room'. In Case B, it is simple; in case
315 * A, we only try from the tail room; if it is not enough, we just
316 * fail and return TAIL_FULL and let the caller figure out if we wants to
317 * skip the tail room and try to allocate from the head.
318 *
319 * Note:
320 *
321 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
322 *
323 * The indexes keep increasing and we reset them to zero when we
324 * pop data off the queue
325 */
326static
327void *i2400m_tx_fifo_push(struct i2400m *i2400m, size_t size, size_t padding)
328{
329 struct device *dev = i2400m_dev(i2400m);
330 size_t room, tail_room, needed_size;
331 void *ptr;
332
333 needed_size = size + padding;
334 room = I2400M_TX_BUF_SIZE - (i2400m->tx_in - i2400m->tx_out);
335 if (room < needed_size) { /* this takes care of Case B */
336 d_printf(2, dev, "fifo push %zu/%zu: no space\n",
337 size, padding);
338 return NULL;
339 }
340 /* Is there space at the tail? */
341 tail_room = I2400M_TX_BUF_SIZE - i2400m->tx_in % I2400M_TX_BUF_SIZE;
342 if (tail_room < needed_size) {
343 if (i2400m->tx_out % I2400M_TX_BUF_SIZE
344 < i2400m->tx_in % I2400M_TX_BUF_SIZE) {
345 d_printf(2, dev, "fifo push %zu/%zu: tail full\n",
346 size, padding);
347 return TAIL_FULL; /* There might be head space */
348 } else {
349 d_printf(2, dev, "fifo push %zu/%zu: no head space\n",
350 size, padding);
351 return NULL; /* There is no space */
352 }
353 }
354 ptr = i2400m->tx_buf + i2400m->tx_in % I2400M_TX_BUF_SIZE;
355 d_printf(2, dev, "fifo push %zu/%zu: at @%zu\n", size, padding,
356 i2400m->tx_in % I2400M_TX_BUF_SIZE);
357 i2400m->tx_in += size;
358 return ptr;
359}
360
361
362/*
363 * Mark the tail of the FIFO buffer as 'to-skip'
364 *
365 * We should never hit the BUG_ON() because all the sizes we push to
366 * the FIFO are padded to be a multiple of 16 -- the size of *msg
367 * (I2400M_PL_PAD for the payloads, I2400M_TX_PLD_SIZE for the
368 * header).
369 *
370 * Note:
371 *
372 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
373 */
374static
375void i2400m_tx_skip_tail(struct i2400m *i2400m)
376{
377 struct device *dev = i2400m_dev(i2400m);
378 size_t tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
379 size_t tail_room = I2400M_TX_BUF_SIZE - tx_in;
380 struct i2400m_msg_hdr *msg = i2400m->tx_buf + tx_in;
381 BUG_ON(tail_room < sizeof(*msg));
382 msg->size = tail_room | I2400M_TX_SKIP;
383 d_printf(2, dev, "skip tail: skipping %zu bytes @%zu\n",
384 tail_room, tx_in);
385 i2400m->tx_in += tail_room;
386}
387
388
389/*
390 * Check if a skb will fit in the TX queue's current active TX
391 * message (if there are still descriptors left unused).
392 *
393 * Returns:
394 * 0 if the message won't fit, 1 if it will.
395 *
396 * Note:
397 *
398 * Assumes a TX message is active (i2400m->tx_msg).
399 *
400 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
401 */
402static
403unsigned i2400m_tx_fits(struct i2400m *i2400m)
404{
405 struct i2400m_msg_hdr *msg_hdr = i2400m->tx_msg;
406 return le16_to_cpu(msg_hdr->num_pls) < I2400M_TX_PLD_MAX;
407
408}
409
410
411/*
412 * Start a new TX message header in the queue.
413 *
414 * Reserve memory from the base FIFO engine and then just initialize
415 * the message header.
416 *
417 * We allocate the biggest TX message header we might need (one that'd
418 * fit I2400M_TX_PLD_MAX payloads) -- when it is closed it will be
419 * 'ironed it out' and the unneeded parts removed.
420 *
421 * NOTE:
422 *
423 * Assumes that the previous message is CLOSED (eg: either
424 * there was none or 'i2400m_tx_close()' was called on it).
425 *
426 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
427 */
428static
429void i2400m_tx_new(struct i2400m *i2400m)
430{
431 struct device *dev = i2400m_dev(i2400m);
432 struct i2400m_msg_hdr *tx_msg;
433 BUG_ON(i2400m->tx_msg != NULL);
434try_head:
435 tx_msg = i2400m_tx_fifo_push(i2400m, I2400M_TX_PLD_SIZE, 0);
436 if (tx_msg == NULL)
437 goto out;
438 else if (tx_msg == TAIL_FULL) {
439 i2400m_tx_skip_tail(i2400m);
440 d_printf(2, dev, "new TX message: tail full, trying head\n");
441 goto try_head;
442 }
443 memset(tx_msg, 0, I2400M_TX_PLD_SIZE);
444 tx_msg->size = I2400M_TX_PLD_SIZE;
445out:
446 i2400m->tx_msg = tx_msg;
447 d_printf(2, dev, "new TX message: %p @%zu\n",
448 tx_msg, (void *) tx_msg - i2400m->tx_buf);
449}
450
451
452/*
453 * Finalize the current TX message header
454 *
455 * Sets the message header to be at the proper location depending on
456 * how many descriptors we have (check documentation at the file's
457 * header for more info on that).
458 *
459 * Appends padding bytes to make sure the whole TX message (counting
460 * from the 'relocated' message header) is aligned to
461 * tx_block_size. We assume the _append() code has left enough space
462 * in the FIFO for that. If there are no payloads, just pass, as it
463 * won't be transferred.
464 *
465 * The amount of padding bytes depends on how many payloads are in the
466 * TX message, as the "msg header and payload descriptors" will be
467 * shifted up in the buffer.
468 */
469static
470void i2400m_tx_close(struct i2400m *i2400m)
471{
472 struct device *dev = i2400m_dev(i2400m);
473 struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
474 struct i2400m_msg_hdr *tx_msg_moved;
475 size_t aligned_size, padding, hdr_size;
476 void *pad_buf;
477
478 if (tx_msg->size & I2400M_TX_SKIP) /* a skipper? nothing to do */
479 goto out;
480
481 /* Relocate the message header
482 *
483 * Find the current header size, align it to 16 and if we need
484 * to move it so the tail is next to the payloads, move it and
485 * set the offset.
486 *
487 * If it moved, this header is good only for transmission; the
488 * original one (it is kept if we moved) is still used to
489 * figure out where the next TX message starts (and where the
490 * offset to the moved header is).
491 */
492 hdr_size = sizeof(*tx_msg)
493 + le16_to_cpu(tx_msg->num_pls) * sizeof(tx_msg->pld[0]);
494 hdr_size = ALIGN(hdr_size, I2400M_PL_PAD);
495 tx_msg->offset = I2400M_TX_PLD_SIZE - hdr_size;
496 tx_msg_moved = (void *) tx_msg + tx_msg->offset;
497 memmove(tx_msg_moved, tx_msg, hdr_size);
498 tx_msg_moved->size -= tx_msg->offset;
499 /*
500 * Now figure out how much we have to add to the (moved!)
501 * message so the size is a multiple of i2400m->bus_tx_block_size.
502 */
503 aligned_size = ALIGN(tx_msg_moved->size, i2400m->bus_tx_block_size);
504 padding = aligned_size - tx_msg_moved->size;
505 if (padding > 0) {
506 pad_buf = i2400m_tx_fifo_push(i2400m, padding, 0);
507 if (unlikely(WARN_ON(pad_buf == NULL
508 || pad_buf == TAIL_FULL))) {
509 /* This should not happen -- append should verify
510 * there is always space left at least to append
511 * tx_block_size */
512 dev_err(dev,
513 "SW BUG! Possible data leakage from memory the "
514 "device should not read for padding - "
515 "size %lu aligned_size %zu tx_buf %p in "
516 "%zu out %zu\n",
517 (unsigned long) tx_msg_moved->size,
518 aligned_size, i2400m->tx_buf, i2400m->tx_in,
519 i2400m->tx_out);
520 } else
521 memset(pad_buf, 0xad, padding);
522 }
523 tx_msg_moved->padding = cpu_to_le16(padding);
524 tx_msg_moved->size += padding;
525 if (tx_msg != tx_msg_moved)
526 tx_msg->size += padding;
527out:
528 i2400m->tx_msg = NULL;
529}
530
531
532/**
533 * i2400m_tx - send the data in a buffer to the device
534 *
535 * @buf: pointer to the buffer to transmit
536 *
537 * @buf_len: buffer size
538 *
539 * @pl_type: type of the payload we are sending.
540 *
541 * Returns:
542 * 0 if ok, < 0 errno code on error (-ENOSPC, if there is no more
543 * room for the message in the queue).
544 *
545 * Appends the buffer to the TX FIFO and notifies the bus-specific
546 * part of the driver that there is new data ready to transmit.
547 * Once this function returns, the buffer has been copied, so it can
548 * be reused.
549 *
550 * The steps followed to append are explained in detail in the file
551 * header.
552 *
553 * Whenever we write to a message, we increase msg->size, so it
554 * reflects exactly how big the message is. This is needed so that if
555 * we concatenate two messages before they can be sent, the code that
556 * sends the messages can find the boundaries (and it will replace the
557 * size with the real barker before sending).
558 *
559 * Note:
560 *
561 * Cold and warm reset payloads need to be sent as a single
562 * payload, so we handle that.
563 */
564int i2400m_tx(struct i2400m *i2400m, const void *buf, size_t buf_len,
565 enum i2400m_pt pl_type)
566{
567 int result = -ENOSPC;
568 struct device *dev = i2400m_dev(i2400m);
569 unsigned long flags;
570 size_t padded_len;
571 void *ptr;
572 unsigned is_singleton = pl_type == I2400M_PT_RESET_WARM
573 || pl_type == I2400M_PT_RESET_COLD;
574
575 d_fnstart(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u)\n",
576 i2400m, buf, buf_len, pl_type);
577 padded_len = ALIGN(buf_len, I2400M_PL_PAD);
578 d_printf(5, dev, "padded_len %zd buf_len %zd\n", padded_len, buf_len);
579 /* If there is no current TX message, create one; if the
580 * current one is out of payload slots or we have a singleton,
581 * close it and start a new one */
582 spin_lock_irqsave(&i2400m->tx_lock, flags);
583try_new:
584 if (unlikely(i2400m->tx_msg == NULL))
585 i2400m_tx_new(i2400m);
586 else if (unlikely(!i2400m_tx_fits(i2400m)
587 || (is_singleton && i2400m->tx_msg->num_pls != 0))) {
588 d_printf(2, dev, "closing TX message (fits %u singleton "
589 "%u num_pls %u)\n", i2400m_tx_fits(i2400m),
590 is_singleton, i2400m->tx_msg->num_pls);
591 i2400m_tx_close(i2400m);
592 i2400m_tx_new(i2400m);
593 }
594 if (i2400m->tx_msg->size + padded_len > I2400M_TX_BUF_SIZE / 2) {
595 d_printf(2, dev, "TX: message too big, going new\n");
596 i2400m_tx_close(i2400m);
597 i2400m_tx_new(i2400m);
598 }
599 if (i2400m->tx_msg == NULL)
600 goto error_tx_new;
601 /* So we have a current message header; now append space for
602 * the message -- if there is not enough, try the head */
603 ptr = i2400m_tx_fifo_push(i2400m, padded_len,
604 i2400m->bus_tx_block_size);
605 if (ptr == TAIL_FULL) { /* Tail is full, try head */
606 d_printf(2, dev, "pl append: tail full\n");
607 i2400m_tx_close(i2400m);
608 i2400m_tx_skip_tail(i2400m);
609 goto try_new;
610 } else if (ptr == NULL) { /* All full */
611 result = -ENOSPC;
612 d_printf(2, dev, "pl append: all full\n");
613 } else { /* Got space, copy it, set padding */
614 struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
615 unsigned num_pls = le16_to_cpu(tx_msg->num_pls);
616 memcpy(ptr, buf, buf_len);
617 memset(ptr + buf_len, 0xad, padded_len - buf_len);
618 i2400m_pld_set(&tx_msg->pld[num_pls], buf_len, pl_type);
619 d_printf(3, dev, "pld 0x%08x (type 0x%1x len 0x%04zx\n",
620 le32_to_cpu(tx_msg->pld[num_pls].val),
621 pl_type, buf_len);
622 tx_msg->num_pls = le16_to_cpu(num_pls+1);
623 tx_msg->size += padded_len;
624 d_printf(2, dev, "TX: appended %zu b (up to %u b) pl #%u \n",
625 padded_len, tx_msg->size, num_pls+1);
626 d_printf(2, dev,
627 "TX: appended hdr @%zu %zu b pl #%u @%zu %zu/%zu b\n",
628 (void *)tx_msg - i2400m->tx_buf, (size_t)tx_msg->size,
629 num_pls+1, ptr - i2400m->tx_buf, buf_len, padded_len);
630 result = 0;
631 if (is_singleton)
632 i2400m_tx_close(i2400m);
633 }
634error_tx_new:
635 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
636 i2400m->bus_tx_kick(i2400m); /* always kick, might free up space */
637 d_fnend(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u) = %d\n",
638 i2400m, buf, buf_len, pl_type, result);
639 return result;
640}
641EXPORT_SYMBOL_GPL(i2400m_tx);
642
643
644/**
645 * i2400m_tx_msg_get - Get the first TX message in the FIFO to start sending it
646 *
647 * @i2400m: device descriptors
648 * @bus_size: where to place the size of the TX message
649 *
650 * Called by the bus-specific driver to get the first TX message at
651 * the FIF that is ready for transmission.
652 *
653 * It sets the state in @i2400m to indicate the bus-specific driver is
654 * transfering that message (i2400m->tx_msg_size).
655 *
656 * Once the transfer is completed, call i2400m_tx_msg_sent().
657 *
658 * Notes:
659 *
660 * The size of the TX message to be transmitted might be smaller than
661 * that of the TX message in the FIFO (in case the header was
662 * shorter). Hence, we copy it in @bus_size, for the bus layer to
663 * use. We keep the message's size in i2400m->tx_msg_size so that
664 * when the bus later is done transferring we know how much to
665 * advance the fifo.
666 *
667 * We collect statistics here as all the data is available and we
668 * assume it is going to work [see i2400m_tx_msg_sent()].
669 */
670struct i2400m_msg_hdr *i2400m_tx_msg_get(struct i2400m *i2400m,
671 size_t *bus_size)
672{
673 struct device *dev = i2400m_dev(i2400m);
674 struct i2400m_msg_hdr *tx_msg, *tx_msg_moved;
675 unsigned long flags, pls;
676
677 d_fnstart(3, dev, "(i2400m %p bus_size %p)\n", i2400m, bus_size);
678 spin_lock_irqsave(&i2400m->tx_lock, flags);
679skip:
680 tx_msg_moved = NULL;
681 if (i2400m->tx_in == i2400m->tx_out) { /* Empty FIFO? */
682 i2400m->tx_in = 0;
683 i2400m->tx_out = 0;
684 d_printf(2, dev, "TX: FIFO empty: resetting\n");
685 goto out_unlock;
686 }
687 tx_msg = i2400m->tx_buf + i2400m->tx_out % I2400M_TX_BUF_SIZE;
688 if (tx_msg->size & I2400M_TX_SKIP) { /* skip? */
689 d_printf(2, dev, "TX: skip: msg @%zu (%zu b)\n",
690 i2400m->tx_out % I2400M_TX_BUF_SIZE,
691 (size_t) tx_msg->size & ~I2400M_TX_SKIP);
692 i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
693 goto skip;
694 }
695
696 if (tx_msg->num_pls == 0) { /* No payloads? */
697 if (tx_msg == i2400m->tx_msg) { /* open, we are done */
698 d_printf(2, dev,
699 "TX: FIFO empty: open msg w/o payloads @%zu\n",
700 (void *) tx_msg - i2400m->tx_buf);
701 tx_msg = NULL;
702 goto out_unlock;
703 } else { /* closed, skip it */
704 d_printf(2, dev,
705 "TX: skip msg w/o payloads @%zu (%zu b)\n",
706 (void *) tx_msg - i2400m->tx_buf,
707 (size_t) tx_msg->size);
708 i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
709 goto skip;
710 }
711 }
712 if (tx_msg == i2400m->tx_msg) /* open msg? */
713 i2400m_tx_close(i2400m);
714
715 /* Now we have a valid TX message (with payloads) to TX */
716 tx_msg_moved = (void *) tx_msg + tx_msg->offset;
717 i2400m->tx_msg_size = tx_msg->size;
718 *bus_size = tx_msg_moved->size;
719 d_printf(2, dev, "TX: pid %d msg hdr at @%zu offset +@%zu "
720 "size %zu bus_size %zu\n",
721 current->pid, (void *) tx_msg - i2400m->tx_buf,
722 (size_t) tx_msg->offset, (size_t) tx_msg->size,
723 (size_t) tx_msg_moved->size);
724 tx_msg_moved->barker = le32_to_cpu(I2400M_H2D_PREVIEW_BARKER);
725 tx_msg_moved->sequence = le32_to_cpu(i2400m->tx_sequence++);
726
727 pls = le32_to_cpu(tx_msg_moved->num_pls);
728 i2400m->tx_pl_num += pls; /* Update stats */
729 if (pls > i2400m->tx_pl_max)
730 i2400m->tx_pl_max = pls;
731 if (pls < i2400m->tx_pl_min)
732 i2400m->tx_pl_min = pls;
733 i2400m->tx_num++;
734 i2400m->tx_size_acc += *bus_size;
735 if (*bus_size < i2400m->tx_size_min)
736 i2400m->tx_size_min = *bus_size;
737 if (*bus_size > i2400m->tx_size_max)
738 i2400m->tx_size_max = *bus_size;
739out_unlock:
740 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
741 d_fnstart(3, dev, "(i2400m %p bus_size %p [%zu]) = %p\n",
742 i2400m, bus_size, *bus_size, tx_msg_moved);
743 return tx_msg_moved;
744}
745EXPORT_SYMBOL_GPL(i2400m_tx_msg_get);
746
747
748/**
749 * i2400m_tx_msg_sent - indicate the transmission of a TX message
750 *
751 * @i2400m: device descriptor
752 *
753 * Called by the bus-specific driver when a message has been sent;
754 * this pops it from the FIFO; and as there is space, start the queue
755 * in case it was stopped.
756 *
757 * Should be called even if the message send failed and we are
758 * dropping this TX message.
759 */
760void i2400m_tx_msg_sent(struct i2400m *i2400m)
761{
762 unsigned n;
763 unsigned long flags;
764 struct device *dev = i2400m_dev(i2400m);
765
766 d_fnstart(3, dev, "(i2400m %p)\n", i2400m);
767 spin_lock_irqsave(&i2400m->tx_lock, flags);
768 i2400m->tx_out += i2400m->tx_msg_size;
769 d_printf(2, dev, "TX: sent %zu b\n", (size_t) i2400m->tx_msg_size);
770 i2400m->tx_msg_size = 0;
771 BUG_ON(i2400m->tx_out > i2400m->tx_in);
772 /* level them FIFO markers off */
773 n = i2400m->tx_out / I2400M_TX_BUF_SIZE;
774 i2400m->tx_out %= I2400M_TX_BUF_SIZE;
775 i2400m->tx_in -= n * I2400M_TX_BUF_SIZE;
776 netif_start_queue(i2400m->wimax_dev.net_dev);
777 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
778 d_fnend(3, dev, "(i2400m %p) = void\n", i2400m);
779}
780EXPORT_SYMBOL_GPL(i2400m_tx_msg_sent);
781
782
783/**
784 * i2400m_tx_setup - Initialize the TX queue and infrastructure
785 *
786 * Make sure we reset the TX sequence to zero, as when this function
787 * is called, the firmware has been just restarted.
788 */
789int i2400m_tx_setup(struct i2400m *i2400m)
790{
791 int result;
792
793 /* Do this here only once -- can't do on
794 * i2400m_hard_start_xmit() as we'll cause race conditions if
795 * the WS was scheduled on another CPU */
796 INIT_WORK(&i2400m->wake_tx_ws, i2400m_wake_tx_work);
797
798 i2400m->tx_sequence = 0;
799 i2400m->tx_buf = kmalloc(I2400M_TX_BUF_SIZE, GFP_KERNEL);
800 if (i2400m->tx_buf == NULL)
801 result = -ENOMEM;
802 else
803 result = 0;
804 /* Huh? the bus layer has to define this... */
805 BUG_ON(i2400m->bus_tx_block_size == 0);
806 return result;
807
808}
809
810
811/**
812 * i2400m_tx_release - Tear down the TX queue and infrastructure
813 */
814void i2400m_tx_release(struct i2400m *i2400m)
815{
816 kfree(i2400m->tx_buf);
817}