diff options
author | Joe Perches <joe@perches.com> | 2010-05-14 03:19:28 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-05-14 03:19:28 -0400 |
commit | a4b770972b8f819e408d7cc3ae9637e15bff62f6 (patch) | |
tree | 62e3c413b084c106d750cf6cc0701709cde30100 /drivers/net/vxge | |
parent | 21ce849ba5cc178740c6532ba3dded852296ad91 (diff) |
drivers/net: Remove unnecessary returns from void function()s
This patch removes from drivers/net/ all the unnecessary
return; statements that precede the last closing brace of
void functions.
It does not remove the returns that are immediately
preceded by a label as gcc doesn't like that.
It also does not remove null void functions with return.
Done via:
$ grep -rP --include=*.[ch] -l "return;\n}" net/ | \
xargs perl -i -e 'local $/ ; while (<>) { s/\n[ \t\n]+return;\n}/\n}/g; print; }'
with some cleanups by hand.
Compile tested x86 allmodconfig only.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/vxge')
-rw-r--r-- | drivers/net/vxge/vxge-config.c | 17 | ||||
-rw-r--r-- | drivers/net/vxge/vxge-main.c | 4 | ||||
-rw-r--r-- | drivers/net/vxge/vxge-traffic.c | 28 |
3 files changed, 0 insertions, 49 deletions
diff --git a/drivers/net/vxge/vxge-config.c b/drivers/net/vxge/vxge-config.c index a5fc8166c01..297f0d20207 100644 --- a/drivers/net/vxge/vxge-config.c +++ b/drivers/net/vxge/vxge-config.c | |||
@@ -183,8 +183,6 @@ __vxge_hw_device_pci_e_init(struct __vxge_hw_device *hldev) | |||
183 | pci_write_config_word(hldev->pdev, PCI_COMMAND, cmd); | 183 | pci_write_config_word(hldev->pdev, PCI_COMMAND, cmd); |
184 | 184 | ||
185 | pci_save_state(hldev->pdev); | 185 | pci_save_state(hldev->pdev); |
186 | |||
187 | return; | ||
188 | } | 186 | } |
189 | 187 | ||
190 | /* | 188 | /* |
@@ -342,8 +340,6 @@ void __vxge_hw_device_id_get(struct __vxge_hw_device *hldev) | |||
342 | 340 | ||
343 | hldev->minor_revision = | 341 | hldev->minor_revision = |
344 | (u8)VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MINOR_REVISION(val64); | 342 | (u8)VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MINOR_REVISION(val64); |
345 | |||
346 | return; | ||
347 | } | 343 | } |
348 | 344 | ||
349 | /* | 345 | /* |
@@ -428,8 +424,6 @@ void __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev) | |||
428 | hldev->first_vp_id = i; | 424 | hldev->first_vp_id = i; |
429 | break; | 425 | break; |
430 | } | 426 | } |
431 | |||
432 | return; | ||
433 | } | 427 | } |
434 | 428 | ||
435 | /* | 429 | /* |
@@ -1217,8 +1211,6 @@ __vxge_hw_ring_mempool_item_alloc(struct vxge_hw_mempool *mempoolh, | |||
1217 | /* link this RxD block with previous one */ | 1211 | /* link this RxD block with previous one */ |
1218 | __vxge_hw_ring_rxdblock_link(mempoolh, ring, index - 1, index); | 1212 | __vxge_hw_ring_rxdblock_link(mempoolh, ring, index - 1, index); |
1219 | } | 1213 | } |
1220 | |||
1221 | return; | ||
1222 | } | 1214 | } |
1223 | 1215 | ||
1224 | /* | 1216 | /* |
@@ -2318,8 +2310,6 @@ __vxge_hw_fifo_mempool_item_alloc( | |||
2318 | txdl_priv->first_txdp = txdp; | 2310 | txdl_priv->first_txdp = txdp; |
2319 | txdl_priv->next_txdl_priv = NULL; | 2311 | txdl_priv->next_txdl_priv = NULL; |
2320 | txdl_priv->alloc_frags = 0; | 2312 | txdl_priv->alloc_frags = 0; |
2321 | |||
2322 | return; | ||
2323 | } | 2313 | } |
2324 | 2314 | ||
2325 | /* | 2315 | /* |
@@ -2576,7 +2566,6 @@ __vxge_hw_read_rts_ds(struct vxge_hw_vpath_reg __iomem *vpath_reg, | |||
2576 | writeq(dta_struct_sel, &vpath_reg->rts_access_steer_data0); | 2566 | writeq(dta_struct_sel, &vpath_reg->rts_access_steer_data0); |
2577 | writeq(0, &vpath_reg->rts_access_steer_data1); | 2567 | writeq(0, &vpath_reg->rts_access_steer_data1); |
2578 | wmb(); | 2568 | wmb(); |
2579 | return; | ||
2580 | } | 2569 | } |
2581 | 2570 | ||
2582 | 2571 | ||
@@ -3484,7 +3473,6 @@ __vxge_hw_vpath_prc_configure(struct __vxge_hw_device *hldev, u32 vp_id) | |||
3484 | val64 &= ~VXGE_HW_PRC_CFG4_RTH_DISABLE; | 3473 | val64 &= ~VXGE_HW_PRC_CFG4_RTH_DISABLE; |
3485 | 3474 | ||
3486 | writeq(val64, &vp_reg->prc_cfg4); | 3475 | writeq(val64, &vp_reg->prc_cfg4); |
3487 | return; | ||
3488 | } | 3476 | } |
3489 | 3477 | ||
3490 | /* | 3478 | /* |
@@ -3903,7 +3891,6 @@ vxge_hw_vpath_tti_ci_set(struct __vxge_hw_device *hldev, u32 vp_id) | |||
3903 | &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); | 3891 | &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); |
3904 | } | 3892 | } |
3905 | } | 3893 | } |
3906 | return; | ||
3907 | } | 3894 | } |
3908 | /* | 3895 | /* |
3909 | * __vxge_hw_vpath_initialize | 3896 | * __vxge_hw_vpath_initialize |
@@ -5037,8 +5024,6 @@ __vxge_hw_blockpool_free(struct __vxge_hw_device *devh, | |||
5037 | if (status == VXGE_HW_OK) | 5024 | if (status == VXGE_HW_OK) |
5038 | __vxge_hw_blockpool_blocks_remove(blockpool); | 5025 | __vxge_hw_blockpool_blocks_remove(blockpool); |
5039 | } | 5026 | } |
5040 | |||
5041 | return; | ||
5042 | } | 5027 | } |
5043 | 5028 | ||
5044 | /* | 5029 | /* |
@@ -5094,6 +5079,4 @@ __vxge_hw_blockpool_block_free(struct __vxge_hw_device *devh, | |||
5094 | } | 5079 | } |
5095 | 5080 | ||
5096 | __vxge_hw_blockpool_blocks_remove(blockpool); | 5081 | __vxge_hw_blockpool_blocks_remove(blockpool); |
5097 | |||
5098 | return; | ||
5099 | } | 5082 | } |
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c index 2bab36421f7..b504bd56136 100644 --- a/drivers/net/vxge/vxge-main.c +++ b/drivers/net/vxge/vxge-main.c | |||
@@ -1764,7 +1764,6 @@ static void vxge_netpoll(struct net_device *dev) | |||
1764 | 1764 | ||
1765 | vxge_debug_entryexit(VXGE_TRACE, | 1765 | vxge_debug_entryexit(VXGE_TRACE, |
1766 | "%s:%d Exiting...", __func__, __LINE__); | 1766 | "%s:%d Exiting...", __func__, __LINE__); |
1767 | return; | ||
1768 | } | 1767 | } |
1769 | #endif | 1768 | #endif |
1770 | 1769 | ||
@@ -2815,7 +2814,6 @@ static void vxge_napi_del_all(struct vxgedev *vdev) | |||
2815 | for (i = 0; i < vdev->no_of_vpath; i++) | 2814 | for (i = 0; i < vdev->no_of_vpath; i++) |
2816 | netif_napi_del(&vdev->vpaths[i].ring.napi); | 2815 | netif_napi_del(&vdev->vpaths[i].ring.napi); |
2817 | } | 2816 | } |
2818 | return; | ||
2819 | } | 2817 | } |
2820 | 2818 | ||
2821 | int do_vxge_close(struct net_device *dev, int do_io) | 2819 | int do_vxge_close(struct net_device *dev, int do_io) |
@@ -3500,8 +3498,6 @@ static void verify_bandwidth(void) | |||
3500 | for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) | 3498 | for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) |
3501 | bw_percentage[i] = bw_percentage[0]; | 3499 | bw_percentage[i] = bw_percentage[0]; |
3502 | } | 3500 | } |
3503 | |||
3504 | return; | ||
3505 | } | 3501 | } |
3506 | 3502 | ||
3507 | /* | 3503 | /* |
diff --git a/drivers/net/vxge/vxge-traffic.c b/drivers/net/vxge/vxge-traffic.c index f83e6aee3f6..6cc1dd79b40 100644 --- a/drivers/net/vxge/vxge-traffic.c +++ b/drivers/net/vxge/vxge-traffic.c | |||
@@ -233,8 +233,6 @@ void vxge_hw_channel_msix_mask(struct __vxge_hw_channel *channel, int msix_id) | |||
233 | __vxge_hw_pio_mem_write32_upper( | 233 | __vxge_hw_pio_mem_write32_upper( |
234 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), | 234 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), |
235 | &channel->common_reg->set_msix_mask_vect[msix_id%4]); | 235 | &channel->common_reg->set_msix_mask_vect[msix_id%4]); |
236 | |||
237 | return; | ||
238 | } | 236 | } |
239 | 237 | ||
240 | /** | 238 | /** |
@@ -253,8 +251,6 @@ vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channel, int msix_id) | |||
253 | __vxge_hw_pio_mem_write32_upper( | 251 | __vxge_hw_pio_mem_write32_upper( |
254 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), | 252 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), |
255 | &channel->common_reg->clear_msix_mask_vect[msix_id%4]); | 253 | &channel->common_reg->clear_msix_mask_vect[msix_id%4]); |
256 | |||
257 | return; | ||
258 | } | 254 | } |
259 | 255 | ||
260 | /** | 256 | /** |
@@ -329,8 +325,6 @@ void vxge_hw_device_intr_enable(struct __vxge_hw_device *hldev) | |||
329 | val64 = readq(&hldev->common_reg->titan_general_int_status); | 325 | val64 = readq(&hldev->common_reg->titan_general_int_status); |
330 | 326 | ||
331 | vxge_hw_device_unmask_all(hldev); | 327 | vxge_hw_device_unmask_all(hldev); |
332 | |||
333 | return; | ||
334 | } | 328 | } |
335 | 329 | ||
336 | /** | 330 | /** |
@@ -362,8 +356,6 @@ void vxge_hw_device_intr_disable(struct __vxge_hw_device *hldev) | |||
362 | vxge_hw_vpath_intr_disable( | 356 | vxge_hw_vpath_intr_disable( |
363 | VXGE_HW_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i])); | 357 | VXGE_HW_VIRTUAL_PATH_HANDLE(&hldev->virtual_paths[i])); |
364 | } | 358 | } |
365 | |||
366 | return; | ||
367 | } | 359 | } |
368 | 360 | ||
369 | /** | 361 | /** |
@@ -383,8 +375,6 @@ void vxge_hw_device_mask_all(struct __vxge_hw_device *hldev) | |||
383 | 375 | ||
384 | __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), | 376 | __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), |
385 | &hldev->common_reg->titan_mask_all_int); | 377 | &hldev->common_reg->titan_mask_all_int); |
386 | |||
387 | return; | ||
388 | } | 378 | } |
389 | 379 | ||
390 | /** | 380 | /** |
@@ -404,8 +394,6 @@ void vxge_hw_device_unmask_all(struct __vxge_hw_device *hldev) | |||
404 | 394 | ||
405 | __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), | 395 | __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), |
406 | &hldev->common_reg->titan_mask_all_int); | 396 | &hldev->common_reg->titan_mask_all_int); |
407 | |||
408 | return; | ||
409 | } | 397 | } |
410 | 398 | ||
411 | /** | 399 | /** |
@@ -647,8 +635,6 @@ void vxge_hw_device_clear_tx_rx(struct __vxge_hw_device *hldev) | |||
647 | hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX]), | 635 | hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX]), |
648 | &hldev->common_reg->tim_int_status1); | 636 | &hldev->common_reg->tim_int_status1); |
649 | } | 637 | } |
650 | |||
651 | return; | ||
652 | } | 638 | } |
653 | 639 | ||
654 | /* | 640 | /* |
@@ -2255,8 +2241,6 @@ vxge_hw_vpath_msix_set(struct __vxge_hw_vpath_handle *vp, int *tim_msix_id, | |||
2255 | VXGE_HW_ONE_SHOT_VECT3_EN_ONE_SHOT_VECT3_EN, | 2241 | VXGE_HW_ONE_SHOT_VECT3_EN_ONE_SHOT_VECT3_EN, |
2256 | 0, 32), &vp_reg->one_shot_vect3_en); | 2242 | 0, 32), &vp_reg->one_shot_vect3_en); |
2257 | } | 2243 | } |
2258 | |||
2259 | return; | ||
2260 | } | 2244 | } |
2261 | 2245 | ||
2262 | /** | 2246 | /** |
@@ -2278,8 +2262,6 @@ vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vp, int msix_id) | |||
2278 | __vxge_hw_pio_mem_write32_upper( | 2262 | __vxge_hw_pio_mem_write32_upper( |
2279 | (u32) vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), | 2263 | (u32) vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), |
2280 | &hldev->common_reg->set_msix_mask_vect[msix_id % 4]); | 2264 | &hldev->common_reg->set_msix_mask_vect[msix_id % 4]); |
2281 | |||
2282 | return; | ||
2283 | } | 2265 | } |
2284 | 2266 | ||
2285 | /** | 2267 | /** |
@@ -2310,8 +2292,6 @@ vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id) | |||
2310 | &hldev->common_reg-> | 2292 | &hldev->common_reg-> |
2311 | clear_msix_mask_vect[msix_id%4]); | 2293 | clear_msix_mask_vect[msix_id%4]); |
2312 | } | 2294 | } |
2313 | |||
2314 | return; | ||
2315 | } | 2295 | } |
2316 | 2296 | ||
2317 | /** | 2297 | /** |
@@ -2333,8 +2313,6 @@ vxge_hw_vpath_msix_unmask(struct __vxge_hw_vpath_handle *vp, int msix_id) | |||
2333 | __vxge_hw_pio_mem_write32_upper( | 2313 | __vxge_hw_pio_mem_write32_upper( |
2334 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), | 2314 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), |
2335 | &hldev->common_reg->clear_msix_mask_vect[msix_id%4]); | 2315 | &hldev->common_reg->clear_msix_mask_vect[msix_id%4]); |
2336 | |||
2337 | return; | ||
2338 | } | 2316 | } |
2339 | 2317 | ||
2340 | /** | 2318 | /** |
@@ -2351,8 +2329,6 @@ vxge_hw_vpath_msix_mask_all(struct __vxge_hw_vpath_handle *vp) | |||
2351 | __vxge_hw_pio_mem_write32_upper( | 2329 | __vxge_hw_pio_mem_write32_upper( |
2352 | (u32)vxge_bVALn(vxge_mBIT(vp->vpath->vp_id), 0, 32), | 2330 | (u32)vxge_bVALn(vxge_mBIT(vp->vpath->vp_id), 0, 32), |
2353 | &vp->vpath->hldev->common_reg->set_msix_mask_all_vect); | 2331 | &vp->vpath->hldev->common_reg->set_msix_mask_all_vect); |
2354 | |||
2355 | return; | ||
2356 | } | 2332 | } |
2357 | 2333 | ||
2358 | /** | 2334 | /** |
@@ -2391,8 +2367,6 @@ void vxge_hw_vpath_inta_mask_tx_rx(struct __vxge_hw_vpath_handle *vp) | |||
2391 | tim_int_mask1[VXGE_HW_VPATH_INTR_RX] | val64), | 2367 | tim_int_mask1[VXGE_HW_VPATH_INTR_RX] | val64), |
2392 | &hldev->common_reg->tim_int_mask1); | 2368 | &hldev->common_reg->tim_int_mask1); |
2393 | } | 2369 | } |
2394 | |||
2395 | return; | ||
2396 | } | 2370 | } |
2397 | 2371 | ||
2398 | /** | 2372 | /** |
@@ -2429,8 +2403,6 @@ void vxge_hw_vpath_inta_unmask_tx_rx(struct __vxge_hw_vpath_handle *vp) | |||
2429 | tim_int_mask1[VXGE_HW_VPATH_INTR_RX])) & val64, | 2403 | tim_int_mask1[VXGE_HW_VPATH_INTR_RX])) & val64, |
2430 | &hldev->common_reg->tim_int_mask1); | 2404 | &hldev->common_reg->tim_int_mask1); |
2431 | } | 2405 | } |
2432 | |||
2433 | return; | ||
2434 | } | 2406 | } |
2435 | 2407 | ||
2436 | /** | 2408 | /** |