diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/net/tokenring/3c359.c |
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/net/tokenring/3c359.c')
-rw-r--r-- | drivers/net/tokenring/3c359.c | 1830 |
1 files changed, 1830 insertions, 0 deletions
diff --git a/drivers/net/tokenring/3c359.c b/drivers/net/tokenring/3c359.c new file mode 100644 index 00000000000..0d1dcf42177 --- /dev/null +++ b/drivers/net/tokenring/3c359.c | |||
@@ -0,0 +1,1830 @@ | |||
1 | /* | ||
2 | * 3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved | ||
3 | * | ||
4 | * Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC | ||
5 | * | ||
6 | * Base Driver Olympic: | ||
7 | * Written 1999 Peter De Schrijver & Mike Phillips | ||
8 | * | ||
9 | * This software may be used and distributed according to the terms | ||
10 | * of the GNU General Public License, incorporated herein by reference. | ||
11 | * | ||
12 | * 7/17/00 - Clean up, version number 0.9.0. Ready to release to the world. | ||
13 | * | ||
14 | * 2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel. | ||
15 | * 3/05/01 - Last clean up stuff before submission. | ||
16 | * 2/15/01 - Finally, update to new pci api. | ||
17 | * | ||
18 | * To Do: | ||
19 | */ | ||
20 | |||
21 | /* | ||
22 | * Technical Card Details | ||
23 | * | ||
24 | * All access to data is done with 16/8 bit transfers. The transfer | ||
25 | * method really sucks. You can only read or write one location at a time. | ||
26 | * | ||
27 | * Also, the microcode for the card must be uploaded if the card does not have | ||
28 | * the flashrom on board. This is a 28K bloat in the driver when compiled | ||
29 | * as a module. | ||
30 | * | ||
31 | * Rx is very simple, status into a ring of descriptors, dma data transfer, | ||
32 | * interrupts to tell us when a packet is received. | ||
33 | * | ||
34 | * Tx is a little more interesting. Similar scenario, descriptor and dma data | ||
35 | * transfers, but we don't have to interrupt the card to tell it another packet | ||
36 | * is ready for transmission, we are just doing simple memory writes, not io or mmio | ||
37 | * writes. The card can be set up to simply poll on the next | ||
38 | * descriptor pointer and when this value is non-zero will automatically download | ||
39 | * the next packet. The card then interrupts us when the packet is done. | ||
40 | * | ||
41 | */ | ||
42 | |||
43 | #define XL_DEBUG 0 | ||
44 | |||
45 | #include <linux/config.h> | ||
46 | #include <linux/module.h> | ||
47 | #include <linux/kernel.h> | ||
48 | #include <linux/errno.h> | ||
49 | #include <linux/timer.h> | ||
50 | #include <linux/in.h> | ||
51 | #include <linux/ioport.h> | ||
52 | #include <linux/string.h> | ||
53 | #include <linux/proc_fs.h> | ||
54 | #include <linux/ptrace.h> | ||
55 | #include <linux/skbuff.h> | ||
56 | #include <linux/interrupt.h> | ||
57 | #include <linux/delay.h> | ||
58 | #include <linux/netdevice.h> | ||
59 | #include <linux/trdevice.h> | ||
60 | #include <linux/stddef.h> | ||
61 | #include <linux/init.h> | ||
62 | #include <linux/pci.h> | ||
63 | #include <linux/spinlock.h> | ||
64 | #include <linux/bitops.h> | ||
65 | |||
66 | #include <net/checksum.h> | ||
67 | |||
68 | #include <asm/io.h> | ||
69 | #include <asm/system.h> | ||
70 | |||
71 | #include "3c359.h" | ||
72 | |||
73 | static char version[] __devinitdata = | ||
74 | "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ; | ||
75 | |||
76 | MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ; | ||
77 | MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ; | ||
78 | |||
79 | /* Module paramters */ | ||
80 | |||
81 | /* Ring Speed 0,4,16 | ||
82 | * 0 = Autosense | ||
83 | * 4,16 = Selected speed only, no autosense | ||
84 | * This allows the card to be the first on the ring | ||
85 | * and become the active monitor. | ||
86 | * | ||
87 | * WARNING: Some hubs will allow you to insert | ||
88 | * at the wrong speed. | ||
89 | * | ||
90 | * The adapter will _not_ fail to open if there are no | ||
91 | * active monitors on the ring, it will simply open up in | ||
92 | * its last known ringspeed if no ringspeed is specified. | ||
93 | */ | ||
94 | |||
95 | static int ringspeed[XL_MAX_ADAPTERS] = {0,} ; | ||
96 | |||
97 | module_param_array(ringspeed, int, NULL, 0); | ||
98 | MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ; | ||
99 | |||
100 | /* Packet buffer size */ | ||
101 | |||
102 | static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ; | ||
103 | |||
104 | module_param_array(pkt_buf_sz, int, NULL, 0) ; | ||
105 | MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ; | ||
106 | /* Message Level */ | ||
107 | |||
108 | static int message_level[XL_MAX_ADAPTERS] = {0,} ; | ||
109 | |||
110 | module_param_array(message_level, int, NULL, 0) ; | ||
111 | MODULE_PARM_DESC(message_level, "3c359: Level of reported messages \n") ; | ||
112 | /* | ||
113 | * This is a real nasty way of doing this, but otherwise you | ||
114 | * will be stuck with 1555 lines of hex #'s in the code. | ||
115 | */ | ||
116 | |||
117 | #include "3c359_microcode.h" | ||
118 | |||
119 | static struct pci_device_id xl_pci_tbl[] = | ||
120 | { | ||
121 | {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, }, | ||
122 | { } /* terminate list */ | ||
123 | }; | ||
124 | MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ; | ||
125 | |||
126 | static int xl_init(struct net_device *dev); | ||
127 | static int xl_open(struct net_device *dev); | ||
128 | static int xl_open_hw(struct net_device *dev) ; | ||
129 | static int xl_hw_reset(struct net_device *dev); | ||
130 | static int xl_xmit(struct sk_buff *skb, struct net_device *dev); | ||
131 | static void xl_dn_comp(struct net_device *dev); | ||
132 | static int xl_close(struct net_device *dev); | ||
133 | static void xl_set_rx_mode(struct net_device *dev); | ||
134 | static irqreturn_t xl_interrupt(int irq, void *dev_id, struct pt_regs *regs); | ||
135 | static struct net_device_stats * xl_get_stats(struct net_device *dev); | ||
136 | static int xl_set_mac_address(struct net_device *dev, void *addr) ; | ||
137 | static void xl_arb_cmd(struct net_device *dev); | ||
138 | static void xl_asb_cmd(struct net_device *dev) ; | ||
139 | static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ; | ||
140 | static void xl_wait_misr_flags(struct net_device *dev) ; | ||
141 | static int xl_change_mtu(struct net_device *dev, int mtu); | ||
142 | static void xl_srb_bh(struct net_device *dev) ; | ||
143 | static void xl_asb_bh(struct net_device *dev) ; | ||
144 | static void xl_reset(struct net_device *dev) ; | ||
145 | static void xl_freemem(struct net_device *dev) ; | ||
146 | |||
147 | |||
148 | /* EEProm Access Functions */ | ||
149 | static u16 xl_ee_read(struct net_device *dev, int ee_addr) ; | ||
150 | static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ; | ||
151 | |||
152 | /* Debugging functions */ | ||
153 | #if XL_DEBUG | ||
154 | static void print_tx_state(struct net_device *dev) ; | ||
155 | static void print_rx_state(struct net_device *dev) ; | ||
156 | |||
157 | static void print_tx_state(struct net_device *dev) | ||
158 | { | ||
159 | |||
160 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
161 | struct xl_tx_desc *txd ; | ||
162 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
163 | int i ; | ||
164 | |||
165 | printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d \n",xl_priv->tx_ring_head, | ||
166 | xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ; | ||
167 | printk("Ring , Address , FSH , DnNextPtr, Buffer, Buffer_Len \n"); | ||
168 | for (i = 0; i < 16; i++) { | ||
169 | txd = &(xl_priv->xl_tx_ring[i]) ; | ||
170 | printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(txd), | ||
171 | txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ; | ||
172 | } | ||
173 | |||
174 | printk("DNLISTPTR = %04x \n", readl(xl_mmio + MMIO_DNLISTPTR) ); | ||
175 | |||
176 | printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) ); | ||
177 | printk("Queue status = %0x \n",netif_running(dev) ) ; | ||
178 | } | ||
179 | |||
180 | static void print_rx_state(struct net_device *dev) | ||
181 | { | ||
182 | |||
183 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
184 | struct xl_rx_desc *rxd ; | ||
185 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
186 | int i ; | ||
187 | |||
188 | printk("rx_ring_tail: %d \n", xl_priv->rx_ring_tail) ; | ||
189 | printk("Ring , Address , FrameState , UPNextPtr, FragAddr, Frag_Len \n"); | ||
190 | for (i = 0; i < 16; i++) { | ||
191 | /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */ | ||
192 | rxd = &(xl_priv->xl_rx_ring[i]) ; | ||
193 | printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(rxd), | ||
194 | rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ; | ||
195 | } | ||
196 | |||
197 | printk("UPLISTPTR = %04x \n", readl(xl_mmio + MMIO_UPLISTPTR) ); | ||
198 | |||
199 | printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) ); | ||
200 | printk("Queue status = %0x \n",netif_running(dev) ) ; | ||
201 | } | ||
202 | #endif | ||
203 | |||
204 | /* | ||
205 | * Read values from the on-board EEProm. This looks very strange | ||
206 | * but you have to wait for the EEProm to get/set the value before | ||
207 | * passing/getting the next value from the nic. As with all requests | ||
208 | * on this nic it has to be done in two stages, a) tell the nic which | ||
209 | * memory address you want to access and b) pass/get the value from the nic. | ||
210 | * With the EEProm, you have to wait before and inbetween access a) and b). | ||
211 | * As this is only read at initialization time and the wait period is very | ||
212 | * small we shouldn't have to worry about scheduling issues. | ||
213 | */ | ||
214 | |||
215 | static u16 xl_ee_read(struct net_device *dev, int ee_addr) | ||
216 | { | ||
217 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
218 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
219 | |||
220 | /* Wait for EEProm to not be busy */ | ||
221 | writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
222 | while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; | ||
223 | |||
224 | /* Tell EEProm what we want to do and where */ | ||
225 | writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
226 | writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; | ||
227 | |||
228 | /* Wait for EEProm to not be busy */ | ||
229 | writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
230 | while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; | ||
231 | |||
232 | /* Tell EEProm what we want to do and where */ | ||
233 | writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
234 | writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; | ||
235 | |||
236 | /* Finally read the value from the EEProm */ | ||
237 | writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
238 | return readw(xl_mmio + MMIO_MACDATA) ; | ||
239 | } | ||
240 | |||
241 | /* | ||
242 | * Write values to the onboard eeprom. As with eeprom read you need to | ||
243 | * set which location to write, wait, value to write, wait, with the | ||
244 | * added twist of having to enable eeprom writes as well. | ||
245 | */ | ||
246 | |||
247 | static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) | ||
248 | { | ||
249 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
250 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
251 | |||
252 | /* Wait for EEProm to not be busy */ | ||
253 | writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
254 | while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; | ||
255 | |||
256 | /* Enable write/erase */ | ||
257 | writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
258 | writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ; | ||
259 | |||
260 | /* Wait for EEProm to not be busy */ | ||
261 | writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
262 | while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; | ||
263 | |||
264 | /* Put the value we want to write into EEDATA */ | ||
265 | writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
266 | writew(ee_value, xl_mmio + MMIO_MACDATA) ; | ||
267 | |||
268 | /* Tell EEProm to write eevalue into ee_addr */ | ||
269 | writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
270 | writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ; | ||
271 | |||
272 | /* Wait for EEProm to not be busy, to ensure write gets done */ | ||
273 | writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
274 | while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; | ||
275 | |||
276 | return ; | ||
277 | } | ||
278 | |||
279 | int __devinit xl_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
280 | { | ||
281 | struct net_device *dev ; | ||
282 | struct xl_private *xl_priv ; | ||
283 | static int card_no = -1 ; | ||
284 | int i ; | ||
285 | |||
286 | card_no++ ; | ||
287 | |||
288 | if (pci_enable_device(pdev)) { | ||
289 | return -ENODEV ; | ||
290 | } | ||
291 | |||
292 | pci_set_master(pdev); | ||
293 | |||
294 | if ((i = pci_request_regions(pdev,"3c359"))) { | ||
295 | return i ; | ||
296 | } ; | ||
297 | |||
298 | /* | ||
299 | * Allowing init_trdev to allocate the dev->priv structure will align xl_private | ||
300 | * on a 32 bytes boundary which we need for the rx/tx descriptors | ||
301 | */ | ||
302 | |||
303 | dev = alloc_trdev(sizeof(struct xl_private)) ; | ||
304 | if (!dev) { | ||
305 | pci_release_regions(pdev) ; | ||
306 | return -ENOMEM ; | ||
307 | } | ||
308 | xl_priv = dev->priv ; | ||
309 | |||
310 | #if XL_DEBUG | ||
311 | printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n", | ||
312 | pdev, dev, dev->priv, (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start) ; | ||
313 | #endif | ||
314 | |||
315 | dev->irq=pdev->irq; | ||
316 | dev->base_addr=pci_resource_start(pdev,0) ; | ||
317 | xl_priv->xl_card_name = pci_name(pdev); | ||
318 | xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE); | ||
319 | xl_priv->pdev = pdev ; | ||
320 | |||
321 | if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) ) | ||
322 | xl_priv->pkt_buf_sz = PKT_BUF_SZ ; | ||
323 | else | ||
324 | xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ; | ||
325 | |||
326 | dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ; | ||
327 | xl_priv->xl_ring_speed = ringspeed[card_no] ; | ||
328 | xl_priv->xl_message_level = message_level[card_no] ; | ||
329 | xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ; | ||
330 | xl_priv->xl_copy_all_options = 0 ; | ||
331 | |||
332 | if((i = xl_init(dev))) { | ||
333 | iounmap(xl_priv->xl_mmio) ; | ||
334 | free_netdev(dev) ; | ||
335 | pci_release_regions(pdev) ; | ||
336 | return i ; | ||
337 | } | ||
338 | |||
339 | dev->open=&xl_open; | ||
340 | dev->hard_start_xmit=&xl_xmit; | ||
341 | dev->change_mtu=&xl_change_mtu; | ||
342 | dev->stop=&xl_close; | ||
343 | dev->do_ioctl=NULL; | ||
344 | dev->set_multicast_list=&xl_set_rx_mode; | ||
345 | dev->get_stats=&xl_get_stats ; | ||
346 | dev->set_mac_address=&xl_set_mac_address ; | ||
347 | SET_MODULE_OWNER(dev); | ||
348 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
349 | |||
350 | pci_set_drvdata(pdev,dev) ; | ||
351 | if ((i = register_netdev(dev))) { | ||
352 | printk(KERN_ERR "3C359, register netdev failed\n") ; | ||
353 | pci_set_drvdata(pdev,NULL) ; | ||
354 | iounmap(xl_priv->xl_mmio) ; | ||
355 | free_netdev(dev) ; | ||
356 | pci_release_regions(pdev) ; | ||
357 | return i ; | ||
358 | } | ||
359 | |||
360 | printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ; | ||
361 | |||
362 | return 0; | ||
363 | } | ||
364 | |||
365 | |||
366 | static int __init xl_init(struct net_device *dev) | ||
367 | { | ||
368 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
369 | |||
370 | printk(KERN_INFO "%s \n", version); | ||
371 | printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n", | ||
372 | xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq); | ||
373 | |||
374 | spin_lock_init(&xl_priv->xl_lock) ; | ||
375 | |||
376 | return xl_hw_reset(dev) ; | ||
377 | |||
378 | } | ||
379 | |||
380 | |||
381 | /* | ||
382 | * Hardware reset. This needs to be a separate entity as we need to reset the card | ||
383 | * when we change the EEProm settings. | ||
384 | */ | ||
385 | |||
386 | static int xl_hw_reset(struct net_device *dev) | ||
387 | { | ||
388 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
389 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
390 | unsigned long t ; | ||
391 | u16 i ; | ||
392 | u16 result_16 ; | ||
393 | u8 result_8 ; | ||
394 | u16 start ; | ||
395 | int j ; | ||
396 | |||
397 | /* | ||
398 | * Reset the card. If the card has got the microcode on board, we have | ||
399 | * missed the initialization interrupt, so we must always do this. | ||
400 | */ | ||
401 | |||
402 | writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; | ||
403 | |||
404 | /* | ||
405 | * Must wait for cmdInProgress bit (12) to clear before continuing with | ||
406 | * card configuration. | ||
407 | */ | ||
408 | |||
409 | t=jiffies; | ||
410 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
411 | schedule(); | ||
412 | if(jiffies-t > 40*HZ) { | ||
413 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL card not responding to global reset.\n", dev->name); | ||
414 | return -ENODEV; | ||
415 | } | ||
416 | } | ||
417 | |||
418 | /* | ||
419 | * Enable pmbar by setting bit in CPAttention | ||
420 | */ | ||
421 | |||
422 | writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
423 | result_8 = readb(xl_mmio + MMIO_MACDATA) ; | ||
424 | result_8 = result_8 | CPA_PMBARVIS ; | ||
425 | writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
426 | writeb(result_8, xl_mmio + MMIO_MACDATA) ; | ||
427 | |||
428 | /* | ||
429 | * Read cpHold bit in pmbar, if cleared we have got Flashrom on board. | ||
430 | * If not, we need to upload the microcode to the card | ||
431 | */ | ||
432 | |||
433 | writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD); | ||
434 | |||
435 | #if XL_DEBUG | ||
436 | printk(KERN_INFO "Read from PMBAR = %04x \n", readw(xl_mmio + MMIO_MACDATA)) ; | ||
437 | #endif | ||
438 | |||
439 | if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) { | ||
440 | |||
441 | /* Set PmBar, privateMemoryBase bits (8:2) to 0 */ | ||
442 | |||
443 | writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD); | ||
444 | result_16 = readw(xl_mmio + MMIO_MACDATA) ; | ||
445 | result_16 = result_16 & ~((0x7F) << 2) ; | ||
446 | writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
447 | writew(result_16,xl_mmio + MMIO_MACDATA) ; | ||
448 | |||
449 | /* Set CPAttention, memWrEn bit */ | ||
450 | |||
451 | writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
452 | result_8 = readb(xl_mmio + MMIO_MACDATA) ; | ||
453 | result_8 = result_8 | CPA_MEMWREN ; | ||
454 | writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
455 | writeb(result_8, xl_mmio + MMIO_MACDATA) ; | ||
456 | |||
457 | /* | ||
458 | * Now to write the microcode into the shared ram | ||
459 | * The microcode must finish at position 0xFFFF, so we must subtract | ||
460 | * to get the start position for the code | ||
461 | */ | ||
462 | |||
463 | start = (0xFFFF - (mc_size) + 1 ) ; /* Looks strange but ensures compiler only uses 16 bit unsigned int for this */ | ||
464 | |||
465 | printk(KERN_INFO "3C359: Uploading Microcode: "); | ||
466 | |||
467 | for (i = start, j = 0; j < mc_size; i++, j++) { | ||
468 | writel(MEM_BYTE_WRITE | 0XD0000 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
469 | writeb(microcode[j],xl_mmio + MMIO_MACDATA) ; | ||
470 | if (j % 1024 == 0) | ||
471 | printk("."); | ||
472 | } | ||
473 | printk("\n") ; | ||
474 | |||
475 | for (i=0;i < 16; i++) { | ||
476 | writel( (MEM_BYTE_WRITE | 0xDFFF0) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
477 | writeb(microcode[mc_size - 16 + i], xl_mmio + MMIO_MACDATA) ; | ||
478 | } | ||
479 | |||
480 | /* | ||
481 | * Have to write the start address of the upload to FFF4, but | ||
482 | * the address must be >> 4. You do not want to know how long | ||
483 | * it took me to discover this. | ||
484 | */ | ||
485 | |||
486 | writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
487 | writew(start >> 4, xl_mmio + MMIO_MACDATA); | ||
488 | |||
489 | /* Clear the CPAttention, memWrEn Bit */ | ||
490 | |||
491 | writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
492 | result_8 = readb(xl_mmio + MMIO_MACDATA) ; | ||
493 | result_8 = result_8 & ~CPA_MEMWREN ; | ||
494 | writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
495 | writeb(result_8, xl_mmio + MMIO_MACDATA) ; | ||
496 | |||
497 | /* Clear the cpHold bit in pmbar */ | ||
498 | |||
499 | writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD); | ||
500 | result_16 = readw(xl_mmio + MMIO_MACDATA) ; | ||
501 | result_16 = result_16 & ~PMB_CPHOLD ; | ||
502 | writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
503 | writew(result_16,xl_mmio + MMIO_MACDATA) ; | ||
504 | |||
505 | |||
506 | } /* If microcode upload required */ | ||
507 | |||
508 | /* | ||
509 | * The card should now go though a self test procedure and get itself ready | ||
510 | * to be opened, we must wait for an srb response with the initialization | ||
511 | * information. | ||
512 | */ | ||
513 | |||
514 | #if XL_DEBUG | ||
515 | printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name); | ||
516 | #endif | ||
517 | |||
518 | writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ; | ||
519 | |||
520 | t=jiffies; | ||
521 | while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) { | ||
522 | schedule(); | ||
523 | if(jiffies-t > 15*HZ) { | ||
524 | printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n"); | ||
525 | return -ENODEV; | ||
526 | } | ||
527 | } | ||
528 | |||
529 | /* | ||
530 | * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh, | ||
531 | * DnPriReqThresh, read the tech docs if you want to know what | ||
532 | * values they need to be. | ||
533 | */ | ||
534 | |||
535 | writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
536 | writew(0xD000, xl_mmio + MMIO_MACDATA) ; | ||
537 | |||
538 | writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
539 | writew(0X0020, xl_mmio + MMIO_MACDATA) ; | ||
540 | |||
541 | writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ; | ||
542 | |||
543 | writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ; | ||
544 | writeb(0x04, xl_mmio + DNPRIREQTHRESH) ; | ||
545 | |||
546 | /* | ||
547 | * Read WRBR to provide the location of the srb block, have to use byte reads not word reads. | ||
548 | * Tech docs have this wrong !!!! | ||
549 | */ | ||
550 | |||
551 | writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
552 | xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ; | ||
553 | writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
554 | xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ; | ||
555 | |||
556 | #if XL_DEBUG | ||
557 | writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
558 | if ( readw(xl_mmio + MMIO_MACDATA) & 2) { | ||
559 | printk(KERN_INFO "Default ring speed 4 mbps \n") ; | ||
560 | } else { | ||
561 | printk(KERN_INFO "Default ring speed 16 mbps \n") ; | ||
562 | } | ||
563 | printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb); | ||
564 | #endif | ||
565 | |||
566 | return 0; | ||
567 | } | ||
568 | |||
569 | static int xl_open(struct net_device *dev) | ||
570 | { | ||
571 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
572 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
573 | u8 i ; | ||
574 | u16 hwaddr[3] ; /* Should be u8[6] but we get word return values */ | ||
575 | int open_err ; | ||
576 | |||
577 | u16 switchsettings, switchsettings_eeprom ; | ||
578 | |||
579 | if(request_irq(dev->irq, &xl_interrupt, SA_SHIRQ , "3c359", dev)) { | ||
580 | return -EAGAIN; | ||
581 | } | ||
582 | |||
583 | /* | ||
584 | * Read the information from the EEPROM that we need. I know we | ||
585 | * should use ntohs, but the word gets stored reversed in the 16 | ||
586 | * bit field anyway and it all works its self out when we memcpy | ||
587 | * it into dev->dev_addr. | ||
588 | */ | ||
589 | |||
590 | hwaddr[0] = xl_ee_read(dev,0x10) ; | ||
591 | hwaddr[1] = xl_ee_read(dev,0x11) ; | ||
592 | hwaddr[2] = xl_ee_read(dev,0x12) ; | ||
593 | |||
594 | /* Ring speed */ | ||
595 | |||
596 | switchsettings_eeprom = xl_ee_read(dev,0x08) ; | ||
597 | switchsettings = switchsettings_eeprom ; | ||
598 | |||
599 | if (xl_priv->xl_ring_speed != 0) { | ||
600 | if (xl_priv->xl_ring_speed == 4) | ||
601 | switchsettings = switchsettings | 0x02 ; | ||
602 | else | ||
603 | switchsettings = switchsettings & ~0x02 ; | ||
604 | } | ||
605 | |||
606 | /* Only write EEProm if there has been a change */ | ||
607 | if (switchsettings != switchsettings_eeprom) { | ||
608 | xl_ee_write(dev,0x08,switchsettings) ; | ||
609 | /* Hardware reset after changing EEProm */ | ||
610 | xl_hw_reset(dev) ; | ||
611 | } | ||
612 | |||
613 | memcpy(dev->dev_addr,hwaddr,dev->addr_len) ; | ||
614 | |||
615 | open_err = xl_open_hw(dev) ; | ||
616 | |||
617 | /* | ||
618 | * This really needs to be cleaned up with better error reporting. | ||
619 | */ | ||
620 | |||
621 | if (open_err != 0) { /* Something went wrong with the open command */ | ||
622 | if (open_err & 0x07) { /* Wrong speed, retry at different speed */ | ||
623 | printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed \n", dev->name) ; | ||
624 | switchsettings = switchsettings ^ 2 ; | ||
625 | xl_ee_write(dev,0x08,switchsettings) ; | ||
626 | xl_hw_reset(dev) ; | ||
627 | open_err = xl_open_hw(dev) ; | ||
628 | if (open_err != 0) { | ||
629 | printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name); | ||
630 | free_irq(dev->irq,dev) ; | ||
631 | return -ENODEV ; | ||
632 | } | ||
633 | } else { | ||
634 | printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ; | ||
635 | free_irq(dev->irq,dev) ; | ||
636 | return -ENODEV ; | ||
637 | } | ||
638 | } | ||
639 | |||
640 | /* | ||
641 | * Now to set up the Rx and Tx buffer structures | ||
642 | */ | ||
643 | /* These MUST be on 8 byte boundaries */ | ||
644 | xl_priv->xl_tx_ring = kmalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL) ; | ||
645 | if (xl_priv->xl_tx_ring == NULL) { | ||
646 | printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n", | ||
647 | dev->name); | ||
648 | free_irq(dev->irq,dev); | ||
649 | return -ENOMEM; | ||
650 | } | ||
651 | xl_priv->xl_rx_ring = kmalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL) ; | ||
652 | if (xl_priv->xl_tx_ring == NULL) { | ||
653 | printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n", | ||
654 | dev->name); | ||
655 | free_irq(dev->irq,dev); | ||
656 | kfree(xl_priv->xl_tx_ring); | ||
657 | return -ENOMEM; | ||
658 | } | ||
659 | memset(xl_priv->xl_tx_ring,0,sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) ; | ||
660 | memset(xl_priv->xl_rx_ring,0,sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) ; | ||
661 | |||
662 | /* Setup Rx Ring */ | ||
663 | for (i=0 ; i < XL_RX_RING_SIZE ; i++) { | ||
664 | struct sk_buff *skb ; | ||
665 | |||
666 | skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ; | ||
667 | if (skb==NULL) | ||
668 | break ; | ||
669 | |||
670 | skb->dev = dev ; | ||
671 | xl_priv->xl_rx_ring[i].upfragaddr = pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ; | ||
672 | xl_priv->xl_rx_ring[i].upfraglen = xl_priv->pkt_buf_sz | RXUPLASTFRAG; | ||
673 | xl_priv->rx_ring_skb[i] = skb ; | ||
674 | } | ||
675 | |||
676 | if (i==0) { | ||
677 | printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled \n",dev->name) ; | ||
678 | free_irq(dev->irq,dev) ; | ||
679 | return -EIO ; | ||
680 | } | ||
681 | |||
682 | xl_priv->rx_ring_no = i ; | ||
683 | xl_priv->rx_ring_tail = 0 ; | ||
684 | xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ; | ||
685 | for (i=0;i<(xl_priv->rx_ring_no-1);i++) { | ||
686 | xl_priv->xl_rx_ring[i].upnextptr = xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)) ; | ||
687 | } | ||
688 | xl_priv->xl_rx_ring[i].upnextptr = 0 ; | ||
689 | |||
690 | writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ; | ||
691 | |||
692 | /* Setup Tx Ring */ | ||
693 | |||
694 | xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ; | ||
695 | |||
696 | xl_priv->tx_ring_head = 1 ; | ||
697 | xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */ | ||
698 | xl_priv->free_ring_entries = XL_TX_RING_SIZE ; | ||
699 | |||
700 | /* | ||
701 | * Setup the first dummy DPD entry for polling to start working. | ||
702 | */ | ||
703 | |||
704 | xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY ; | ||
705 | xl_priv->xl_tx_ring[0].buffer = 0 ; | ||
706 | xl_priv->xl_tx_ring[0].buffer_length = 0 ; | ||
707 | xl_priv->xl_tx_ring[0].dnnextptr = 0 ; | ||
708 | |||
709 | writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ; | ||
710 | writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ; | ||
711 | writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ; | ||
712 | writel(DNENABLE, xl_mmio + MMIO_COMMAND) ; | ||
713 | writeb(0x40, xl_mmio + MMIO_DNPOLL) ; | ||
714 | |||
715 | /* | ||
716 | * Enable interrupts on the card | ||
717 | */ | ||
718 | |||
719 | writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; | ||
720 | writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; | ||
721 | |||
722 | netif_start_queue(dev) ; | ||
723 | return 0; | ||
724 | |||
725 | } | ||
726 | |||
727 | static int xl_open_hw(struct net_device *dev) | ||
728 | { | ||
729 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
730 | u8 __iomem *xl_mmio = xl_priv->xl_mmio ; | ||
731 | u16 vsoff ; | ||
732 | char ver_str[33]; | ||
733 | int open_err ; | ||
734 | int i ; | ||
735 | unsigned long t ; | ||
736 | |||
737 | /* | ||
738 | * Okay, let's build up the Open.NIC srb command | ||
739 | * | ||
740 | */ | ||
741 | |||
742 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
743 | writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ; | ||
744 | |||
745 | /* | ||
746 | * Use this as a test byte, if it comes back with the same value, the command didn't work | ||
747 | */ | ||
748 | |||
749 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
750 | writeb(0xff,xl_mmio + MMIO_MACDATA) ; | ||
751 | |||
752 | /* Open options */ | ||
753 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
754 | writeb(0x00, xl_mmio + MMIO_MACDATA) ; | ||
755 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
756 | writeb(0x00, xl_mmio + MMIO_MACDATA) ; | ||
757 | |||
758 | /* | ||
759 | * Node address, be careful here, the docs say you can just put zeros here and it will use | ||
760 | * the hardware address, it doesn't, you must include the node address in the open command. | ||
761 | */ | ||
762 | |||
763 | if (xl_priv->xl_laa[0]) { /* If using a LAA address */ | ||
764 | for (i=10;i<16;i++) { | ||
765 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
766 | writeb(xl_priv->xl_laa[i],xl_mmio + MMIO_MACDATA) ; | ||
767 | } | ||
768 | memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ; | ||
769 | } else { /* Regular hardware address */ | ||
770 | for (i=10;i<16;i++) { | ||
771 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
772 | writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ; | ||
773 | } | ||
774 | } | ||
775 | |||
776 | /* Default everything else to 0 */ | ||
777 | for (i = 16; i < 34; i++) { | ||
778 | writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
779 | writeb(0x00,xl_mmio + MMIO_MACDATA) ; | ||
780 | } | ||
781 | |||
782 | /* | ||
783 | * Set the csrb bit in the MISR register | ||
784 | */ | ||
785 | |||
786 | xl_wait_misr_flags(dev) ; | ||
787 | writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
788 | writeb(0xFF, xl_mmio + MMIO_MACDATA) ; | ||
789 | writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
790 | writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ; | ||
791 | |||
792 | /* | ||
793 | * Now wait for the command to run | ||
794 | */ | ||
795 | |||
796 | t=jiffies; | ||
797 | while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) { | ||
798 | schedule(); | ||
799 | if(jiffies-t > 40*HZ) { | ||
800 | printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n"); | ||
801 | break ; | ||
802 | } | ||
803 | } | ||
804 | |||
805 | /* | ||
806 | * Let's interpret the open response | ||
807 | */ | ||
808 | |||
809 | writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
810 | if (readb(xl_mmio + MMIO_MACDATA)!=0) { | ||
811 | open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ; | ||
812 | writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
813 | open_err |= readb(xl_mmio + MMIO_MACDATA) ; | ||
814 | return open_err ; | ||
815 | } else { | ||
816 | writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
817 | xl_priv->asb = ntohs(readw(xl_mmio + MMIO_MACDATA)) ; | ||
818 | printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ; | ||
819 | printk("ASB: %04x",xl_priv->asb ) ; | ||
820 | writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
821 | printk(", SRB: %04x",ntohs(readw(xl_mmio + MMIO_MACDATA)) ) ; | ||
822 | |||
823 | writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
824 | xl_priv->arb = ntohs(readw(xl_mmio + MMIO_MACDATA)) ; | ||
825 | printk(", ARB: %04x \n",xl_priv->arb ) ; | ||
826 | writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
827 | vsoff = ntohs(readw(xl_mmio + MMIO_MACDATA)) ; | ||
828 | |||
829 | /* | ||
830 | * Interesting, sending the individual characters directly to printk was causing klogd to use | ||
831 | * use 100% of processor time, so we build up the string and print that instead. | ||
832 | */ | ||
833 | |||
834 | for (i=0;i<0x20;i++) { | ||
835 | writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
836 | ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ; | ||
837 | } | ||
838 | ver_str[i] = '\0' ; | ||
839 | printk(KERN_INFO "%s: Microcode version String: %s \n",dev->name,ver_str); | ||
840 | } | ||
841 | |||
842 | /* | ||
843 | * Issue the AckInterrupt | ||
844 | */ | ||
845 | writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
846 | |||
847 | return 0 ; | ||
848 | } | ||
849 | |||
850 | /* | ||
851 | * There are two ways of implementing rx on the 359 NIC, either | ||
852 | * interrupt driven or polling. We are going to uses interrupts, | ||
853 | * it is the easier way of doing things. | ||
854 | * | ||
855 | * The Rx works with a ring of Rx descriptors. At initialise time the ring | ||
856 | * entries point to the next entry except for the last entry in the ring | ||
857 | * which points to 0. The card is programmed with the location of the first | ||
858 | * available descriptor and keeps reading the next_ptr until next_ptr is set | ||
859 | * to 0. Hopefully with a ring size of 16 the card will never get to read a next_ptr | ||
860 | * of 0. As the Rx interrupt is received we copy the frame up to the protocol layers | ||
861 | * and then point the end of the ring to our current position and point our current | ||
862 | * position to 0, therefore making the current position the last position on the ring. | ||
863 | * The last position on the ring therefore loops continually loops around the rx ring. | ||
864 | * | ||
865 | * rx_ring_tail is the position on the ring to process next. (Think of a snake, the head | ||
866 | * expands as the card adds new packets and we go around eating the tail processing the | ||
867 | * packets.) | ||
868 | * | ||
869 | * Undoubtably it could be streamlined and improved upon, but at the moment it works | ||
870 | * and the fast path through the routine is fine. | ||
871 | * | ||
872 | * adv_rx_ring could be inlined to increase performance, but its called a *lot* of times | ||
873 | * in xl_rx so would increase the size of the function significantly. | ||
874 | */ | ||
875 | |||
876 | static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */ | ||
877 | { | ||
878 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
879 | int prev_ring_loc ; | ||
880 | |||
881 | prev_ring_loc = (xl_priv->rx_ring_tail + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1); | ||
882 | xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * xl_priv->rx_ring_tail) ; | ||
883 | xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus = 0 ; | ||
884 | xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upnextptr = 0 ; | ||
885 | xl_priv->rx_ring_tail++ ; | ||
886 | xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1) ; | ||
887 | |||
888 | return ; | ||
889 | } | ||
890 | |||
891 | static void xl_rx(struct net_device *dev) | ||
892 | { | ||
893 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
894 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
895 | struct sk_buff *skb, *skb2 ; | ||
896 | int frame_length = 0, copy_len = 0 ; | ||
897 | int temp_ring_loc ; | ||
898 | |||
899 | /* | ||
900 | * Receive the next frame, loop around the ring until all frames | ||
901 | * have been received. | ||
902 | */ | ||
903 | |||
904 | while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */ | ||
905 | |||
906 | if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */ | ||
907 | |||
908 | /* | ||
909 | * This is a pain, you need to go through all the descriptors until the last one | ||
910 | * for this frame to find the framelength | ||
911 | */ | ||
912 | |||
913 | temp_ring_loc = xl_priv->rx_ring_tail ; | ||
914 | |||
915 | while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) { | ||
916 | temp_ring_loc++ ; | ||
917 | temp_ring_loc &= (XL_RX_RING_SIZE-1) ; | ||
918 | } | ||
919 | |||
920 | frame_length = xl_priv->xl_rx_ring[temp_ring_loc].framestatus & 0x7FFF ; | ||
921 | |||
922 | skb = dev_alloc_skb(frame_length) ; | ||
923 | |||
924 | if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */ | ||
925 | printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ; | ||
926 | while (xl_priv->rx_ring_tail != temp_ring_loc) | ||
927 | adv_rx_ring(dev) ; | ||
928 | |||
929 | adv_rx_ring(dev) ; /* One more time just for luck :) */ | ||
930 | xl_priv->xl_stats.rx_dropped++ ; | ||
931 | |||
932 | writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; | ||
933 | return ; | ||
934 | } | ||
935 | |||
936 | skb->dev = dev ; | ||
937 | |||
938 | while (xl_priv->rx_ring_tail != temp_ring_loc) { | ||
939 | copy_len = xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen & 0x7FFF ; | ||
940 | frame_length -= copy_len ; | ||
941 | pci_dma_sync_single_for_cpu(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ; | ||
942 | memcpy(skb_put(skb,copy_len), xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]->data, copy_len) ; | ||
943 | pci_dma_sync_single_for_device(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ; | ||
944 | adv_rx_ring(dev) ; | ||
945 | } | ||
946 | |||
947 | /* Now we have found the last fragment */ | ||
948 | pci_dma_sync_single_for_cpu(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ; | ||
949 | memcpy(skb_put(skb,copy_len), xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]->data, frame_length) ; | ||
950 | /* memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */ | ||
951 | pci_dma_sync_single_for_device(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ; | ||
952 | adv_rx_ring(dev) ; | ||
953 | skb->protocol = tr_type_trans(skb,dev) ; | ||
954 | netif_rx(skb) ; | ||
955 | |||
956 | } else { /* Single Descriptor Used, simply swap buffers over, fast path */ | ||
957 | |||
958 | frame_length = xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & 0x7FFF ; | ||
959 | |||
960 | skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ; | ||
961 | |||
962 | if (skb==NULL) { /* Still need to fix the rx ring */ | ||
963 | printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer \n",dev->name) ; | ||
964 | adv_rx_ring(dev) ; | ||
965 | xl_priv->xl_stats.rx_dropped++ ; | ||
966 | writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; | ||
967 | return ; | ||
968 | } | ||
969 | |||
970 | skb->dev = dev ; | ||
971 | |||
972 | skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ; | ||
973 | pci_unmap_single(xl_priv->pdev, xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr, xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ; | ||
974 | skb_put(skb2, frame_length) ; | ||
975 | skb2->protocol = tr_type_trans(skb2,dev) ; | ||
976 | |||
977 | xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ; | ||
978 | xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ; | ||
979 | xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = xl_priv->pkt_buf_sz | RXUPLASTFRAG ; | ||
980 | adv_rx_ring(dev) ; | ||
981 | xl_priv->xl_stats.rx_packets++ ; | ||
982 | xl_priv->xl_stats.rx_bytes += frame_length ; | ||
983 | |||
984 | netif_rx(skb2) ; | ||
985 | } /* if multiple buffers */ | ||
986 | dev->last_rx = jiffies ; | ||
987 | } /* while packet to do */ | ||
988 | |||
989 | /* Clear the updComplete interrupt */ | ||
990 | writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; | ||
991 | return ; | ||
992 | } | ||
993 | |||
994 | /* | ||
995 | * This is ruthless, it doesn't care what state the card is in it will | ||
996 | * completely reset the adapter. | ||
997 | */ | ||
998 | |||
999 | static void xl_reset(struct net_device *dev) | ||
1000 | { | ||
1001 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
1002 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1003 | unsigned long t; | ||
1004 | |||
1005 | writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; | ||
1006 | |||
1007 | /* | ||
1008 | * Must wait for cmdInProgress bit (12) to clear before continuing with | ||
1009 | * card configuration. | ||
1010 | */ | ||
1011 | |||
1012 | t=jiffies; | ||
1013 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
1014 | if(jiffies-t > 40*HZ) { | ||
1015 | printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n"); | ||
1016 | break ; | ||
1017 | } | ||
1018 | } | ||
1019 | |||
1020 | } | ||
1021 | |||
1022 | static void xl_freemem(struct net_device *dev) | ||
1023 | { | ||
1024 | struct xl_private *xl_priv=(struct xl_private *)dev->priv ; | ||
1025 | int i ; | ||
1026 | |||
1027 | for (i=0;i<XL_RX_RING_SIZE;i++) { | ||
1028 | dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ; | ||
1029 | pci_unmap_single(xl_priv->pdev,xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE) ; | ||
1030 | xl_priv->rx_ring_tail++ ; | ||
1031 | xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1; | ||
1032 | } | ||
1033 | |||
1034 | /* unmap ring */ | ||
1035 | pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ; | ||
1036 | |||
1037 | pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ; | ||
1038 | |||
1039 | kfree(xl_priv->xl_rx_ring) ; | ||
1040 | kfree(xl_priv->xl_tx_ring) ; | ||
1041 | |||
1042 | return ; | ||
1043 | } | ||
1044 | |||
1045 | static irqreturn_t xl_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
1046 | { | ||
1047 | struct net_device *dev = (struct net_device *)dev_id; | ||
1048 | struct xl_private *xl_priv =(struct xl_private *)dev->priv; | ||
1049 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1050 | u16 intstatus, macstatus ; | ||
1051 | |||
1052 | if (!dev) { | ||
1053 | printk(KERN_WARNING "Device structure dead, aaahhhh !\n") ; | ||
1054 | return IRQ_NONE; | ||
1055 | } | ||
1056 | |||
1057 | intstatus = readw(xl_mmio + MMIO_INTSTATUS) ; | ||
1058 | |||
1059 | if (!(intstatus & 1)) /* We didn't generate the interrupt */ | ||
1060 | return IRQ_NONE; | ||
1061 | |||
1062 | spin_lock(&xl_priv->xl_lock) ; | ||
1063 | |||
1064 | /* | ||
1065 | * Process the interrupt | ||
1066 | */ | ||
1067 | /* | ||
1068 | * Something fishy going on here, we shouldn't get 0001 ints, not fatal though. | ||
1069 | */ | ||
1070 | if (intstatus == 0x0001) { | ||
1071 | writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1072 | printk(KERN_INFO "%s: 00001 int received \n",dev->name) ; | ||
1073 | } else { | ||
1074 | if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) { | ||
1075 | |||
1076 | /* | ||
1077 | * Host Error. | ||
1078 | * It may be possible to recover from this, but usually it means something | ||
1079 | * is seriously fubar, so we just close the adapter. | ||
1080 | */ | ||
1081 | |||
1082 | if (intstatus & HOSTERRINT) { | ||
1083 | printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x \n",dev->name,intstatus) ; | ||
1084 | writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; | ||
1085 | printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name); | ||
1086 | netif_stop_queue(dev) ; | ||
1087 | xl_freemem(dev) ; | ||
1088 | free_irq(dev->irq,dev); | ||
1089 | xl_reset(dev) ; | ||
1090 | writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1091 | spin_unlock(&xl_priv->xl_lock) ; | ||
1092 | return IRQ_HANDLED; | ||
1093 | } /* Host Error */ | ||
1094 | |||
1095 | if (intstatus & SRBRINT ) { /* Srbc interrupt */ | ||
1096 | writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1097 | if (xl_priv->srb_queued) | ||
1098 | xl_srb_bh(dev) ; | ||
1099 | } /* SRBR Interrupt */ | ||
1100 | |||
1101 | if (intstatus & TXUNDERRUN) { /* Issue DnReset command */ | ||
1102 | writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1103 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */ | ||
1104 | /* !!! FIX-ME !!!! | ||
1105 | Must put a timeout check here ! */ | ||
1106 | /* Empty Loop */ | ||
1107 | } | ||
1108 | printk(KERN_WARNING "%s: TX Underrun received \n",dev->name) ; | ||
1109 | writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1110 | } /* TxUnderRun */ | ||
1111 | |||
1112 | if (intstatus & ARBCINT ) { /* Arbc interrupt */ | ||
1113 | xl_arb_cmd(dev) ; | ||
1114 | } /* Arbc */ | ||
1115 | |||
1116 | if (intstatus & ASBFINT) { | ||
1117 | if (xl_priv->asb_queued == 1) { | ||
1118 | xl_asb_cmd(dev) ; | ||
1119 | } else if (xl_priv->asb_queued == 2) { | ||
1120 | xl_asb_bh(dev) ; | ||
1121 | } else { | ||
1122 | writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; | ||
1123 | } | ||
1124 | } /* Asbf */ | ||
1125 | |||
1126 | if (intstatus & UPCOMPINT ) /* UpComplete */ | ||
1127 | xl_rx(dev) ; | ||
1128 | |||
1129 | if (intstatus & DNCOMPINT ) /* DnComplete */ | ||
1130 | xl_dn_comp(dev) ; | ||
1131 | |||
1132 | if (intstatus & HARDERRINT ) { /* Hardware error */ | ||
1133 | writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1134 | macstatus = readw(xl_mmio + MMIO_MACDATA) ; | ||
1135 | printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name); | ||
1136 | if (macstatus & (1<<14)) | ||
1137 | printk(KERN_WARNING "tchk error: Unrecoverable error \n") ; | ||
1138 | if (macstatus & (1<<3)) | ||
1139 | printk(KERN_WARNING "eint error: Internal watchdog timer expired \n") ; | ||
1140 | if (macstatus & (1<<2)) | ||
1141 | printk(KERN_WARNING "aint error: Host tried to perform invalid operation \n") ; | ||
1142 | printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ; | ||
1143 | printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name); | ||
1144 | netif_stop_queue(dev) ; | ||
1145 | xl_freemem(dev) ; | ||
1146 | free_irq(dev->irq,dev); | ||
1147 | unregister_netdev(dev) ; | ||
1148 | free_netdev(dev) ; | ||
1149 | xl_reset(dev) ; | ||
1150 | writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1151 | spin_unlock(&xl_priv->xl_lock) ; | ||
1152 | return IRQ_HANDLED; | ||
1153 | } | ||
1154 | } else { | ||
1155 | printk(KERN_WARNING "%s: Received Unknown interrupt : %04x \n", dev->name, intstatus) ; | ||
1156 | writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1157 | } | ||
1158 | } | ||
1159 | |||
1160 | /* Turn interrupts back on */ | ||
1161 | |||
1162 | writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; | ||
1163 | writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; | ||
1164 | |||
1165 | spin_unlock(&xl_priv->xl_lock) ; | ||
1166 | return IRQ_HANDLED; | ||
1167 | } | ||
1168 | |||
1169 | /* | ||
1170 | * Tx - Polling configuration | ||
1171 | */ | ||
1172 | |||
1173 | static int xl_xmit(struct sk_buff *skb, struct net_device *dev) | ||
1174 | { | ||
1175 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
1176 | struct xl_tx_desc *txd ; | ||
1177 | int tx_head, tx_tail, tx_prev ; | ||
1178 | unsigned long flags ; | ||
1179 | |||
1180 | spin_lock_irqsave(&xl_priv->xl_lock,flags) ; | ||
1181 | |||
1182 | netif_stop_queue(dev) ; | ||
1183 | |||
1184 | if (xl_priv->free_ring_entries > 1 ) { | ||
1185 | /* | ||
1186 | * Set up the descriptor for the packet | ||
1187 | */ | ||
1188 | tx_head = xl_priv->tx_ring_head ; | ||
1189 | tx_tail = xl_priv->tx_ring_tail ; | ||
1190 | |||
1191 | txd = &(xl_priv->xl_tx_ring[tx_head]) ; | ||
1192 | txd->dnnextptr = 0 ; | ||
1193 | txd->framestartheader = skb->len | TXDNINDICATE ; | ||
1194 | txd->buffer = pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE) ; | ||
1195 | txd->buffer_length = skb->len | TXDNFRAGLAST ; | ||
1196 | xl_priv->tx_ring_skb[tx_head] = skb ; | ||
1197 | xl_priv->xl_stats.tx_packets++ ; | ||
1198 | xl_priv->xl_stats.tx_bytes += skb->len ; | ||
1199 | |||
1200 | /* | ||
1201 | * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1 | ||
1202 | * to ensure no negative numbers in unsigned locations. | ||
1203 | */ | ||
1204 | |||
1205 | tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ; | ||
1206 | |||
1207 | xl_priv->tx_ring_head++ ; | ||
1208 | xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ; | ||
1209 | xl_priv->free_ring_entries-- ; | ||
1210 | |||
1211 | xl_priv->xl_tx_ring[tx_prev].dnnextptr = xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head) ; | ||
1212 | |||
1213 | /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */ | ||
1214 | /* readl(xl_mmio + MMIO_DNLISTPTR) ; */ | ||
1215 | |||
1216 | netif_wake_queue(dev) ; | ||
1217 | |||
1218 | spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ; | ||
1219 | |||
1220 | return 0; | ||
1221 | } else { | ||
1222 | spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ; | ||
1223 | return 1; | ||
1224 | } | ||
1225 | |||
1226 | } | ||
1227 | |||
1228 | /* | ||
1229 | * The NIC has told us that a packet has been downloaded onto the card, we must | ||
1230 | * find out which packet it has done, clear the skb and information for the packet | ||
1231 | * then advance around the ring for all tranmitted packets | ||
1232 | */ | ||
1233 | |||
1234 | static void xl_dn_comp(struct net_device *dev) | ||
1235 | { | ||
1236 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
1237 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1238 | struct xl_tx_desc *txd ; | ||
1239 | |||
1240 | |||
1241 | if (xl_priv->tx_ring_tail == 255) {/* First time */ | ||
1242 | xl_priv->xl_tx_ring[0].framestartheader = 0 ; | ||
1243 | xl_priv->xl_tx_ring[0].dnnextptr = 0 ; | ||
1244 | xl_priv->tx_ring_tail = 1 ; | ||
1245 | } | ||
1246 | |||
1247 | while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) { | ||
1248 | txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ; | ||
1249 | pci_unmap_single(xl_priv->pdev,txd->buffer, xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE) ; | ||
1250 | txd->framestartheader = 0 ; | ||
1251 | txd->buffer = 0xdeadbeef ; | ||
1252 | txd->buffer_length = 0 ; | ||
1253 | dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ; | ||
1254 | xl_priv->tx_ring_tail++ ; | ||
1255 | xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ; | ||
1256 | xl_priv->free_ring_entries++ ; | ||
1257 | } | ||
1258 | |||
1259 | netif_wake_queue(dev) ; | ||
1260 | |||
1261 | writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; | ||
1262 | } | ||
1263 | |||
1264 | /* | ||
1265 | * Close the adapter properly. | ||
1266 | * This srb reply cannot be handled from interrupt context as we have | ||
1267 | * to free the interrupt from the driver. | ||
1268 | */ | ||
1269 | |||
1270 | static int xl_close(struct net_device *dev) | ||
1271 | { | ||
1272 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1273 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1274 | unsigned long t ; | ||
1275 | |||
1276 | netif_stop_queue(dev) ; | ||
1277 | |||
1278 | /* | ||
1279 | * Close the adapter, need to stall the rx and tx queues. | ||
1280 | */ | ||
1281 | |||
1282 | writew(DNSTALL, xl_mmio + MMIO_COMMAND) ; | ||
1283 | t=jiffies; | ||
1284 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
1285 | schedule(); | ||
1286 | if(jiffies-t > 10*HZ) { | ||
1287 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name); | ||
1288 | break ; | ||
1289 | } | ||
1290 | } | ||
1291 | writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ; | ||
1292 | t=jiffies; | ||
1293 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
1294 | schedule(); | ||
1295 | if(jiffies-t > 10*HZ) { | ||
1296 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name); | ||
1297 | break ; | ||
1298 | } | ||
1299 | } | ||
1300 | writew(UPSTALL, xl_mmio + MMIO_COMMAND) ; | ||
1301 | t=jiffies; | ||
1302 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
1303 | schedule(); | ||
1304 | if(jiffies-t > 10*HZ) { | ||
1305 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name); | ||
1306 | break ; | ||
1307 | } | ||
1308 | } | ||
1309 | |||
1310 | /* Turn off interrupts, we will still get the indication though | ||
1311 | * so we can trap it | ||
1312 | */ | ||
1313 | |||
1314 | writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ; | ||
1315 | |||
1316 | xl_srb_cmd(dev,CLOSE_NIC) ; | ||
1317 | |||
1318 | t=jiffies; | ||
1319 | while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) { | ||
1320 | schedule(); | ||
1321 | if(jiffies-t > 10*HZ) { | ||
1322 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name); | ||
1323 | break ; | ||
1324 | } | ||
1325 | } | ||
1326 | /* Read the srb response from the adapter */ | ||
1327 | |||
1328 | writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD); | ||
1329 | if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) { | ||
1330 | printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response \n",dev->name) ; | ||
1331 | } else { | ||
1332 | writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1333 | if (readb(xl_mmio + MMIO_MACDATA)==0) { | ||
1334 | printk(KERN_INFO "%s: Adapter has been closed \n",dev->name) ; | ||
1335 | writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1336 | |||
1337 | xl_freemem(dev) ; | ||
1338 | free_irq(dev->irq,dev) ; | ||
1339 | } else { | ||
1340 | printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ; | ||
1341 | } | ||
1342 | } | ||
1343 | |||
1344 | /* Reset the upload and download logic */ | ||
1345 | |||
1346 | writew(UPRESET, xl_mmio + MMIO_COMMAND) ; | ||
1347 | t=jiffies; | ||
1348 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
1349 | schedule(); | ||
1350 | if(jiffies-t > 10*HZ) { | ||
1351 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name); | ||
1352 | break ; | ||
1353 | } | ||
1354 | } | ||
1355 | writew(DNRESET, xl_mmio + MMIO_COMMAND) ; | ||
1356 | t=jiffies; | ||
1357 | while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { | ||
1358 | schedule(); | ||
1359 | if(jiffies-t > 10*HZ) { | ||
1360 | printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name); | ||
1361 | break ; | ||
1362 | } | ||
1363 | } | ||
1364 | xl_hw_reset(dev) ; | ||
1365 | return 0 ; | ||
1366 | } | ||
1367 | |||
1368 | static void xl_set_rx_mode(struct net_device *dev) | ||
1369 | { | ||
1370 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1371 | struct dev_mc_list *dmi ; | ||
1372 | unsigned char dev_mc_address[4] ; | ||
1373 | u16 options ; | ||
1374 | int i ; | ||
1375 | |||
1376 | if (dev->flags & IFF_PROMISC) | ||
1377 | options = 0x0004 ; | ||
1378 | else | ||
1379 | options = 0x0000 ; | ||
1380 | |||
1381 | if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */ | ||
1382 | xl_priv->xl_copy_all_options = options ; | ||
1383 | xl_srb_cmd(dev, SET_RECEIVE_MODE) ; | ||
1384 | return ; | ||
1385 | } | ||
1386 | |||
1387 | dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ; | ||
1388 | |||
1389 | for (i=0,dmi=dev->mc_list;i < dev->mc_count; i++,dmi = dmi->next) { | ||
1390 | dev_mc_address[0] |= dmi->dmi_addr[2] ; | ||
1391 | dev_mc_address[1] |= dmi->dmi_addr[3] ; | ||
1392 | dev_mc_address[2] |= dmi->dmi_addr[4] ; | ||
1393 | dev_mc_address[3] |= dmi->dmi_addr[5] ; | ||
1394 | } | ||
1395 | |||
1396 | if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */ | ||
1397 | memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ; | ||
1398 | xl_srb_cmd(dev, SET_FUNC_ADDRESS) ; | ||
1399 | } | ||
1400 | return ; | ||
1401 | } | ||
1402 | |||
1403 | |||
1404 | /* | ||
1405 | * We issued an srb command and now we must read | ||
1406 | * the response from the completed command. | ||
1407 | */ | ||
1408 | |||
1409 | static void xl_srb_bh(struct net_device *dev) | ||
1410 | { | ||
1411 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1412 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1413 | u8 srb_cmd, ret_code ; | ||
1414 | int i ; | ||
1415 | |||
1416 | writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1417 | srb_cmd = readb(xl_mmio + MMIO_MACDATA) ; | ||
1418 | writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1419 | ret_code = readb(xl_mmio + MMIO_MACDATA) ; | ||
1420 | |||
1421 | /* Ret_code is standard across all commands */ | ||
1422 | |||
1423 | switch (ret_code) { | ||
1424 | case 1: | ||
1425 | printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ; | ||
1426 | break ; | ||
1427 | case 4: | ||
1428 | printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command \n",dev->name,srb_cmd) ; | ||
1429 | break ; | ||
1430 | |||
1431 | case 6: | ||
1432 | printk(KERN_INFO "%s: Command: %d - Options Invalid for command \n",dev->name,srb_cmd) ; | ||
1433 | break ; | ||
1434 | |||
1435 | case 0: /* Successful command execution */ | ||
1436 | switch (srb_cmd) { | ||
1437 | case READ_LOG: /* Returns 14 bytes of data from the NIC */ | ||
1438 | if(xl_priv->xl_message_level) | ||
1439 | printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ; | ||
1440 | /* | ||
1441 | * We still have to read the log even if message_level = 0 and we don't want | ||
1442 | * to see it | ||
1443 | */ | ||
1444 | for (i=0;i<14;i++) { | ||
1445 | writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1446 | if(xl_priv->xl_message_level) | ||
1447 | printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ; | ||
1448 | } | ||
1449 | printk("\n") ; | ||
1450 | break ; | ||
1451 | case SET_FUNC_ADDRESS: | ||
1452 | if(xl_priv->xl_message_level) | ||
1453 | printk(KERN_INFO "%s: Functional Address Set \n",dev->name) ; | ||
1454 | break ; | ||
1455 | case CLOSE_NIC: | ||
1456 | if(xl_priv->xl_message_level) | ||
1457 | printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler \n",dev->name) ; | ||
1458 | break ; | ||
1459 | case SET_MULTICAST_MODE: | ||
1460 | if(xl_priv->xl_message_level) | ||
1461 | printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ; | ||
1462 | break ; | ||
1463 | case SET_RECEIVE_MODE: | ||
1464 | if(xl_priv->xl_message_level) { | ||
1465 | if (xl_priv->xl_copy_all_options == 0x0004) | ||
1466 | printk(KERN_INFO "%s: Entering promiscuous mode \n", dev->name) ; | ||
1467 | else | ||
1468 | printk(KERN_INFO "%s: Entering normal receive mode \n",dev->name) ; | ||
1469 | } | ||
1470 | break ; | ||
1471 | |||
1472 | } /* switch */ | ||
1473 | break ; | ||
1474 | } /* switch */ | ||
1475 | return ; | ||
1476 | } | ||
1477 | |||
1478 | static struct net_device_stats * xl_get_stats(struct net_device *dev) | ||
1479 | { | ||
1480 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1481 | return (struct net_device_stats *) &xl_priv->xl_stats; | ||
1482 | } | ||
1483 | |||
1484 | static int xl_set_mac_address (struct net_device *dev, void *addr) | ||
1485 | { | ||
1486 | struct sockaddr *saddr = addr ; | ||
1487 | struct xl_private *xl_priv = (struct xl_private *)dev->priv ; | ||
1488 | |||
1489 | if (netif_running(dev)) { | ||
1490 | printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ; | ||
1491 | return -EIO ; | ||
1492 | } | ||
1493 | |||
1494 | memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ; | ||
1495 | |||
1496 | if (xl_priv->xl_message_level) { | ||
1497 | printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0], | ||
1498 | xl_priv->xl_laa[1], xl_priv->xl_laa[2], | ||
1499 | xl_priv->xl_laa[3], xl_priv->xl_laa[4], | ||
1500 | xl_priv->xl_laa[5]); | ||
1501 | } | ||
1502 | |||
1503 | return 0 ; | ||
1504 | } | ||
1505 | |||
1506 | static void xl_arb_cmd(struct net_device *dev) | ||
1507 | { | ||
1508 | struct xl_private *xl_priv = (struct xl_private *) dev->priv; | ||
1509 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1510 | u8 arb_cmd ; | ||
1511 | u16 lan_status, lan_status_diff ; | ||
1512 | |||
1513 | writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1514 | arb_cmd = readb(xl_mmio + MMIO_MACDATA) ; | ||
1515 | |||
1516 | if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */ | ||
1517 | writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1518 | |||
1519 | printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, ntohs(readw(xl_mmio + MMIO_MACDATA) )) ; | ||
1520 | |||
1521 | lan_status = ntohs(readw(xl_mmio + MMIO_MACDATA)); | ||
1522 | |||
1523 | /* Acknowledge interrupt, this tells nic we are done with the arb */ | ||
1524 | writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1525 | |||
1526 | lan_status_diff = xl_priv->xl_lan_status ^ lan_status ; | ||
1527 | |||
1528 | if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) { | ||
1529 | if (lan_status_diff & LSC_LWF) | ||
1530 | printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name); | ||
1531 | if (lan_status_diff & LSC_ARW) | ||
1532 | printk(KERN_WARNING "%s: Auto removal error\n",dev->name); | ||
1533 | if (lan_status_diff & LSC_FPE) | ||
1534 | printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name); | ||
1535 | if (lan_status_diff & LSC_RR) | ||
1536 | printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name); | ||
1537 | |||
1538 | /* Adapter has been closed by the hardware */ | ||
1539 | |||
1540 | netif_stop_queue(dev); | ||
1541 | xl_freemem(dev) ; | ||
1542 | free_irq(dev->irq,dev); | ||
1543 | |||
1544 | printk(KERN_WARNING "%s: Adapter has been closed \n", dev->name) ; | ||
1545 | } /* If serious error */ | ||
1546 | |||
1547 | if (xl_priv->xl_message_level) { | ||
1548 | if (lan_status_diff & LSC_SIG_LOSS) | ||
1549 | printk(KERN_WARNING "%s: No receive signal detected \n", dev->name) ; | ||
1550 | if (lan_status_diff & LSC_HARD_ERR) | ||
1551 | printk(KERN_INFO "%s: Beaconing \n",dev->name); | ||
1552 | if (lan_status_diff & LSC_SOFT_ERR) | ||
1553 | printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame \n",dev->name); | ||
1554 | if (lan_status_diff & LSC_TRAN_BCN) | ||
1555 | printk(KERN_INFO "%s: We are tranmitting the beacon, aaah\n",dev->name); | ||
1556 | if (lan_status_diff & LSC_SS) | ||
1557 | printk(KERN_INFO "%s: Single Station on the ring \n", dev->name); | ||
1558 | if (lan_status_diff & LSC_RING_REC) | ||
1559 | printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name); | ||
1560 | if (lan_status_diff & LSC_FDX_MODE) | ||
1561 | printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name); | ||
1562 | } | ||
1563 | |||
1564 | if (lan_status_diff & LSC_CO) { | ||
1565 | if (xl_priv->xl_message_level) | ||
1566 | printk(KERN_INFO "%s: Counter Overflow \n", dev->name); | ||
1567 | /* Issue READ.LOG command */ | ||
1568 | xl_srb_cmd(dev, READ_LOG) ; | ||
1569 | } | ||
1570 | |||
1571 | /* There is no command in the tech docs to issue the read_sr_counters */ | ||
1572 | if (lan_status_diff & LSC_SR_CO) { | ||
1573 | if (xl_priv->xl_message_level) | ||
1574 | printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name); | ||
1575 | } | ||
1576 | |||
1577 | xl_priv->xl_lan_status = lan_status ; | ||
1578 | |||
1579 | } /* Lan.change.status */ | ||
1580 | else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */ | ||
1581 | #if XL_DEBUG | ||
1582 | printk(KERN_INFO "Received.Data \n") ; | ||
1583 | #endif | ||
1584 | writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1585 | xl_priv->mac_buffer = ntohs(readw(xl_mmio + MMIO_MACDATA)) ; | ||
1586 | |||
1587 | /* Now we are going to be really basic here and not do anything | ||
1588 | * with the data at all. The tech docs do not give me enough | ||
1589 | * information to calculate the buffers properly so we're | ||
1590 | * just going to tell the nic that we've dealt with the frame | ||
1591 | * anyway. | ||
1592 | */ | ||
1593 | |||
1594 | dev->last_rx = jiffies ; | ||
1595 | /* Acknowledge interrupt, this tells nic we are done with the arb */ | ||
1596 | writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; | ||
1597 | |||
1598 | /* Is the ASB free ? */ | ||
1599 | |||
1600 | xl_priv->asb_queued = 0 ; | ||
1601 | writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1602 | if (readb(xl_mmio + MMIO_MACDATA) != 0xff) { | ||
1603 | xl_priv->asb_queued = 1 ; | ||
1604 | |||
1605 | xl_wait_misr_flags(dev) ; | ||
1606 | |||
1607 | writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD); | ||
1608 | writeb(0xff, xl_mmio + MMIO_MACDATA) ; | ||
1609 | writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1610 | writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ; | ||
1611 | return ; | ||
1612 | /* Drop out and wait for the bottom half to be run */ | ||
1613 | } | ||
1614 | |||
1615 | xl_asb_cmd(dev) ; | ||
1616 | |||
1617 | } else { | ||
1618 | printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x \n",dev->name,arb_cmd) ; | ||
1619 | } | ||
1620 | |||
1621 | /* Acknowledge the arb interrupt */ | ||
1622 | |||
1623 | writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; | ||
1624 | |||
1625 | return ; | ||
1626 | } | ||
1627 | |||
1628 | |||
1629 | /* | ||
1630 | * There is only one asb command, but we can get called from different | ||
1631 | * places. | ||
1632 | */ | ||
1633 | |||
1634 | static void xl_asb_cmd(struct net_device *dev) | ||
1635 | { | ||
1636 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1637 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1638 | |||
1639 | if (xl_priv->asb_queued == 1) | ||
1640 | writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; | ||
1641 | |||
1642 | writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1643 | writeb(0x81, xl_mmio + MMIO_MACDATA) ; | ||
1644 | |||
1645 | writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1646 | writew(ntohs(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ; | ||
1647 | |||
1648 | xl_wait_misr_flags(dev) ; | ||
1649 | |||
1650 | writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD); | ||
1651 | writeb(0xff, xl_mmio + MMIO_MACDATA) ; | ||
1652 | |||
1653 | writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1654 | writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ; | ||
1655 | |||
1656 | xl_priv->asb_queued = 2 ; | ||
1657 | |||
1658 | return ; | ||
1659 | } | ||
1660 | |||
1661 | /* | ||
1662 | * This will only get called if there was an error | ||
1663 | * from the asb cmd. | ||
1664 | */ | ||
1665 | static void xl_asb_bh(struct net_device *dev) | ||
1666 | { | ||
1667 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1668 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1669 | u8 ret_code ; | ||
1670 | |||
1671 | writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1672 | ret_code = readb(xl_mmio + MMIO_MACDATA) ; | ||
1673 | switch (ret_code) { | ||
1674 | case 0x01: | ||
1675 | printk(KERN_INFO "%s: ASB Command, unrecognized command code \n",dev->name) ; | ||
1676 | break ; | ||
1677 | case 0x26: | ||
1678 | printk(KERN_INFO "%s: ASB Command, unexpected receive buffer \n", dev->name) ; | ||
1679 | break ; | ||
1680 | case 0x40: | ||
1681 | printk(KERN_INFO "%s: ASB Command, Invalid Station ID \n", dev->name) ; | ||
1682 | break ; | ||
1683 | } | ||
1684 | xl_priv->asb_queued = 0 ; | ||
1685 | writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; | ||
1686 | return ; | ||
1687 | } | ||
1688 | |||
1689 | /* | ||
1690 | * Issue srb commands to the nic | ||
1691 | */ | ||
1692 | |||
1693 | static void xl_srb_cmd(struct net_device *dev, int srb_cmd) | ||
1694 | { | ||
1695 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1696 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1697 | |||
1698 | switch (srb_cmd) { | ||
1699 | case READ_LOG: | ||
1700 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1701 | writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ; | ||
1702 | break; | ||
1703 | |||
1704 | case CLOSE_NIC: | ||
1705 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1706 | writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ; | ||
1707 | break ; | ||
1708 | |||
1709 | case SET_RECEIVE_MODE: | ||
1710 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1711 | writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ; | ||
1712 | writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1713 | writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ; | ||
1714 | break ; | ||
1715 | |||
1716 | case SET_FUNC_ADDRESS: | ||
1717 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1718 | writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ; | ||
1719 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1720 | writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ; | ||
1721 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1722 | writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ; | ||
1723 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1724 | writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ; | ||
1725 | writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1726 | writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ; | ||
1727 | break ; | ||
1728 | } /* switch */ | ||
1729 | |||
1730 | |||
1731 | xl_wait_misr_flags(dev) ; | ||
1732 | |||
1733 | /* Write 0xff to the CSRB flag */ | ||
1734 | writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1735 | writeb(0xFF, xl_mmio + MMIO_MACDATA) ; | ||
1736 | /* Set csrb bit in MISR register to process command */ | ||
1737 | writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1738 | writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ; | ||
1739 | xl_priv->srb_queued = 1 ; | ||
1740 | |||
1741 | return ; | ||
1742 | } | ||
1743 | |||
1744 | /* | ||
1745 | * This is nasty, to use the MISR command you have to wait for 6 memory locations | ||
1746 | * to be zero. This is the way the driver does on other OS'es so we should be ok with | ||
1747 | * the empty loop. | ||
1748 | */ | ||
1749 | |||
1750 | static void xl_wait_misr_flags(struct net_device *dev) | ||
1751 | { | ||
1752 | struct xl_private *xl_priv = (struct xl_private *) dev->priv ; | ||
1753 | u8 __iomem * xl_mmio = xl_priv->xl_mmio ; | ||
1754 | |||
1755 | int i ; | ||
1756 | |||
1757 | writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1758 | if (readb(xl_mmio + MMIO_MACDATA) != 0) { /* Misr not clear */ | ||
1759 | for (i=0; i<6; i++) { | ||
1760 | writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1761 | while (readb(xl_mmio + MMIO_MACDATA) != 0 ) {} ; /* Empty Loop */ | ||
1762 | } | ||
1763 | } | ||
1764 | |||
1765 | writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ; | ||
1766 | writeb(0x80, xl_mmio + MMIO_MACDATA) ; | ||
1767 | |||
1768 | return ; | ||
1769 | } | ||
1770 | |||
1771 | /* | ||
1772 | * Change mtu size, this should work the same as olympic | ||
1773 | */ | ||
1774 | |||
1775 | static int xl_change_mtu(struct net_device *dev, int mtu) | ||
1776 | { | ||
1777 | struct xl_private *xl_priv = (struct xl_private *) dev->priv; | ||
1778 | u16 max_mtu ; | ||
1779 | |||
1780 | if (xl_priv->xl_ring_speed == 4) | ||
1781 | max_mtu = 4500 ; | ||
1782 | else | ||
1783 | max_mtu = 18000 ; | ||
1784 | |||
1785 | if (mtu > max_mtu) | ||
1786 | return -EINVAL ; | ||
1787 | if (mtu < 100) | ||
1788 | return -EINVAL ; | ||
1789 | |||
1790 | dev->mtu = mtu ; | ||
1791 | xl_priv->pkt_buf_sz = mtu + TR_HLEN ; | ||
1792 | |||
1793 | return 0 ; | ||
1794 | } | ||
1795 | |||
1796 | static void __devexit xl_remove_one (struct pci_dev *pdev) | ||
1797 | { | ||
1798 | struct net_device *dev = pci_get_drvdata(pdev); | ||
1799 | struct xl_private *xl_priv=(struct xl_private *)dev->priv; | ||
1800 | |||
1801 | unregister_netdev(dev); | ||
1802 | iounmap(xl_priv->xl_mmio) ; | ||
1803 | pci_release_regions(pdev) ; | ||
1804 | pci_set_drvdata(pdev,NULL) ; | ||
1805 | free_netdev(dev); | ||
1806 | return ; | ||
1807 | } | ||
1808 | |||
1809 | static struct pci_driver xl_3c359_driver = { | ||
1810 | .name = "3c359", | ||
1811 | .id_table = xl_pci_tbl, | ||
1812 | .probe = xl_probe, | ||
1813 | .remove = __devexit_p(xl_remove_one), | ||
1814 | }; | ||
1815 | |||
1816 | static int __init xl_pci_init (void) | ||
1817 | { | ||
1818 | return pci_module_init (&xl_3c359_driver); | ||
1819 | } | ||
1820 | |||
1821 | |||
1822 | static void __exit xl_pci_cleanup (void) | ||
1823 | { | ||
1824 | pci_unregister_driver (&xl_3c359_driver); | ||
1825 | } | ||
1826 | |||
1827 | module_init(xl_pci_init); | ||
1828 | module_exit(xl_pci_cleanup); | ||
1829 | |||
1830 | MODULE_LICENSE("GPL") ; | ||