diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2008-11-21 20:16:16 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-11-21 20:16:16 -0500 |
commit | ad8292681a629cdb16bb19ee7d721b457c32a23a (patch) | |
tree | 37f8552bf329967dd3c2e08382216dece0d87913 /drivers/net/tg3.c | |
parent | cf005b1d0e34d8c964347331c43de089c674a5a1 (diff) |
tg3: Use NET_IP_ALIGN
This patch replaces hardcoded 2's with the NET_IP_ALIGN constant or
TG3_RAW_IP_ALIGN where appropriate. Some platforms can redefine the
NET_IP_ALIGN definition to zero if unaligned DMA transfers cost more
than the IP header alignment gains. This patch represents a
performance improvement when using the 5701 on these platforms.
The copy path can be avoided.
TG3_RAW_IP_ALIGN is used in cases where we always want to align the
IP header on dword boundaries.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 9ba18e1bc34..0a82ea878ae 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -132,6 +132,8 @@ | |||
132 | /* minimum number of free TX descriptors required to wake up TX process */ | 132 | /* minimum number of free TX descriptors required to wake up TX process */ |
133 | #define TG3_TX_WAKEUP_THRESH(tp) ((tp)->tx_pending / 4) | 133 | #define TG3_TX_WAKEUP_THRESH(tp) ((tp)->tx_pending / 4) |
134 | 134 | ||
135 | #define TG3_RAW_IP_ALIGN 2 | ||
136 | |||
135 | /* number of ETHTOOL_GSTATS u64's */ | 137 | /* number of ETHTOOL_GSTATS u64's */ |
136 | #define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64)) | 138 | #define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64)) |
137 | 139 | ||
@@ -4231,12 +4233,15 @@ static int tg3_rx(struct tg3 *tp, int budget) | |||
4231 | goto next_pkt; | 4233 | goto next_pkt; |
4232 | } | 4234 | } |
4233 | 4235 | ||
4234 | len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; /* omit crc */ | 4236 | len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - |
4237 | ETH_FCS_LEN; | ||
4235 | 4238 | ||
4236 | if (len > RX_COPY_THRESHOLD | 4239 | if (len > RX_COPY_THRESHOLD |
4237 | && tp->rx_offset == 2 | 4240 | && tp->rx_offset == NET_IP_ALIGN |
4238 | /* rx_offset != 2 iff this is a 5701 card running | 4241 | /* rx_offset will likely not equal NET_IP_ALIGN |
4239 | * in PCI-X mode [see tg3_get_invariants()] */ | 4242 | * if this is a 5701 card running in PCI-X mode |
4243 | * [see tg3_get_invariants()] | ||
4244 | */ | ||
4240 | ) { | 4245 | ) { |
4241 | int skb_size; | 4246 | int skb_size; |
4242 | 4247 | ||
@@ -4256,11 +4261,12 @@ static int tg3_rx(struct tg3 *tp, int budget) | |||
4256 | tg3_recycle_rx(tp, opaque_key, | 4261 | tg3_recycle_rx(tp, opaque_key, |
4257 | desc_idx, *post_ptr); | 4262 | desc_idx, *post_ptr); |
4258 | 4263 | ||
4259 | copy_skb = netdev_alloc_skb(tp->dev, len + 2); | 4264 | copy_skb = netdev_alloc_skb(tp->dev, |
4265 | len + TG3_RAW_IP_ALIGN); | ||
4260 | if (copy_skb == NULL) | 4266 | if (copy_skb == NULL) |
4261 | goto drop_it_no_recycle; | 4267 | goto drop_it_no_recycle; |
4262 | 4268 | ||
4263 | skb_reserve(copy_skb, 2); | 4269 | skb_reserve(copy_skb, TG3_RAW_IP_ALIGN); |
4264 | skb_put(copy_skb, len); | 4270 | skb_put(copy_skb, len); |
4265 | pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE); | 4271 | pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE); |
4266 | skb_copy_from_linear_data(skb, copy_skb->data, len); | 4272 | skb_copy_from_linear_data(skb, copy_skb->data, len); |
@@ -12614,7 +12620,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
12614 | else | 12620 | else |
12615 | tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES; | 12621 | tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES; |
12616 | 12622 | ||
12617 | tp->rx_offset = 2; | 12623 | tp->rx_offset = NET_IP_ALIGN; |
12618 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 && | 12624 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 && |
12619 | (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) | 12625 | (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) |
12620 | tp->rx_offset = 0; | 12626 | tp->rx_offset = 0; |