diff options
author | Michael Chan <mchan@broadcom.com> | 2005-09-05 20:52:38 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2005-09-05 20:52:38 -0400 |
commit | 4c98748763ce25c5394a7edd686d92c70b4fac38 (patch) | |
tree | c80f671c4a04683d9efd7a6763d82cadaa459203 /drivers/net/tg3.c | |
parent | 67d2c36e901403bb97cb79ddb44d702c3284d0ba (diff) |
[TG3]: Minor 5780 and 5752 fixes
Minor SerDes bug fixes for 5780S and nvram bug fixes for 5780 and
5752.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 3faf62310f8..3ee1a7be864 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -5962,7 +5962,7 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5962 | tw32(MAC_LED_CTRL, tp->led_ctrl); | 5962 | tw32(MAC_LED_CTRL, tp->led_ctrl); |
5963 | 5963 | ||
5964 | tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB); | 5964 | tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB); |
5965 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { | 5965 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) { |
5966 | tw32_f(MAC_RX_MODE, RX_MODE_RESET); | 5966 | tw32_f(MAC_RX_MODE, RX_MODE_RESET); |
5967 | udelay(10); | 5967 | udelay(10); |
5968 | } | 5968 | } |
@@ -7618,7 +7618,7 @@ static int tg3_test_link(struct tg3 *tp) | |||
7618 | if (!netif_running(tp->dev)) | 7618 | if (!netif_running(tp->dev)) |
7619 | return -ENODEV; | 7619 | return -ENODEV; |
7620 | 7620 | ||
7621 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) | 7621 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) |
7622 | max = TG3_SERDES_TIMEOUT_SEC; | 7622 | max = TG3_SERDES_TIMEOUT_SEC; |
7623 | else | 7623 | else |
7624 | max = TG3_COPPER_TIMEOUT_SEC; | 7624 | max = TG3_COPPER_TIMEOUT_SEC; |
@@ -8305,7 +8305,8 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp) | |||
8305 | tw32(NVRAM_CFG1, nvcfg1); | 8305 | tw32(NVRAM_CFG1, nvcfg1); |
8306 | } | 8306 | } |
8307 | 8307 | ||
8308 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { | 8308 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) || |
8309 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)) { | ||
8309 | switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) { | 8310 | switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) { |
8310 | case FLASH_VENDOR_ATMEL_FLASH_BUFFERED: | 8311 | case FLASH_VENDOR_ATMEL_FLASH_BUFFERED: |
8311 | tp->nvram_jedecnum = JEDEC_ATMEL; | 8312 | tp->nvram_jedecnum = JEDEC_ATMEL; |
@@ -8719,8 +8720,9 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len, | |||
8719 | if (i == (len - 4)) | 8720 | if (i == (len - 4)) |
8720 | nvram_cmd |= NVRAM_CMD_LAST; | 8721 | nvram_cmd |= NVRAM_CMD_LAST; |
8721 | 8722 | ||
8722 | if ((tp->nvram_jedecnum == JEDEC_ST) && | 8723 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) && |
8723 | (nvram_cmd & NVRAM_CMD_FIRST)) { | 8724 | (tp->nvram_jedecnum == JEDEC_ST) && |
8725 | (nvram_cmd & NVRAM_CMD_FIRST)) { | ||
8724 | 8726 | ||
8725 | if ((ret = tg3_nvram_exec_cmd(tp, | 8727 | if ((ret = tg3_nvram_exec_cmd(tp, |
8726 | NVRAM_CMD_WREN | NVRAM_CMD_GO | | 8728 | NVRAM_CMD_WREN | NVRAM_CMD_GO | |