diff options
author | Anirban Chakraborty <anirban.chakraborty@qlogic.com> | 2011-05-12 08:48:33 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-05-13 14:44:12 -0400 |
commit | 18f2f616be88736f5daf31d9d40e027abbd607ed (patch) | |
tree | c4ef622c5f4c187099cfac33f2fc6313c4efe790 /drivers/net/qlcnic/qlcnic_hdr.h | |
parent | 1dbf53a28262aa89ecbe653e8a9127c0baef9bc4 (diff) |
qlcnic: FW dump support
Added code to take FW dump.
o Driver queries FW at the init time and gets the dump template
o It takes FW dump as per the dump template
o Level of FW dump (and its size) is configured via dump flag
Signed-off-by: Sritej Velaga <sritej.velaga@qlogic.com>
Signed-off-by: Anirban Chakraborty <anirban.chakraborty@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/qlcnic/qlcnic_hdr.h')
-rw-r--r-- | drivers/net/qlcnic/qlcnic_hdr.h | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/drivers/net/qlcnic/qlcnic_hdr.h b/drivers/net/qlcnic/qlcnic_hdr.h index 726ef555b6b..d14506f764e 100644 --- a/drivers/net/qlcnic/qlcnic_hdr.h +++ b/drivers/net/qlcnic/qlcnic_hdr.h | |||
@@ -492,10 +492,10 @@ enum { | |||
492 | 492 | ||
493 | #define TEST_AGT_CTRL (0x00) | 493 | #define TEST_AGT_CTRL (0x00) |
494 | 494 | ||
495 | #define TA_CTL_START 1 | 495 | #define TA_CTL_START BIT_0 |
496 | #define TA_CTL_ENABLE 2 | 496 | #define TA_CTL_ENABLE BIT_1 |
497 | #define TA_CTL_WRITE 4 | 497 | #define TA_CTL_WRITE BIT_2 |
498 | #define TA_CTL_BUSY 8 | 498 | #define TA_CTL_BUSY BIT_3 |
499 | 499 | ||
500 | /* | 500 | /* |
501 | * Register offsets for MN | 501 | * Register offsets for MN |
@@ -765,6 +765,38 @@ struct qlcnic_legacy_intr_set { | |||
765 | #define QLCNIC_MAX_PCI_FUNC 8 | 765 | #define QLCNIC_MAX_PCI_FUNC 8 |
766 | #define QLCNIC_MAX_VLAN_FILTERS 64 | 766 | #define QLCNIC_MAX_VLAN_FILTERS 64 |
767 | 767 | ||
768 | /* FW dump defines */ | ||
769 | #define MIU_TEST_CTR 0x41000090 | ||
770 | #define MIU_TEST_ADDR_LO 0x41000094 | ||
771 | #define MIU_TEST_ADDR_HI 0x41000098 | ||
772 | #define FLASH_ROM_WINDOW 0x42110030 | ||
773 | #define FLASH_ROM_DATA 0x42150000 | ||
774 | |||
775 | static const u32 MIU_TEST_READ_DATA[] = { | ||
776 | 0x410000A8, 0x410000AC, 0x410000B8, 0x410000BC, }; | ||
777 | |||
778 | #define QLCNIC_FW_DUMP_REG1 0x00130060 | ||
779 | #define QLCNIC_FW_DUMP_REG2 0x001e0000 | ||
780 | #define QLCNIC_FLASH_SEM2_LK 0x0013C010 | ||
781 | #define QLCNIC_FLASH_SEM2_ULK 0x0013C014 | ||
782 | #define QLCNIC_FLASH_LOCK_ID 0x001B2100 | ||
783 | |||
784 | #define QLCNIC_RD_DUMP_REG(addr, bar0, data) do { \ | ||
785 | writel((addr & 0xFFFF0000), (void *) (bar0 + \ | ||
786 | QLCNIC_FW_DUMP_REG1)); \ | ||
787 | readl((void *) (bar0 + QLCNIC_FW_DUMP_REG1)); \ | ||
788 | *data = readl((void *) (bar0 + QLCNIC_FW_DUMP_REG2 + \ | ||
789 | LSW(addr))); \ | ||
790 | } while (0) | ||
791 | |||
792 | #define QLCNIC_WR_DUMP_REG(addr, bar0, data) do { \ | ||
793 | writel((addr & 0xFFFF0000), (void *) (bar0 + \ | ||
794 | QLCNIC_FW_DUMP_REG1)); \ | ||
795 | readl((void *) (bar0 + QLCNIC_FW_DUMP_REG1)); \ | ||
796 | writel(data, (void *) (bar0 + QLCNIC_FW_DUMP_REG2 + LSW(addr)));\ | ||
797 | readl((void *) (bar0 + QLCNIC_FW_DUMP_REG2 + LSW(addr))); \ | ||
798 | } while (0) | ||
799 | |||
768 | /* PCI function operational mode */ | 800 | /* PCI function operational mode */ |
769 | enum { | 801 | enum { |
770 | QLCNIC_MGMT_FUNC = 0, | 802 | QLCNIC_MGMT_FUNC = 0, |