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authorDhananjay Phadke <dhananjay@netxen.com>2008-07-21 22:44:02 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-07-22 17:51:23 -0400
commite4c93c817ce650401db42db6c869cf7688217ff4 (patch)
tree280ef8bd2768407ab140367de6bf9980b3f5c9d9 /drivers/net/netxen/netxen_nic.h
parent623621b07ebc5b72e0bdfa4a50bbb28f4587de0c (diff)
netxen: add defs for new chip/boards
Add macros for new chip revision and board configurations. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/netxen/netxen_nic.h')
-rw-r--r--drivers/net/netxen/netxen_nic.h65
1 files changed, 53 insertions, 12 deletions
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index fa1fbab6562..acc7d79457d 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -111,6 +111,13 @@
111 111
112#define NX_P2_C0 0x24 112#define NX_P2_C0 0x24
113#define NX_P2_C1 0x25 113#define NX_P2_C1 0x25
114#define NX_P3_A0 0x30
115#define NX_P3_A2 0x30
116#define NX_P3_B0 0x40
117#define NX_P3_B1 0x41
118
119#define NX_IS_REVISION_P2(REVISION) (REVISION <= NX_P2_C1)
120#define NX_IS_REVISION_P3(REVISION) (REVISION >= NX_P3_A0)
114 121
115#define FIRST_PAGE_GROUP_START 0 122#define FIRST_PAGE_GROUP_START 0
116#define FIRST_PAGE_GROUP_END 0x100000 123#define FIRST_PAGE_GROUP_END 0x100000
@@ -125,6 +132,15 @@
125#define SECOND_PAGE_GROUP_SIZE SECOND_PAGE_GROUP_END - SECOND_PAGE_GROUP_START 132#define SECOND_PAGE_GROUP_SIZE SECOND_PAGE_GROUP_END - SECOND_PAGE_GROUP_START
126#define THIRD_PAGE_GROUP_SIZE THIRD_PAGE_GROUP_END - THIRD_PAGE_GROUP_START 133#define THIRD_PAGE_GROUP_SIZE THIRD_PAGE_GROUP_END - THIRD_PAGE_GROUP_START
127 134
135#define P2_MAX_MTU (8000)
136#define P3_MAX_MTU (9600)
137#define NX_ETHERMTU 1500
138#define NX_MAX_ETHERHDR 32 /* This contains some padding */
139
140#define NX_RX_NORMAL_BUF_MAX_LEN (NX_MAX_ETHERHDR + NX_ETHERMTU)
141#define NX_P2_RX_JUMBO_BUF_MAX_LEN (NX_MAX_ETHERHDR + P2_MAX_MTU)
142#define NX_P3_RX_JUMBO_BUF_MAX_LEN (NX_MAX_ETHERHDR + P3_MAX_MTU)
143
128#define MAX_RX_BUFFER_LENGTH 1760 144#define MAX_RX_BUFFER_LENGTH 1760
129#define MAX_RX_JUMBO_BUFFER_LENGTH 8062 145#define MAX_RX_JUMBO_BUFFER_LENGTH 8062
130#define MAX_RX_LRO_BUFFER_LENGTH ((48*1024)-512) 146#define MAX_RX_LRO_BUFFER_LENGTH ((48*1024)-512)
@@ -139,16 +155,16 @@
139#define MAX_RING_CTX 1 155#define MAX_RING_CTX 1
140 156
141/* Opcodes to be used with the commands */ 157/* Opcodes to be used with the commands */
142enum { 158#define TX_ETHER_PKT 0x01
143 TX_ETHER_PKT = 0x01, 159#define TX_TCP_PKT 0x02
144/* The following opcodes are for IP checksum */ 160#define TX_UDP_PKT 0x03
145 TX_TCP_PKT, 161#define TX_IP_PKT 0x04
146 TX_UDP_PKT, 162#define TX_TCP_LSO 0x05
147 TX_IP_PKT, 163#define TX_TCP_LSO6 0x06
148 TX_TCP_LSO, 164#define TX_IPSEC 0x07
149 TX_IPSEC, 165#define TX_IPSEC_CMD 0x0a
150 TX_IPSEC_CMD 166#define TX_TCPV6_PKT 0x0b
151}; 167#define TX_UDPV6_PKT 0x0c
152 168
153/* The following opcodes are for internal consumption. */ 169/* The following opcodes are for internal consumption. */
154#define NETXEN_CONTROL_OP 0x10 170#define NETXEN_CONTROL_OP 0x10
@@ -190,6 +206,7 @@ enum {
190#define MAX_RCV_DESCRIPTORS 16384 206#define MAX_RCV_DESCRIPTORS 16384
191#define MAX_CMD_DESCRIPTORS_HOST (MAX_CMD_DESCRIPTORS / 4) 207#define MAX_CMD_DESCRIPTORS_HOST (MAX_CMD_DESCRIPTORS / 4)
192#define MAX_RCV_DESCRIPTORS_1G (MAX_RCV_DESCRIPTORS / 4) 208#define MAX_RCV_DESCRIPTORS_1G (MAX_RCV_DESCRIPTORS / 4)
209#define MAX_RCV_DESCRIPTORS_10G 8192
193#define MAX_JUMBO_RCV_DESCRIPTORS 1024 210#define MAX_JUMBO_RCV_DESCRIPTORS 1024
194#define MAX_LRO_RCV_DESCRIPTORS 64 211#define MAX_LRO_RCV_DESCRIPTORS 64
195#define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS 212#define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS
@@ -461,7 +478,20 @@ typedef enum {
461 478
462 NETXEN_BRDTYPE_P2_SB31_10G_IMEZ = 0x000d, 479 NETXEN_BRDTYPE_P2_SB31_10G_IMEZ = 0x000d,
463 NETXEN_BRDTYPE_P2_SB31_10G_HMEZ = 0x000e, 480 NETXEN_BRDTYPE_P2_SB31_10G_HMEZ = 0x000e,
464 NETXEN_BRDTYPE_P2_SB31_10G_CX4 = 0x000f 481 NETXEN_BRDTYPE_P2_SB31_10G_CX4 = 0x000f,
482
483 NETXEN_BRDTYPE_P3_REF_QG = 0x0021,
484 NETXEN_BRDTYPE_P3_HMEZ = 0x0022,
485 NETXEN_BRDTYPE_P3_10G_CX4_LP = 0x0023,
486 NETXEN_BRDTYPE_P3_4_GB = 0x0024,
487 NETXEN_BRDTYPE_P3_IMEZ = 0x0025,
488 NETXEN_BRDTYPE_P3_10G_SFP_PLUS = 0x0026,
489 NETXEN_BRDTYPE_P3_10000_BASE_T = 0x0027,
490 NETXEN_BRDTYPE_P3_XG_LOM = 0x0028,
491 NETXEN_BRDTYPE_P3_4_GB_MM = 0x0029,
492 NETXEN_BRDTYPE_P3_10G_CX4 = 0x0031,
493 NETXEN_BRDTYPE_P3_10G_XFP = 0x0032
494
465} netxen_brdtype_t; 495} netxen_brdtype_t;
466 496
467typedef enum { 497typedef enum {
@@ -1049,7 +1079,7 @@ struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev);
1049 * NetXen Board information 1079 * NetXen Board information
1050 */ 1080 */
1051 1081
1052#define NETXEN_MAX_SHORT_NAME 16 1082#define NETXEN_MAX_SHORT_NAME 32
1053struct netxen_brdinfo { 1083struct netxen_brdinfo {
1054 netxen_brdtype_t brdtype; /* type of board */ 1084 netxen_brdtype_t brdtype; /* type of board */
1055 long ports; /* max no of physical ports */ 1085 long ports; /* max no of physical ports */
@@ -1063,6 +1093,17 @@ static const struct netxen_brdinfo netxen_boards[] = {
1063 {NETXEN_BRDTYPE_P2_SB31_10G, 1, "XGb XFP"}, 1093 {NETXEN_BRDTYPE_P2_SB31_10G, 1, "XGb XFP"},
1064 {NETXEN_BRDTYPE_P2_SB35_4G, 4, "Quad Gb"}, 1094 {NETXEN_BRDTYPE_P2_SB35_4G, 4, "Quad Gb"},
1065 {NETXEN_BRDTYPE_P2_SB31_2G, 2, "Dual Gb"}, 1095 {NETXEN_BRDTYPE_P2_SB31_2G, 2, "Dual Gb"},
1096 {NETXEN_BRDTYPE_P3_REF_QG, 4, "Reference Quad Gig "},
1097 {NETXEN_BRDTYPE_P3_HMEZ, 2, "Dual XGb HMEZ"},
1098 {NETXEN_BRDTYPE_P3_10G_CX4_LP, 2, "Dual XGb CX4 LP"},
1099 {NETXEN_BRDTYPE_P3_4_GB, 4, "Quad Gig LP"},
1100 {NETXEN_BRDTYPE_P3_IMEZ, 2, "Dual XGb IMEZ"},
1101 {NETXEN_BRDTYPE_P3_10G_SFP_PLUS, 2, "Dual XGb SFP+ LP"},
1102 {NETXEN_BRDTYPE_P3_10000_BASE_T, 1, "XGB 10G BaseT LP"},
1103 {NETXEN_BRDTYPE_P3_XG_LOM, 2, "Dual XGb LOM"},
1104 {NETXEN_BRDTYPE_P3_4_GB_MM, 4, "Quad GB - March Madness"},
1105 {NETXEN_BRDTYPE_P3_10G_CX4, 2, "Reference Dual CX4 Option"},
1106 {NETXEN_BRDTYPE_P3_10G_XFP, 1, "Reference Single XFP Option"}
1066}; 1107};
1067 1108
1068#define NUM_SUPPORTED_BOARDS ARRAY_SIZE(netxen_boards) 1109#define NUM_SUPPORTED_BOARDS ARRAY_SIZE(netxen_boards)