diff options
author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2008-06-27 13:59:59 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-07-04 08:46:58 -0400 |
commit | 733596bea6ba7ea7949720b86794eda4e1b793d1 (patch) | |
tree | efec5e12ca2e1923ce04c468aee2fab1770179e6 /drivers/net/igb/e1000_phy.c | |
parent | 3b644cf6cef0324c595b86181220901b5bed0b99 (diff) |
igb: cleanup function header comments
Function header comments do not match function name.
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/igb/e1000_phy.c')
-rw-r--r-- | drivers/net/igb/e1000_phy.c | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/drivers/net/igb/e1000_phy.c b/drivers/net/igb/e1000_phy.c index 08a86b10722..220e4716da9 100644 --- a/drivers/net/igb/e1000_phy.c +++ b/drivers/net/igb/e1000_phy.c | |||
@@ -61,7 +61,7 @@ static const u16 e1000_igp_2_cable_length_table[] = | |||
61 | sizeof(e1000_igp_2_cable_length_table[0])) | 61 | sizeof(e1000_igp_2_cable_length_table[0])) |
62 | 62 | ||
63 | /** | 63 | /** |
64 | * e1000_check_reset_block - Check if PHY reset is blocked | 64 | * igb_check_reset_block - Check if PHY reset is blocked |
65 | * @hw: pointer to the HW structure | 65 | * @hw: pointer to the HW structure |
66 | * | 66 | * |
67 | * Read the PHY management control register and check whether a PHY reset | 67 | * Read the PHY management control register and check whether a PHY reset |
@@ -79,7 +79,7 @@ s32 igb_check_reset_block(struct e1000_hw *hw) | |||
79 | } | 79 | } |
80 | 80 | ||
81 | /** | 81 | /** |
82 | * e1000_get_phy_id - Retrieve the PHY ID and revision | 82 | * igb_get_phy_id - Retrieve the PHY ID and revision |
83 | * @hw: pointer to the HW structure | 83 | * @hw: pointer to the HW structure |
84 | * | 84 | * |
85 | * Reads the PHY registers and stores the PHY ID and possibly the PHY | 85 | * Reads the PHY registers and stores the PHY ID and possibly the PHY |
@@ -109,7 +109,7 @@ out: | |||
109 | } | 109 | } |
110 | 110 | ||
111 | /** | 111 | /** |
112 | * e1000_phy_reset_dsp - Reset PHY DSP | 112 | * igb_phy_reset_dsp - Reset PHY DSP |
113 | * @hw: pointer to the HW structure | 113 | * @hw: pointer to the HW structure |
114 | * | 114 | * |
115 | * Reset the digital signal processor. | 115 | * Reset the digital signal processor. |
@@ -129,7 +129,7 @@ out: | |||
129 | } | 129 | } |
130 | 130 | ||
131 | /** | 131 | /** |
132 | * e1000_read_phy_reg_mdic - Read MDI control register | 132 | * igb_read_phy_reg_mdic - Read MDI control register |
133 | * @hw: pointer to the HW structure | 133 | * @hw: pointer to the HW structure |
134 | * @offset: register offset to be read | 134 | * @offset: register offset to be read |
135 | * @data: pointer to the read data | 135 | * @data: pointer to the read data |
@@ -188,7 +188,7 @@ out: | |||
188 | } | 188 | } |
189 | 189 | ||
190 | /** | 190 | /** |
191 | * e1000_write_phy_reg_mdic - Write MDI control register | 191 | * igb_write_phy_reg_mdic - Write MDI control register |
192 | * @hw: pointer to the HW structure | 192 | * @hw: pointer to the HW structure |
193 | * @offset: register offset to write to | 193 | * @offset: register offset to write to |
194 | * @data: data to write to register at offset | 194 | * @data: data to write to register at offset |
@@ -246,7 +246,7 @@ out: | |||
246 | } | 246 | } |
247 | 247 | ||
248 | /** | 248 | /** |
249 | * e1000_read_phy_reg_igp - Read igp PHY register | 249 | * igb_read_phy_reg_igp - Read igp PHY register |
250 | * @hw: pointer to the HW structure | 250 | * @hw: pointer to the HW structure |
251 | * @offset: register offset to be read | 251 | * @offset: register offset to be read |
252 | * @data: pointer to the read data | 252 | * @data: pointer to the read data |
@@ -284,7 +284,7 @@ out: | |||
284 | } | 284 | } |
285 | 285 | ||
286 | /** | 286 | /** |
287 | * e1000_write_phy_reg_igp - Write igp PHY register | 287 | * igb_write_phy_reg_igp - Write igp PHY register |
288 | * @hw: pointer to the HW structure | 288 | * @hw: pointer to the HW structure |
289 | * @offset: register offset to write to | 289 | * @offset: register offset to write to |
290 | * @data: data to write at register offset | 290 | * @data: data to write at register offset |
@@ -321,7 +321,7 @@ out: | |||
321 | } | 321 | } |
322 | 322 | ||
323 | /** | 323 | /** |
324 | * e1000_copper_link_setup_m88 - Setup m88 PHY's for copper link | 324 | * igb_copper_link_setup_m88 - Setup m88 PHY's for copper link |
325 | * @hw: pointer to the HW structure | 325 | * @hw: pointer to the HW structure |
326 | * | 326 | * |
327 | * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock | 327 | * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock |
@@ -432,7 +432,7 @@ out: | |||
432 | } | 432 | } |
433 | 433 | ||
434 | /** | 434 | /** |
435 | * e1000_copper_link_setup_igp - Setup igp PHY's for copper link | 435 | * igb_copper_link_setup_igp - Setup igp PHY's for copper link |
436 | * @hw: pointer to the HW structure | 436 | * @hw: pointer to the HW structure |
437 | * | 437 | * |
438 | * Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for | 438 | * Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for |
@@ -570,7 +570,7 @@ out: | |||
570 | } | 570 | } |
571 | 571 | ||
572 | /** | 572 | /** |
573 | * e1000_copper_link_autoneg - Setup/Enable autoneg for copper link | 573 | * igb_copper_link_autoneg - Setup/Enable autoneg for copper link |
574 | * @hw: pointer to the HW structure | 574 | * @hw: pointer to the HW structure |
575 | * | 575 | * |
576 | * Performs initial bounds checking on autoneg advertisement parameter, then | 576 | * Performs initial bounds checking on autoneg advertisement parameter, then |
@@ -638,7 +638,7 @@ out: | |||
638 | } | 638 | } |
639 | 639 | ||
640 | /** | 640 | /** |
641 | * e1000_phy_setup_autoneg - Configure PHY for auto-negotiation | 641 | * igb_phy_setup_autoneg - Configure PHY for auto-negotiation |
642 | * @hw: pointer to the HW structure | 642 | * @hw: pointer to the HW structure |
643 | * | 643 | * |
644 | * Reads the MII auto-neg advertisement register and/or the 1000T control | 644 | * Reads the MII auto-neg advertisement register and/or the 1000T control |
@@ -805,7 +805,7 @@ out: | |||
805 | } | 805 | } |
806 | 806 | ||
807 | /** | 807 | /** |
808 | * e1000_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY | 808 | * igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY |
809 | * @hw: pointer to the HW structure | 809 | * @hw: pointer to the HW structure |
810 | * | 810 | * |
811 | * Calls the PHY setup function to force speed and duplex. Clears the | 811 | * Calls the PHY setup function to force speed and duplex. Clears the |
@@ -878,7 +878,7 @@ out: | |||
878 | } | 878 | } |
879 | 879 | ||
880 | /** | 880 | /** |
881 | * e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY | 881 | * igb_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY |
882 | * @hw: pointer to the HW structure | 882 | * @hw: pointer to the HW structure |
883 | * | 883 | * |
884 | * Calls the PHY setup function to force speed and duplex. Clears the | 884 | * Calls the PHY setup function to force speed and duplex. Clears the |
@@ -993,7 +993,7 @@ out: | |||
993 | } | 993 | } |
994 | 994 | ||
995 | /** | 995 | /** |
996 | * e1000_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex | 996 | * igb_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex |
997 | * @hw: pointer to the HW structure | 997 | * @hw: pointer to the HW structure |
998 | * @phy_ctrl: pointer to current value of PHY_CONTROL | 998 | * @phy_ctrl: pointer to current value of PHY_CONTROL |
999 | * | 999 | * |
@@ -1054,7 +1054,7 @@ static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, | |||
1054 | } | 1054 | } |
1055 | 1055 | ||
1056 | /** | 1056 | /** |
1057 | * e1000_set_d3_lplu_state - Sets low power link up state for D3 | 1057 | * igb_set_d3_lplu_state - Sets low power link up state for D3 |
1058 | * @hw: pointer to the HW structure | 1058 | * @hw: pointer to the HW structure |
1059 | * @active: boolean used to enable/disable lplu | 1059 | * @active: boolean used to enable/disable lplu |
1060 | * | 1060 | * |
@@ -1146,7 +1146,7 @@ out: | |||
1146 | } | 1146 | } |
1147 | 1147 | ||
1148 | /** | 1148 | /** |
1149 | * e1000_check_downshift - Checks whether a downshift in speed occured | 1149 | * igb_check_downshift - Checks whether a downshift in speed occured |
1150 | * @hw: pointer to the HW structure | 1150 | * @hw: pointer to the HW structure |
1151 | * | 1151 | * |
1152 | * Success returns 0, Failure returns 1 | 1152 | * Success returns 0, Failure returns 1 |
@@ -1188,7 +1188,7 @@ out: | |||
1188 | } | 1188 | } |
1189 | 1189 | ||
1190 | /** | 1190 | /** |
1191 | * e1000_check_polarity_m88 - Checks the polarity. | 1191 | * igb_check_polarity_m88 - Checks the polarity. |
1192 | * @hw: pointer to the HW structure | 1192 | * @hw: pointer to the HW structure |
1193 | * | 1193 | * |
1194 | * Success returns 0, Failure returns -E1000_ERR_PHY (-2) | 1194 | * Success returns 0, Failure returns -E1000_ERR_PHY (-2) |
@@ -1212,7 +1212,7 @@ static s32 igb_check_polarity_m88(struct e1000_hw *hw) | |||
1212 | } | 1212 | } |
1213 | 1213 | ||
1214 | /** | 1214 | /** |
1215 | * e1000_check_polarity_igp - Checks the polarity. | 1215 | * igb_check_polarity_igp - Checks the polarity. |
1216 | * @hw: pointer to the HW structure | 1216 | * @hw: pointer to the HW structure |
1217 | * | 1217 | * |
1218 | * Success returns 0, Failure returns -E1000_ERR_PHY (-2) | 1218 | * Success returns 0, Failure returns -E1000_ERR_PHY (-2) |
@@ -1260,7 +1260,7 @@ out: | |||
1260 | } | 1260 | } |
1261 | 1261 | ||
1262 | /** | 1262 | /** |
1263 | * e1000_wait_autoneg - Wait for auto-neg compeletion | 1263 | * igb_wait_autoneg - Wait for auto-neg compeletion |
1264 | * @hw: pointer to the HW structure | 1264 | * @hw: pointer to the HW structure |
1265 | * | 1265 | * |
1266 | * Waits for auto-negotiation to complete or for the auto-negotiation time | 1266 | * Waits for auto-negotiation to complete or for the auto-negotiation time |
@@ -1292,7 +1292,7 @@ static s32 igb_wait_autoneg(struct e1000_hw *hw) | |||
1292 | } | 1292 | } |
1293 | 1293 | ||
1294 | /** | 1294 | /** |
1295 | * e1000_phy_has_link - Polls PHY for link | 1295 | * igb_phy_has_link - Polls PHY for link |
1296 | * @hw: pointer to the HW structure | 1296 | * @hw: pointer to the HW structure |
1297 | * @iterations: number of times to poll for link | 1297 | * @iterations: number of times to poll for link |
1298 | * @usec_interval: delay between polling attempts | 1298 | * @usec_interval: delay between polling attempts |
@@ -1332,7 +1332,7 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations, | |||
1332 | } | 1332 | } |
1333 | 1333 | ||
1334 | /** | 1334 | /** |
1335 | * e1000_get_cable_length_m88 - Determine cable length for m88 PHY | 1335 | * igb_get_cable_length_m88 - Determine cable length for m88 PHY |
1336 | * @hw: pointer to the HW structure | 1336 | * @hw: pointer to the HW structure |
1337 | * | 1337 | * |
1338 | * Reads the PHY specific status register to retrieve the cable length | 1338 | * Reads the PHY specific status register to retrieve the cable length |
@@ -1369,7 +1369,7 @@ out: | |||
1369 | } | 1369 | } |
1370 | 1370 | ||
1371 | /** | 1371 | /** |
1372 | * e1000_get_cable_length_igp_2 - Determine cable length for igp2 PHY | 1372 | * igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY |
1373 | * @hw: pointer to the HW structure | 1373 | * @hw: pointer to the HW structure |
1374 | * | 1374 | * |
1375 | * The automatic gain control (agc) normalizes the amplitude of the | 1375 | * The automatic gain control (agc) normalizes the amplitude of the |
@@ -1442,7 +1442,7 @@ out: | |||
1442 | } | 1442 | } |
1443 | 1443 | ||
1444 | /** | 1444 | /** |
1445 | * e1000_get_phy_info_m88 - Retrieve PHY information | 1445 | * igb_get_phy_info_m88 - Retrieve PHY information |
1446 | * @hw: pointer to the HW structure | 1446 | * @hw: pointer to the HW structure |
1447 | * | 1447 | * |
1448 | * Valid for only copper links. Read the PHY status register (sticky read) | 1448 | * Valid for only copper links. Read the PHY status register (sticky read) |
@@ -1523,7 +1523,7 @@ out: | |||
1523 | } | 1523 | } |
1524 | 1524 | ||
1525 | /** | 1525 | /** |
1526 | * e1000_get_phy_info_igp - Retrieve igp PHY information | 1526 | * igb_get_phy_info_igp - Retrieve igp PHY information |
1527 | * @hw: pointer to the HW structure | 1527 | * @hw: pointer to the HW structure |
1528 | * | 1528 | * |
1529 | * Read PHY status to determine if link is up. If link is up, then | 1529 | * Read PHY status to determine if link is up. If link is up, then |
@@ -1590,7 +1590,7 @@ out: | |||
1590 | } | 1590 | } |
1591 | 1591 | ||
1592 | /** | 1592 | /** |
1593 | * e1000_phy_sw_reset - PHY software reset | 1593 | * igb_phy_sw_reset - PHY software reset |
1594 | * @hw: pointer to the HW structure | 1594 | * @hw: pointer to the HW structure |
1595 | * | 1595 | * |
1596 | * Does a software reset of the PHY by reading the PHY control register and | 1596 | * Does a software reset of the PHY by reading the PHY control register and |
@@ -1617,7 +1617,7 @@ out: | |||
1617 | } | 1617 | } |
1618 | 1618 | ||
1619 | /** | 1619 | /** |
1620 | * e1000_phy_hw_reset - PHY hardware reset | 1620 | * igb_phy_hw_reset - PHY hardware reset |
1621 | * @hw: pointer to the HW structure | 1621 | * @hw: pointer to the HW structure |
1622 | * | 1622 | * |
1623 | * Verify the reset block is not blocking us from resetting. Acquire | 1623 | * Verify the reset block is not blocking us from resetting. Acquire |
@@ -1663,7 +1663,7 @@ out: | |||
1663 | /* Internal function pointers */ | 1663 | /* Internal function pointers */ |
1664 | 1664 | ||
1665 | /** | 1665 | /** |
1666 | * e1000_get_phy_cfg_done - Generic PHY configuration done | 1666 | * igb_get_phy_cfg_done - Generic PHY configuration done |
1667 | * @hw: pointer to the HW structure | 1667 | * @hw: pointer to the HW structure |
1668 | * | 1668 | * |
1669 | * Return success if silicon family did not implement a family specific | 1669 | * Return success if silicon family did not implement a family specific |
@@ -1678,7 +1678,7 @@ static s32 igb_get_phy_cfg_done(struct e1000_hw *hw) | |||
1678 | } | 1678 | } |
1679 | 1679 | ||
1680 | /** | 1680 | /** |
1681 | * e1000_release_phy - Generic release PHY | 1681 | * igb_release_phy - Generic release PHY |
1682 | * @hw: pointer to the HW structure | 1682 | * @hw: pointer to the HW structure |
1683 | * | 1683 | * |
1684 | * Return if silicon family does not require a semaphore when accessing the | 1684 | * Return if silicon family does not require a semaphore when accessing the |
@@ -1691,7 +1691,7 @@ static void igb_release_phy(struct e1000_hw *hw) | |||
1691 | } | 1691 | } |
1692 | 1692 | ||
1693 | /** | 1693 | /** |
1694 | * e1000_acquire_phy - Generic acquire PHY | 1694 | * igb_acquire_phy - Generic acquire PHY |
1695 | * @hw: pointer to the HW structure | 1695 | * @hw: pointer to the HW structure |
1696 | * | 1696 | * |
1697 | * Return success if silicon family does not require a semaphore when | 1697 | * Return success if silicon family does not require a semaphore when |
@@ -1706,7 +1706,7 @@ static s32 igb_acquire_phy(struct e1000_hw *hw) | |||
1706 | } | 1706 | } |
1707 | 1707 | ||
1708 | /** | 1708 | /** |
1709 | * e1000_phy_force_speed_duplex - Generic force PHY speed/duplex | 1709 | * igb_phy_force_speed_duplex - Generic force PHY speed/duplex |
1710 | * @hw: pointer to the HW structure | 1710 | * @hw: pointer to the HW structure |
1711 | * | 1711 | * |
1712 | * When the silicon family has not implemented a forced speed/duplex | 1712 | * When the silicon family has not implemented a forced speed/duplex |
@@ -1721,7 +1721,7 @@ s32 igb_phy_force_speed_duplex(struct e1000_hw *hw) | |||
1721 | } | 1721 | } |
1722 | 1722 | ||
1723 | /** | 1723 | /** |
1724 | * e1000_phy_init_script_igp3 - Inits the IGP3 PHY | 1724 | * igb_phy_init_script_igp3 - Inits the IGP3 PHY |
1725 | * @hw: pointer to the HW structure | 1725 | * @hw: pointer to the HW structure |
1726 | * | 1726 | * |
1727 | * Initializes a Intel Gigabit PHY3 when an EEPROM is not present. | 1727 | * Initializes a Intel Gigabit PHY3 when an EEPROM is not present. |