diff options
author | Joseph Gasparakis <joseph.gasparakis@intel.com> | 2010-09-22 13:56:44 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-09-23 00:20:04 -0400 |
commit | 308fb39a860c816be8741fe783ae7c64e9c1af5d (patch) | |
tree | 8fabed4b3372c49b4d83dc1d0b72d4abf60f139e /drivers/net/igb/e1000_defines.h | |
parent | d85b9004bc2047d79248b167cc151ff9a4b509c3 (diff) |
igb: Add support for DH89xxCC
This patch adds support for the Intel(r) DH89xxCC series. The new
device will be using Intel(r) i347-AT4 and Marvell(r) M88E1322 and
M88E1112 PHYs. Support for these devices has also been added here.
Signed-off-by: Joseph Gasparakis <joseph.gasparakis@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb/e1000_defines.h')
-rw-r--r-- | drivers/net/igb/e1000_defines.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index bbd2ec308eb..62222796a8b 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
@@ -634,6 +634,8 @@ | |||
634 | * E = External | 634 | * E = External |
635 | */ | 635 | */ |
636 | #define M88E1111_I_PHY_ID 0x01410CC0 | 636 | #define M88E1111_I_PHY_ID 0x01410CC0 |
637 | #define M88E1112_E_PHY_ID 0x01410C90 | ||
638 | #define I347AT4_E_PHY_ID 0x01410DC0 | ||
637 | #define IGP03E1000_E_PHY_ID 0x02A80390 | 639 | #define IGP03E1000_E_PHY_ID 0x02A80390 |
638 | #define I82580_I_PHY_ID 0x015403A0 | 640 | #define I82580_I_PHY_ID 0x015403A0 |
639 | #define I350_I_PHY_ID 0x015403B0 | 641 | #define I350_I_PHY_ID 0x015403B0 |
@@ -702,6 +704,35 @@ | |||
702 | #define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X 0x0100 | 704 | #define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X 0x0100 |
703 | #define M88E1000_EPSCR_TX_CLK_25 0x0070 /* 25 MHz TX_CLK */ | 705 | #define M88E1000_EPSCR_TX_CLK_25 0x0070 /* 25 MHz TX_CLK */ |
704 | 706 | ||
707 | /* Intel i347-AT4 Registers */ | ||
708 | |||
709 | #define I347AT4_PCDL 0x10 /* PHY Cable Diagnostics Length */ | ||
710 | #define I347AT4_PCDC 0x15 /* PHY Cable Diagnostics Control */ | ||
711 | #define I347AT4_PAGE_SELECT 0x16 | ||
712 | |||
713 | /* i347-AT4 Extended PHY Specific Control Register */ | ||
714 | |||
715 | /* | ||
716 | * Number of times we will attempt to autonegotiate before downshifting if we | ||
717 | * are the master | ||
718 | */ | ||
719 | #define I347AT4_PSCR_DOWNSHIFT_ENABLE 0x0800 | ||
720 | #define I347AT4_PSCR_DOWNSHIFT_MASK 0x7000 | ||
721 | #define I347AT4_PSCR_DOWNSHIFT_1X 0x0000 | ||
722 | #define I347AT4_PSCR_DOWNSHIFT_2X 0x1000 | ||
723 | #define I347AT4_PSCR_DOWNSHIFT_3X 0x2000 | ||
724 | #define I347AT4_PSCR_DOWNSHIFT_4X 0x3000 | ||
725 | #define I347AT4_PSCR_DOWNSHIFT_5X 0x4000 | ||
726 | #define I347AT4_PSCR_DOWNSHIFT_6X 0x5000 | ||
727 | #define I347AT4_PSCR_DOWNSHIFT_7X 0x6000 | ||
728 | #define I347AT4_PSCR_DOWNSHIFT_8X 0x7000 | ||
729 | |||
730 | /* i347-AT4 PHY Cable Diagnostics Control */ | ||
731 | #define I347AT4_PCDC_CABLE_LENGTH_UNIT 0x0400 /* 0=cm 1=meters */ | ||
732 | |||
733 | /* Marvell 1112 only registers */ | ||
734 | #define M88E1112_VCT_DSP_DISTANCE 0x001A | ||
735 | |||
705 | /* M88EC018 Rev 2 specific DownShift settings */ | 736 | /* M88EC018 Rev 2 specific DownShift settings */ |
706 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 | 737 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 |
707 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 | 738 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 |