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authorJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-09-04 00:03:45 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-09-30 09:23:04 -0400
commitec4f9945b5b3e9e491a04eb1efe1c959371fa6de (patch)
treeaf711173c68d0939ba85e581c63f83a4599f02ce /drivers/net/ibm_newemac/mal.h
parentb68d185ab12b1fc8000432c5d5ab5404d4788b4c (diff)
ibm_newemac: Introduce mal_has_feature
There are some PowerPC SoCs that do odd things with the MAL handling. In order to accommodate them, we need to introduce a feature mechanism that is similar to the existing emac_has_feature function. This adds a feature variable to the mal_instance structure, and adds a mal_has_feature function. Two features are defined and are guarded by Kconfig options that are selected by the affected platforms. MAL_FTR_CLEAR_ICINSTAT is used for platforms that need to clear the interrupt bits in the ICINTSTAT SDR for txeob/rxeob. This is common on MAL implementations that have interrupt coalescing. MAL_FTR_COMMON_ERR_INT is used for platforms that have SERR, TXDE, and RXDE OR'd into a single interrupt bit. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'drivers/net/ibm_newemac/mal.h')
-rw-r--r--drivers/net/ibm_newemac/mal.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/ibm_newemac/mal.h b/drivers/net/ibm_newemac/mal.h
index eaa7262dc07..0b2413839b7 100644
--- a/drivers/net/ibm_newemac/mal.h
+++ b/drivers/net/ibm_newemac/mal.h
@@ -213,6 +213,8 @@ struct mal_instance {
213 struct of_device *ofdev; 213 struct of_device *ofdev;
214 int index; 214 int index;
215 spinlock_t lock; 215 spinlock_t lock;
216
217 unsigned int features;
216}; 218};
217 219
218static inline u32 get_mal_dcrn(struct mal_instance *mal, int reg) 220static inline u32 get_mal_dcrn(struct mal_instance *mal, int reg)
@@ -225,6 +227,38 @@ static inline void set_mal_dcrn(struct mal_instance *mal, int reg, u32 val)
225 dcr_write(mal->dcr_host, reg, val); 227 dcr_write(mal->dcr_host, reg, val);
226} 228}
227 229
230/* Features of various MAL implementations */
231
232/* Set if you have interrupt coalescing and you have to clear the SDR
233 * register for TXEOB and RXEOB interrupts to work
234 */
235#define MAL_FTR_CLEAR_ICINTSTAT 0x00000001
236
237/* Set if your MAL has SERR, TXDE, and RXDE OR'd into a single UIC
238 * interrupt
239 */
240#define MAL_FTR_COMMON_ERR_INT 0x00000002
241
242enum {
243 MAL_FTRS_ALWAYS = 0,
244
245 MAL_FTRS_POSSIBLE =
246#ifdef CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT
247 MAL_FTR_CLEAR_ICINTSTAT |
248#endif
249#ifdef CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR
250 MAL_FTR_COMMON_ERR_INT |
251#endif
252 0,
253};
254
255static inline int mal_has_feature(struct mal_instance *dev,
256 unsigned long feature)
257{
258 return (MAL_FTRS_ALWAYS & feature) ||
259 (MAL_FTRS_POSSIBLE & dev->features & feature);
260}
261
228/* Register MAL devices */ 262/* Register MAL devices */
229int mal_init(void); 263int mal_init(void);
230void mal_exit(void); 264void mal_exit(void);