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authorJeff Garzik <jeff@garzik.org>2006-09-13 13:24:59 -0400
committerJeff Garzik <jeff@garzik.org>2006-09-13 13:24:59 -0400
commit6aa20a2235535605db6d6d2bd850298b2fe7f31e (patch)
treedf0b855043407b831d57f2f2c271f8aab48444f4 /drivers/net/defxx.h
parent7a291083225af6e22ffaa46b3d91cfc1a1ccaab4 (diff)
drivers/net: Trim trailing whitespace
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/defxx.h')
-rw-r--r--drivers/net/defxx.h192
1 files changed, 96 insertions, 96 deletions
diff --git a/drivers/net/defxx.h b/drivers/net/defxx.h
index a480b80d2f9..8b1e9a11ca2 100644
--- a/drivers/net/defxx.h
+++ b/drivers/net/defxx.h
@@ -45,7 +45,7 @@ typedef struct /* 64-bit counter */
45 } PI_CNTR; 45 } PI_CNTR;
46 46
47typedef struct /* LAN address */ 47typedef struct /* LAN address */
48 { 48 {
49 PI_UINT32 lwrd_0; 49 PI_UINT32 lwrd_0;
50 PI_UINT32 lwrd_1; 50 PI_UINT32 lwrd_1;
51 } PI_LAN_ADDR; 51 } PI_LAN_ADDR;
@@ -146,7 +146,7 @@ typedef struct /* Station ID address */
146#define PI_STATE_K_LINK_UNAVAIL 5 146#define PI_STATE_K_LINK_UNAVAIL 5
147#define PI_STATE_K_HALTED 6 147#define PI_STATE_K_HALTED 6
148#define PI_STATE_K_RING_MEMBER 7 148#define PI_STATE_K_RING_MEMBER 7
149#define PI_STATE_K_NUMBER 8 149#define PI_STATE_K_NUMBER 8
150 150
151/* Define codes for command type */ 151/* Define codes for command type */
152 152
@@ -175,9 +175,9 @@ typedef struct /* Station ID address */
175#define PI_ITEM_K_EOL 0x00 /* End-of-Item list */ 175#define PI_ITEM_K_EOL 0x00 /* End-of-Item list */
176#define PI_ITEM_K_T_REQ 0x01 /* DECnet T_REQ */ 176#define PI_ITEM_K_T_REQ 0x01 /* DECnet T_REQ */
177#define PI_ITEM_K_TVX 0x02 /* DECnet TVX */ 177#define PI_ITEM_K_TVX 0x02 /* DECnet TVX */
178#define PI_ITEM_K_RESTRICTED_TOKEN 0x03 /* DECnet Restricted Token */ 178#define PI_ITEM_K_RESTRICTED_TOKEN 0x03 /* DECnet Restricted Token */
179#define PI_ITEM_K_LEM_THRESHOLD 0x04 /* DECnet LEM Threshold */ 179#define PI_ITEM_K_LEM_THRESHOLD 0x04 /* DECnet LEM Threshold */
180#define PI_ITEM_K_RING_PURGER 0x05 /* DECnet Ring Purger Enable */ 180#define PI_ITEM_K_RING_PURGER 0x05 /* DECnet Ring Purger Enable */
181#define PI_ITEM_K_CNTR_INTERVAL 0x06 /* Chars_Set */ 181#define PI_ITEM_K_CNTR_INTERVAL 0x06 /* Chars_Set */
182#define PI_ITEM_K_IND_GROUP_PROM 0x07 /* Filters_Set */ 182#define PI_ITEM_K_IND_GROUP_PROM 0x07 /* Filters_Set */
183#define PI_ITEM_K_GROUP_PROM 0x08 /* Filters_Set */ 183#define PI_ITEM_K_GROUP_PROM 0x08 /* Filters_Set */
@@ -283,16 +283,16 @@ typedef struct
283 283
284/* Start Response */ 284/* Start Response */
285 285
286typedef struct 286typedef struct
287 { 287 {
288 PI_RSP_HEADER header; 288 PI_RSP_HEADER header;
289 } PI_CMD_START_RSP; 289 } PI_CMD_START_RSP;
290 290
291/* Filters_Set Request */ 291/* Filters_Set Request */
292 292
293#define PI_CMD_FILTERS_SET_K_ITEMS_MAX 63 /* Fits in a 512 byte buffer */ 293#define PI_CMD_FILTERS_SET_K_ITEMS_MAX 63 /* Fits in a 512 byte buffer */
294 294
295typedef struct 295typedef struct
296 { 296 {
297 PI_UINT32 cmd_type; 297 PI_UINT32 cmd_type;
298 PI_ITEM_LIST item[PI_CMD_FILTERS_SET_K_ITEMS_MAX]; 298 PI_ITEM_LIST item[PI_CMD_FILTERS_SET_K_ITEMS_MAX];
@@ -302,21 +302,21 @@ typedef struct
302 302
303typedef struct 303typedef struct
304 { 304 {
305 PI_RSP_HEADER header; 305 PI_RSP_HEADER header;
306 } PI_CMD_FILTERS_SET_RSP; 306 } PI_CMD_FILTERS_SET_RSP;
307 307
308/* Filters_Get Request */ 308/* Filters_Get Request */
309 309
310typedef struct 310typedef struct
311 { 311 {
312 PI_UINT32 cmd_type; 312 PI_UINT32 cmd_type;
313 } PI_CMD_FILTERS_GET_REQ; 313 } PI_CMD_FILTERS_GET_REQ;
314 314
315/* Filters_Get Response */ 315/* Filters_Get Response */
316 316
317typedef struct 317typedef struct
318 { 318 {
319 PI_RSP_HEADER header; 319 PI_RSP_HEADER header;
320 PI_UINT32 ind_group_prom; 320 PI_UINT32 ind_group_prom;
321 PI_UINT32 group_prom; 321 PI_UINT32 group_prom;
322 PI_UINT32 broadcast_all; 322 PI_UINT32 broadcast_all;
@@ -339,14 +339,14 @@ typedef struct
339 PI_UINT32 item_code; 339 PI_UINT32 item_code;
340 PI_UINT32 value; 340 PI_UINT32 value;
341 PI_UINT32 item_index; 341 PI_UINT32 item_index;
342 } item[PI_CMD_CHARS_SET_K_ITEMS_MAX]; 342 } item[PI_CMD_CHARS_SET_K_ITEMS_MAX];
343 } PI_CMD_CHARS_SET_REQ; 343 } PI_CMD_CHARS_SET_REQ;
344 344
345/* Chars_Set Response */ 345/* Chars_Set Response */
346 346
347typedef struct 347typedef struct
348 { 348 {
349 PI_RSP_HEADER header; 349 PI_RSP_HEADER header;
350 } PI_CMD_CHARS_SET_RSP; 350 } PI_CMD_CHARS_SET_RSP;
351 351
352 352
@@ -362,20 +362,20 @@ typedef struct
362 PI_UINT32 item_code; 362 PI_UINT32 item_code;
363 PI_UINT32 value; 363 PI_UINT32 value;
364 PI_UINT32 item_index; 364 PI_UINT32 item_index;
365 } item[PI_CMD_SNMP_SET_K_ITEMS_MAX]; 365 } item[PI_CMD_SNMP_SET_K_ITEMS_MAX];
366 } PI_CMD_SNMP_SET_REQ; 366 } PI_CMD_SNMP_SET_REQ;
367 367
368/* SNMP_Set Response */ 368/* SNMP_Set Response */
369 369
370typedef struct 370typedef struct
371 { 371 {
372 PI_RSP_HEADER header; 372 PI_RSP_HEADER header;
373 } PI_CMD_SNMP_SET_RSP; 373 } PI_CMD_SNMP_SET_RSP;
374 374
375 375
376/* SMT_MIB_Set Request */ 376/* SMT_MIB_Set Request */
377 377
378#define PI_CMD_SMT_MIB_SET_K_ITEMS_MAX 42 /* Max number of items */ 378#define PI_CMD_SMT_MIB_SET_K_ITEMS_MAX 42 /* Max number of items */
379 379
380typedef struct 380typedef struct
381 { 381 {
@@ -392,7 +392,7 @@ typedef struct
392 392
393typedef struct 393typedef struct
394 { 394 {
395 PI_RSP_HEADER header; 395 PI_RSP_HEADER header;
396 } PI_CMD_SMT_MIB_SET_RSP; 396 } PI_CMD_SMT_MIB_SET_RSP;
397 397
398/* SMT_MIB_Get Request */ 398/* SMT_MIB_Get Request */
@@ -407,8 +407,8 @@ typedef struct
407typedef struct /* Refer to ANSI FDDI SMT Rev. 7.3 */ 407typedef struct /* Refer to ANSI FDDI SMT Rev. 7.3 */
408 { 408 {
409 PI_RSP_HEADER header; 409 PI_RSP_HEADER header;
410 410
411 /* SMT GROUP */ 411 /* SMT GROUP */
412 412
413 PI_STATION_ID smt_station_id; 413 PI_STATION_ID smt_station_id;
414 PI_UINT32 smt_op_version_id; 414 PI_UINT32 smt_op_version_id;
@@ -485,7 +485,7 @@ typedef struct /* Refer to ANSI FDDI SMT Rev. 7.3 */
485 PI_UINT32 port_connection_capabilities[PI_PHY_K_MAX]; 485 PI_UINT32 port_connection_capabilities[PI_PHY_K_MAX];
486 PI_UINT32 port_bs_flag[PI_PHY_K_MAX]; 486 PI_UINT32 port_bs_flag[PI_PHY_K_MAX];
487 PI_UINT32 port_ler_estimate[PI_PHY_K_MAX]; 487 PI_UINT32 port_ler_estimate[PI_PHY_K_MAX];
488 PI_UINT32 port_ler_cutoff[PI_PHY_K_MAX]; 488 PI_UINT32 port_ler_cutoff[PI_PHY_K_MAX];
489 PI_UINT32 port_ler_alarm[PI_PHY_K_MAX]; 489 PI_UINT32 port_ler_alarm[PI_PHY_K_MAX];
490 PI_UINT32 port_connect_state[PI_PHY_K_MAX]; 490 PI_UINT32 port_connect_state[PI_PHY_K_MAX];
491 PI_UINT32 port_pcm_state[PI_PHY_K_MAX]; 491 PI_UINT32 port_pcm_state[PI_PHY_K_MAX];
@@ -497,7 +497,7 @@ typedef struct /* Refer to ANSI FDDI SMT Rev. 7.3 */
497 497
498 PI_CNTR path_ring_latency; 498 PI_CNTR path_ring_latency;
499 499
500 } PI_CMD_SMT_MIB_GET_RSP; 500 } PI_CMD_SMT_MIB_GET_RSP;
501 501
502 502
503/* 503/*
@@ -506,7 +506,7 @@ typedef struct /* Refer to ANSI FDDI SMT Rev. 7.3 */
506 * certain host-sent SMT frames such as PMF Get and Set requests. The 506 * certain host-sent SMT frames such as PMF Get and Set requests. The
507 * codes have been taken from the MIB summary section of ANSI SMT 7.3. 507 * codes have been taken from the MIB summary section of ANSI SMT 7.3.
508 */ 508 */
509 509
510#define PI_GRP_K_SMT_STATION_ID 0x100A 510#define PI_GRP_K_SMT_STATION_ID 0x100A
511#define PI_ITEM_K_SMT_STATION_ID 0x100B 511#define PI_ITEM_K_SMT_STATION_ID 0x100B
512#define PI_ITEM_K_SMT_OP_VERS_ID 0x100D 512#define PI_ITEM_K_SMT_OP_VERS_ID 0x100D
@@ -536,7 +536,7 @@ typedef struct /* Refer to ANSI FDDI SMT Rev. 7.3 */
536#define PI_ITEM_K_SMT_REM_DISC_FLAG 0x102C 536#define PI_ITEM_K_SMT_REM_DISC_FLAG 0x102C
537#define PI_ITEM_K_SMT_STATION_STATUS 0x102D 537#define PI_ITEM_K_SMT_STATION_STATUS 0x102D
538#define PI_ITEM_K_SMT_PEER_WRAP_FLAG 0x102E 538#define PI_ITEM_K_SMT_PEER_WRAP_FLAG 0x102E
539 539
540#define PI_GRP_K_SMT_MIB_OPERATION 0x1032 540#define PI_GRP_K_SMT_MIB_OPERATION 0x1032
541#define PI_ITEM_K_SMT_MSG_TIME_STAMP 0x1033 541#define PI_ITEM_K_SMT_MSG_TIME_STAMP 0x1033
542#define PI_ITEM_K_SMT_TRN_TIME_STAMP 0x1034 542#define PI_ITEM_K_SMT_TRN_TIME_STAMP 0x1034
@@ -643,9 +643,9 @@ typedef struct
643 643
644/* Addr_Filter_Set Response */ 644/* Addr_Filter_Set Response */
645 645
646typedef struct 646typedef struct
647 { 647 {
648 PI_RSP_HEADER header; 648 PI_RSP_HEADER header;
649 } PI_CMD_ADDR_FILTER_SET_RSP; 649 } PI_CMD_ADDR_FILTER_SET_RSP;
650 650
651/* Addr_Filter_Get Request */ 651/* Addr_Filter_Get Request */
@@ -659,7 +659,7 @@ typedef struct
659 659
660typedef struct 660typedef struct
661 { 661 {
662 PI_RSP_HEADER header; 662 PI_RSP_HEADER header;
663 PI_LAN_ADDR entry[PI_CMD_ADDR_FILTER_K_SIZE]; 663 PI_LAN_ADDR entry[PI_CMD_ADDR_FILTER_K_SIZE];
664 } PI_CMD_ADDR_FILTER_GET_RSP; 664 } PI_CMD_ADDR_FILTER_GET_RSP;
665 665
@@ -674,7 +674,7 @@ typedef struct
674 674
675typedef struct 675typedef struct
676 { 676 {
677 PI_RSP_HEADER header; 677 PI_RSP_HEADER header;
678 PI_STATION_ID station_id; /* Station */ 678 PI_STATION_ID station_id; /* Station */
679 PI_UINT32 station_type; 679 PI_UINT32 station_type;
680 PI_UINT32 smt_ver_id; 680 PI_UINT32 smt_ver_id;
@@ -728,66 +728,66 @@ typedef struct
728 728
729typedef struct 729typedef struct
730 { 730 {
731 PI_RSP_HEADER header; 731 PI_RSP_HEADER header;
732 732
733 /* SMT GROUP */ 733 /* SMT GROUP */
734 734
735 PI_STATION_ID smt_station_id; 735 PI_STATION_ID smt_station_id;
736 PI_UINT32 smt_op_version_id; 736 PI_UINT32 smt_op_version_id;
737 PI_UINT32 smt_hi_version_id; 737 PI_UINT32 smt_hi_version_id;
738 PI_UINT32 smt_lo_version_id; 738 PI_UINT32 smt_lo_version_id;
739 PI_UINT32 smt_mac_ct; 739 PI_UINT32 smt_mac_ct;
740 PI_UINT32 smt_non_master_ct; 740 PI_UINT32 smt_non_master_ct;
741 PI_UINT32 smt_master_ct; 741 PI_UINT32 smt_master_ct;
742 PI_UINT32 smt_paths_available; 742 PI_UINT32 smt_paths_available;
743 PI_UINT32 smt_config_capabilities; 743 PI_UINT32 smt_config_capabilities;
744 PI_UINT32 smt_config_policy; 744 PI_UINT32 smt_config_policy;
745 PI_UINT32 smt_connection_policy; 745 PI_UINT32 smt_connection_policy;
746 PI_UINT32 smt_t_notify; 746 PI_UINT32 smt_t_notify;
747 PI_UINT32 smt_status_reporting; 747 PI_UINT32 smt_status_reporting;
748 PI_UINT32 smt_ecm_state; 748 PI_UINT32 smt_ecm_state;
749 PI_UINT32 smt_cf_state; 749 PI_UINT32 smt_cf_state;
750 PI_UINT32 smt_hold_state; 750 PI_UINT32 smt_hold_state;
751 PI_UINT32 smt_remote_disconnect_flag; 751 PI_UINT32 smt_remote_disconnect_flag;
752 PI_UINT32 smt_station_action; 752 PI_UINT32 smt_station_action;
753 753
754 /* MAC GROUP */ 754 /* MAC GROUP */
755 755
756 PI_UINT32 mac_frame_status_capabilities; 756 PI_UINT32 mac_frame_status_capabilities;
757 PI_UINT32 mac_t_max_greatest_lower_bound; 757 PI_UINT32 mac_t_max_greatest_lower_bound;
758 PI_UINT32 mac_tvx_greatest_lower_bound; 758 PI_UINT32 mac_tvx_greatest_lower_bound;
759 PI_UINT32 mac_paths_available; 759 PI_UINT32 mac_paths_available;
760 PI_UINT32 mac_current_path; 760 PI_UINT32 mac_current_path;
761 PI_LAN_ADDR mac_upstream_nbr; 761 PI_LAN_ADDR mac_upstream_nbr;
762 PI_LAN_ADDR mac_old_upstream_nbr; 762 PI_LAN_ADDR mac_old_upstream_nbr;
763 PI_UINT32 mac_dup_addr_test; 763 PI_UINT32 mac_dup_addr_test;
764 PI_UINT32 mac_paths_requested; 764 PI_UINT32 mac_paths_requested;
765 PI_UINT32 mac_downstream_port_type; 765 PI_UINT32 mac_downstream_port_type;
766 PI_LAN_ADDR mac_smt_address; 766 PI_LAN_ADDR mac_smt_address;
767 PI_UINT32 mac_t_req; 767 PI_UINT32 mac_t_req;
768 PI_UINT32 mac_t_neg; 768 PI_UINT32 mac_t_neg;
769 PI_UINT32 mac_t_max; 769 PI_UINT32 mac_t_max;
770 PI_UINT32 mac_tvx_value; 770 PI_UINT32 mac_tvx_value;
771 PI_UINT32 mac_t_min; 771 PI_UINT32 mac_t_min;
772 PI_UINT32 mac_current_frame_status; 772 PI_UINT32 mac_current_frame_status;
773 /* mac_frame_cts */ 773 /* mac_frame_cts */
774 /* mac_error_cts */ 774 /* mac_error_cts */
775 /* mac_lost_cts */ 775 /* mac_lost_cts */
776 PI_UINT32 mac_frame_error_threshold; 776 PI_UINT32 mac_frame_error_threshold;
777 PI_UINT32 mac_frame_error_ratio; 777 PI_UINT32 mac_frame_error_ratio;
778 PI_UINT32 mac_rmt_state; 778 PI_UINT32 mac_rmt_state;
779 PI_UINT32 mac_da_flag; 779 PI_UINT32 mac_da_flag;
780 PI_UINT32 mac_una_da_flag; 780 PI_UINT32 mac_una_da_flag;
781 PI_UINT32 mac_frame_condition; 781 PI_UINT32 mac_frame_condition;
782 PI_UINT32 mac_chip_set; 782 PI_UINT32 mac_chip_set;
783 PI_UINT32 mac_action; 783 PI_UINT32 mac_action;
784 784
785 /* PATH GROUP => Does not need to be implemented */ 785 /* PATH GROUP => Does not need to be implemented */
786 786
787 /* PORT GROUP */ 787 /* PORT GROUP */
788 788
789 PI_UINT32 port_pc_type[PI_PHY_K_MAX]; 789 PI_UINT32 port_pc_type[PI_PHY_K_MAX];
790 PI_UINT32 port_pc_neighbor[PI_PHY_K_MAX]; 790 PI_UINT32 port_pc_neighbor[PI_PHY_K_MAX];
791 PI_UINT32 port_connection_policies[PI_PHY_K_MAX]; 791 PI_UINT32 port_connection_policies[PI_PHY_K_MAX];
792 PI_UINT32 port_remote_mac_indicated[PI_PHY_K_MAX]; 792 PI_UINT32 port_remote_mac_indicated[PI_PHY_K_MAX];
793 PI_UINT32 port_ce_state[PI_PHY_K_MAX]; 793 PI_UINT32 port_ce_state[PI_PHY_K_MAX];
@@ -798,17 +798,17 @@ typedef struct
798 PI_UINT32 port_tb_max[PI_PHY_K_MAX]; 798 PI_UINT32 port_tb_max[PI_PHY_K_MAX];
799 PI_UINT32 port_bs_flag[PI_PHY_K_MAX]; 799 PI_UINT32 port_bs_flag[PI_PHY_K_MAX];
800 /* port_lct_fail_cts[PI_PHY_K_MAX]; */ 800 /* port_lct_fail_cts[PI_PHY_K_MAX]; */
801 PI_UINT32 port_ler_estimate[PI_PHY_K_MAX]; 801 PI_UINT32 port_ler_estimate[PI_PHY_K_MAX];
802 /* port_lem_reject_cts[PI_PHY_K_MAX]; */ 802 /* port_lem_reject_cts[PI_PHY_K_MAX]; */
803 /* port_lem_cts[PI_PHY_K_MAX]; */ 803 /* port_lem_cts[PI_PHY_K_MAX]; */
804 PI_UINT32 port_ler_cutoff[PI_PHY_K_MAX]; 804 PI_UINT32 port_ler_cutoff[PI_PHY_K_MAX];
805 PI_UINT32 port_ler_alarm[PI_PHY_K_MAX]; 805 PI_UINT32 port_ler_alarm[PI_PHY_K_MAX];
806 PI_UINT32 port_connect_state[PI_PHY_K_MAX]; 806 PI_UINT32 port_connect_state[PI_PHY_K_MAX];
807 PI_UINT32 port_pcm_state[PI_PHY_K_MAX]; 807 PI_UINT32 port_pcm_state[PI_PHY_K_MAX];
808 PI_UINT32 port_pc_withhold[PI_PHY_K_MAX]; 808 PI_UINT32 port_pc_withhold[PI_PHY_K_MAX];
809 PI_UINT32 port_ler_condition[PI_PHY_K_MAX]; 809 PI_UINT32 port_ler_condition[PI_PHY_K_MAX];
810 PI_UINT32 port_chip_set[PI_PHY_K_MAX]; 810 PI_UINT32 port_chip_set[PI_PHY_K_MAX];
811 PI_UINT32 port_action[PI_PHY_K_MAX]; 811 PI_UINT32 port_action[PI_PHY_K_MAX];
812 812
813 /* ATTACHMENT GROUP */ 813 /* ATTACHMENT GROUP */
814 814
@@ -833,7 +833,7 @@ typedef struct
833 833
834typedef struct 834typedef struct
835 { 835 {
836 PI_RSP_HEADER header; 836 PI_RSP_HEADER header;
837 837
838 /* SMT GROUP */ 838 /* SMT GROUP */
839 839
@@ -841,7 +841,7 @@ typedef struct
841 841
842 /* MAC GROUP */ 842 /* MAC GROUP */
843 843
844 PI_UINT32 emac_link_state; 844 PI_UINT32 emac_link_state;
845 PI_UINT32 emac_ring_purger_state; 845 PI_UINT32 emac_ring_purger_state;
846 PI_UINT32 emac_ring_purger_enable; 846 PI_UINT32 emac_ring_purger_enable;
847 PI_UINT32 emac_frame_strip_mode; 847 PI_UINT32 emac_frame_strip_mode;
@@ -915,9 +915,9 @@ typedef struct
915 915
916typedef struct 916typedef struct
917 { 917 {
918 PI_RSP_HEADER header; 918 PI_RSP_HEADER header;
919 PI_CNTR time_since_reset; 919 PI_CNTR time_since_reset;
920 PI_CNTR_BLK cntrs; 920 PI_CNTR_BLK cntrs;
921 } PI_CMD_CNTRS_GET_RSP; 921 } PI_CMD_CNTRS_GET_RSP;
922 922
923/* Counters_Set Request */ 923/* Counters_Set Request */
@@ -925,14 +925,14 @@ typedef struct
925typedef struct 925typedef struct
926 { 926 {
927 PI_UINT32 cmd_type; 927 PI_UINT32 cmd_type;
928 PI_CNTR_BLK cntrs; 928 PI_CNTR_BLK cntrs;
929 } PI_CMD_CNTRS_SET_REQ; 929 } PI_CMD_CNTRS_SET_REQ;
930 930
931/* Counters_Set Response */ 931/* Counters_Set Response */
932 932
933typedef struct 933typedef struct
934 { 934 {
935 PI_RSP_HEADER header; 935 PI_RSP_HEADER header;
936 } PI_CMD_CNTRS_SET_RSP; 936 } PI_CMD_CNTRS_SET_RSP;
937 937
938/* Error_Log_Clear Request */ 938/* Error_Log_Clear Request */
@@ -946,7 +946,7 @@ typedef struct
946 946
947typedef struct 947typedef struct
948 { 948 {
949 PI_RSP_HEADER header; 949 PI_RSP_HEADER header;
950 } PI_CMD_ERROR_LOG_CLEAR_RSP; 950 } PI_CMD_ERROR_LOG_CLEAR_RSP;
951 951
952/* Error_Log_Get Request */ 952/* Error_Log_Get Request */
@@ -966,7 +966,7 @@ typedef struct
966 966
967typedef struct 967typedef struct
968 { 968 {
969 struct 969 struct
970 { 970 {
971 PI_UINT32 fru_imp_mask; 971 PI_UINT32 fru_imp_mask;
972 PI_UINT32 test_id; 972 PI_UINT32 test_id;
@@ -977,7 +977,7 @@ typedef struct
977 977
978typedef struct 978typedef struct
979 { 979 {
980 PI_RSP_HEADER header; 980 PI_RSP_HEADER header;
981 PI_UINT32 event_status; 981 PI_UINT32 event_status;
982 PI_UINT32 caller_id; 982 PI_UINT32 caller_id;
983 PI_UINT32 timestamp_l; 983 PI_UINT32 timestamp_l;
@@ -993,7 +993,7 @@ typedef struct
993#define PI_LOG_EVENT_STATUS_K_VALID 0 /* Valid Event Status */ 993#define PI_LOG_EVENT_STATUS_K_VALID 0 /* Valid Event Status */
994#define PI_LOG_EVENT_STATUS_K_INVALID 1 /* Invalid Event Status */ 994#define PI_LOG_EVENT_STATUS_K_INVALID 1 /* Invalid Event Status */
995#define PI_LOG_CALLER_ID_K_NONE 0 /* No caller */ 995#define PI_LOG_CALLER_ID_K_NONE 0 /* No caller */
996#define PI_LOG_CALLER_ID_K_SELFTEST 1 /* Normal power-up selftest */ 996#define PI_LOG_CALLER_ID_K_SELFTEST 1 /* Normal power-up selftest */
997#define PI_LOG_CALLER_ID_K_MFG 2 /* Mfg power-up selftest */ 997#define PI_LOG_CALLER_ID_K_MFG 2 /* Mfg power-up selftest */
998#define PI_LOG_CALLER_ID_K_ONLINE 3 /* On-line diagnostics */ 998#define PI_LOG_CALLER_ID_K_ONLINE 3 /* On-line diagnostics */
999#define PI_LOG_CALLER_ID_K_HW 4 /* Hardware */ 999#define PI_LOG_CALLER_ID_K_HW 4 /* Hardware */
@@ -1026,7 +1026,7 @@ typedef union
1026 PI_CMD_DEC_EXT_MIB_GET_REQ dec_mib_get; 1026 PI_CMD_DEC_EXT_MIB_GET_REQ dec_mib_get;
1027 PI_CMD_SMT_MIB_SET_REQ smt_mib_set; 1027 PI_CMD_SMT_MIB_SET_REQ smt_mib_set;
1028 PI_CMD_SMT_MIB_GET_REQ smt_mib_get; 1028 PI_CMD_SMT_MIB_GET_REQ smt_mib_get;
1029 char pad[PI_CMD_REQ_K_SIZE_MAX]; 1029 char pad[PI_CMD_REQ_K_SIZE_MAX];
1030 } PI_DMA_CMD_REQ; 1030 } PI_DMA_CMD_REQ;
1031 1031
1032typedef union 1032typedef union
@@ -1048,7 +1048,7 @@ typedef union
1048 PI_CMD_DEC_EXT_MIB_GET_RSP dec_mib_get; 1048 PI_CMD_DEC_EXT_MIB_GET_RSP dec_mib_get;
1049 PI_CMD_SMT_MIB_SET_RSP smt_mib_set; 1049 PI_CMD_SMT_MIB_SET_RSP smt_mib_set;
1050 PI_CMD_SMT_MIB_GET_RSP smt_mib_get; 1050 PI_CMD_SMT_MIB_GET_RSP smt_mib_get;
1051 char pad[PI_CMD_RSP_K_SIZE_MAX]; 1051 char pad[PI_CMD_RSP_K_SIZE_MAX];
1052 } PI_DMA_CMD_RSP; 1052 } PI_DMA_CMD_RSP;
1053 1053
1054typedef union 1054typedef union
@@ -1094,7 +1094,7 @@ typedef struct
1094#define PI_DESCR_BLK_K_SMT_HOST 0x1000 1094#define PI_DESCR_BLK_K_SMT_HOST 0x1000
1095#define PI_DESCR_BLK_K_UNSOL 0x1200 1095#define PI_DESCR_BLK_K_UNSOL 0x1200
1096#define PI_DESCR_BLK_K_CMD_RSP 0x1280 1096#define PI_DESCR_BLK_K_CMD_RSP 0x1280
1097#define PI_DESCR_BLK_K_CMD_REQ 0x1300 1097#define PI_DESCR_BLK_K_CMD_REQ 0x1300
1098 1098
1099/* Define format of a rcv descr (Rcv Data, Cmd Rsp, Unsolicited, SMT Host) */ 1099/* Define format of a rcv descr (Rcv Data, Cmd Rsp, Unsolicited, SMT Host) */
1100/* Note a field has been added for later versions of the PDQ to allow for */ 1100/* Note a field has been added for later versions of the PDQ to allow for */
@@ -1110,10 +1110,10 @@ typedef struct
1110 } PI_RCV_DESCR; 1110 } PI_RCV_DESCR;
1111 1111
1112#define PI_RCV_DESCR_M_SOP 0x80000000 1112#define PI_RCV_DESCR_M_SOP 0x80000000
1113#define PI_RCV_DESCR_M_SEG_LEN_LO 0x60000000 1113#define PI_RCV_DESCR_M_SEG_LEN_LO 0x60000000
1114#define PI_RCV_DESCR_M_MBZ 0x60000000 1114#define PI_RCV_DESCR_M_MBZ 0x60000000
1115#define PI_RCV_DESCR_M_SEG_LEN 0x1F800000 1115#define PI_RCV_DESCR_M_SEG_LEN 0x1F800000
1116#define PI_RCV_DESCR_M_SEG_LEN_HI 0x1FF00000 1116#define PI_RCV_DESCR_M_SEG_LEN_HI 0x1FF00000
1117#define PI_RCV_DESCR_M_SEG_CNT 0x000F0000 1117#define PI_RCV_DESCR_M_SEG_CNT 0x000F0000
1118#define PI_RCV_DESCR_M_BUFF_HI 0x0000FFFF 1118#define PI_RCV_DESCR_M_BUFF_HI 0x0000FFFF
1119 1119
@@ -1121,7 +1121,7 @@ typedef struct
1121#define PI_RCV_DESCR_V_SEG_LEN_LO 29 1121#define PI_RCV_DESCR_V_SEG_LEN_LO 29
1122#define PI_RCV_DESCR_V_MBZ 29 1122#define PI_RCV_DESCR_V_MBZ 29
1123#define PI_RCV_DESCR_V_SEG_LEN 23 1123#define PI_RCV_DESCR_V_SEG_LEN 23
1124#define PI_RCV_DESCR_V_SEG_LEN_HI 20 1124#define PI_RCV_DESCR_V_SEG_LEN_HI 20
1125#define PI_RCV_DESCR_V_SEG_CNT 16 1125#define PI_RCV_DESCR_V_SEG_CNT 16
1126#define PI_RCV_DESCR_V_BUFF_HI 0 1126#define PI_RCV_DESCR_V_BUFF_HI 0
1127 1127
@@ -1135,7 +1135,7 @@ typedef struct
1135 1135
1136#define PI_XMT_DESCR_M_SOP 0x80000000 1136#define PI_XMT_DESCR_M_SOP 0x80000000
1137#define PI_XMT_DESCR_M_EOP 0x40000000 1137#define PI_XMT_DESCR_M_EOP 0x40000000
1138#define PI_XMT_DESCR_M_MBZ 0x20000000 1138#define PI_XMT_DESCR_M_MBZ 0x20000000
1139#define PI_XMT_DESCR_M_SEG_LEN 0x1FFF0000 1139#define PI_XMT_DESCR_M_SEG_LEN 0x1FFF0000
1140#define PI_XMT_DESCR_M_BUFF_HI 0x0000FFFF 1140#define PI_XMT_DESCR_M_BUFF_HI 0x0000FFFF
1141 1141
@@ -1195,7 +1195,7 @@ typedef struct
1195#define PI_PCTRL_M_CONS_BLOCK 0x0040 1195#define PI_PCTRL_M_CONS_BLOCK 0x0040
1196#define PI_PCTRL_M_UNINIT 0x0020 1196#define PI_PCTRL_M_UNINIT 0x0020
1197#define PI_PCTRL_M_RING_MEMBER 0x0010 1197#define PI_PCTRL_M_RING_MEMBER 0x0010
1198#define PI_PCTRL_M_MLA 0x0008 1198#define PI_PCTRL_M_MLA 0x0008
1199#define PI_PCTRL_M_FW_REV_READ 0x0004 1199#define PI_PCTRL_M_FW_REV_READ 0x0004
1200#define PI_PCTRL_M_DEV_SPECIFIC 0x0002 1200#define PI_PCTRL_M_DEV_SPECIFIC 0x0002
1201#define PI_PCTRL_M_SUB_CMD 0x0001 1201#define PI_PCTRL_M_SUB_CMD 0x0001
@@ -1230,12 +1230,12 @@ typedef struct
1230 1230
1231#define PI_PDATA_A_INIT_M_DESC_BLK_ADDR 0x0FFFFE000 1231#define PI_PDATA_A_INIT_M_DESC_BLK_ADDR 0x0FFFFE000
1232#define PI_PDATA_A_INIT_M_RESERVED 0x000001FFC 1232#define PI_PDATA_A_INIT_M_RESERVED 0x000001FFC
1233#define PI_PDATA_A_INIT_M_BSWAP_DATA 0x000000002 1233#define PI_PDATA_A_INIT_M_BSWAP_DATA 0x000000002
1234#define PI_PDATA_A_INIT_M_BSWAP_LITERAL 0x000000001 1234#define PI_PDATA_A_INIT_M_BSWAP_LITERAL 0x000000001
1235 1235
1236#define PI_PDATA_A_INIT_V_DESC_BLK_ADDR 13 1236#define PI_PDATA_A_INIT_V_DESC_BLK_ADDR 13
1237#define PI_PDATA_A_INIT_V_RESERVED 3 1237#define PI_PDATA_A_INIT_V_RESERVED 3
1238#define PI_PDATA_A_INIT_V_BSWAP_DATA 1 1238#define PI_PDATA_A_INIT_V_BSWAP_DATA 1
1239#define PI_PDATA_A_INIT_V_BSWAP_LITERAL 0 1239#define PI_PDATA_A_INIT_V_BSWAP_LITERAL 0
1240 1240
1241/* Port Reset Register */ 1241/* Port Reset Register */
@@ -1281,11 +1281,11 @@ typedef struct
1281#define PI_HALT_ID_K_IMAGE_CRC_ERROR 7 /* Image is bad, update it */ 1281#define PI_HALT_ID_K_IMAGE_CRC_ERROR 7 /* Image is bad, update it */
1282#define PI_HALT_ID_K_BUS_EXCEPTION 8 /* 68K bus exception */ 1282#define PI_HALT_ID_K_BUS_EXCEPTION 8 /* 68K bus exception */
1283 1283
1284/* Host Interrupt Enable Register as seen by host */ 1284/* Host Interrupt Enable Register as seen by host */
1285 1285
1286#define PI_HOST_INT_M_XMT_DATA_ENB 0x80000000 /* Type 2 Enables */ 1286#define PI_HOST_INT_M_XMT_DATA_ENB 0x80000000 /* Type 2 Enables */
1287#define PI_HOST_INT_M_RCV_DATA_ENB 0x40000000 1287#define PI_HOST_INT_M_RCV_DATA_ENB 0x40000000
1288#define PI_HOST_INT_M_SMT_HOST_ENB 0x10000000 /* Type 1 Enables */ 1288#define PI_HOST_INT_M_SMT_HOST_ENB 0x10000000 /* Type 1 Enables */
1289#define PI_HOST_INT_M_UNSOL_ENB 0x20000000 1289#define PI_HOST_INT_M_UNSOL_ENB 0x20000000
1290#define PI_HOST_INT_M_CMD_RSP_ENB 0x08000000 1290#define PI_HOST_INT_M_CMD_RSP_ENB 0x08000000
1291#define PI_HOST_INT_M_CMD_REQ_ENB 0x04000000 1291#define PI_HOST_INT_M_CMD_REQ_ENB 0x04000000
@@ -1301,8 +1301,8 @@ typedef struct
1301#define PI_HOST_INT_M_BUS_PAR_ERR 0x00000001 1301#define PI_HOST_INT_M_BUS_PAR_ERR 0x00000001
1302 1302
1303#define PI_HOST_INT_V_XMT_DATA_ENB 31 /* Type 2 Enables */ 1303#define PI_HOST_INT_V_XMT_DATA_ENB 31 /* Type 2 Enables */
1304#define PI_HOST_INT_V_RCV_DATA_ENB 30 1304#define PI_HOST_INT_V_RCV_DATA_ENB 30
1305#define PI_HOST_INT_V_SMT_HOST_ENB 29 /* Type 1 Enables */ 1305#define PI_HOST_INT_V_SMT_HOST_ENB 29 /* Type 1 Enables */
1306#define PI_HOST_INT_V_UNSOL_ENB 28 1306#define PI_HOST_INT_V_UNSOL_ENB 28
1307#define PI_HOST_INT_V_CMD_RSP_ENB 27 1307#define PI_HOST_INT_V_CMD_RSP_ENB 27
1308#define PI_HOST_INT_V_CMD_REQ_ENB 26 1308#define PI_HOST_INT_V_CMD_REQ_ENB 26
@@ -1333,8 +1333,8 @@ typedef struct
1333#define PI_TYPE_0_STAT_M_PM_PAR_ERR 0x00000002 1333#define PI_TYPE_0_STAT_M_PM_PAR_ERR 0x00000002
1334#define PI_TYPE_0_STAT_M_BUS_PAR_ERR 0x00000001 1334#define PI_TYPE_0_STAT_M_BUS_PAR_ERR 0x00000001
1335 1335
1336#define PI_TYPE_0_STAT_V_1MS 7 1336#define PI_TYPE_0_STAT_V_1MS 7
1337#define PI_TYPE_0_STAT_V_20MS 6 1337#define PI_TYPE_0_STAT_V_20MS 6
1338#define PI_TYPE_0_STAT_V_CSR_CMD_DONE 5 1338#define PI_TYPE_0_STAT_V_CSR_CMD_DONE 5
1339#define PI_TYPE_0_STAT_V_STATE_CHANGE 4 1339#define PI_TYPE_0_STAT_V_STATE_CHANGE 4
1340#define PI_TYPE_0_STAT_V_XMT_FLUSH 3 1340#define PI_TYPE_0_STAT_V_XMT_FLUSH 3
@@ -1692,7 +1692,7 @@ typedef struct DFX_board_tag
1692 { 1692 {
1693 /* Keep virtual and physical pointers to locked, physically contiguous memory */ 1693 /* Keep virtual and physical pointers to locked, physically contiguous memory */
1694 1694
1695 char *kmalloced; /* pci_free_consistent this on unload */ 1695 char *kmalloced; /* pci_free_consistent this on unload */
1696 dma_addr_t kmalloced_dma; 1696 dma_addr_t kmalloced_dma;
1697 /* DMA handle for the above */ 1697 /* DMA handle for the above */
1698 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */ 1698 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */
@@ -1739,9 +1739,9 @@ typedef struct DFX_board_tag
1739 /* Store pointers to transmit buffers for transmit completion code */ 1739 /* Store pointers to transmit buffers for transmit completion code */
1740 1740
1741 XMT_DRIVER_DESCR xmt_drv_descr_blk[PI_XMT_DATA_K_NUM_ENTRIES]; 1741 XMT_DRIVER_DESCR xmt_drv_descr_blk[PI_XMT_DATA_K_NUM_ENTRIES];
1742 1742
1743 /* Transmit spinlocks */ 1743 /* Transmit spinlocks */
1744 1744
1745 spinlock_t lock; 1745 spinlock_t lock;
1746 1746
1747 /* Store device, bus-specific, and parameter information for this adapter */ 1747 /* Store device, bus-specific, and parameter information for this adapter */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 17:18:27 -0500