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authorDavid Woodhouse <dwmw2@infradead.org>2007-04-26 04:31:28 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2007-04-26 04:31:28 -0400
commitef2e58ea6b9931c3a4816c66593da49bb20e3b24 (patch)
treece7432add3becbe78de4ea06425cd2d9e91f4ada /drivers/net/cxgb3/t3_hw.c
parent06d63cc51d47f572009138a7f3ac34d95773405d (diff)
parentde46c33745f5e2ad594c72f2cf5f490861b16ce1 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'drivers/net/cxgb3/t3_hw.c')
-rw-r--r--drivers/net/cxgb3/t3_hw.c57
1 files changed, 39 insertions, 18 deletions
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index eaa7a2e89a3..fb485d0a43d 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -438,23 +438,23 @@ static const struct adapter_info t3_adap_info[] = {
438 {2, 0, 0, 0, 438 {2, 0, 0, 0,
439 F_GPIO2_OEN | F_GPIO4_OEN | 439 F_GPIO2_OEN | F_GPIO4_OEN |
440 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, 440 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
441 SUPPORTED_OFFLOAD, 441 0,
442 &mi1_mdio_ops, "Chelsio PE9000"}, 442 &mi1_mdio_ops, "Chelsio PE9000"},
443 {2, 0, 0, 0, 443 {2, 0, 0, 0,
444 F_GPIO2_OEN | F_GPIO4_OEN | 444 F_GPIO2_OEN | F_GPIO4_OEN |
445 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, 445 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
446 SUPPORTED_OFFLOAD, 446 0,
447 &mi1_mdio_ops, "Chelsio T302"}, 447 &mi1_mdio_ops, "Chelsio T302"},
448 {1, 0, 0, 0, 448 {1, 0, 0, 0,
449 F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | 449 F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
450 F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, 450 F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
451 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_OFFLOAD, 451 SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
452 &mi1_mdio_ext_ops, "Chelsio T310"}, 452 &mi1_mdio_ext_ops, "Chelsio T310"},
453 {2, 0, 0, 0, 453 {2, 0, 0, 0,
454 F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | 454 F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
455 F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL | 455 F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL |
456 F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, 456 F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
457 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_OFFLOAD, 457 SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
458 &mi1_mdio_ext_ops, "Chelsio T320"}, 458 &mi1_mdio_ext_ops, "Chelsio T320"},
459}; 459};
460 460
@@ -681,7 +681,8 @@ enum {
681 SF_ERASE_SECTOR = 0xd8, /* erase sector */ 681 SF_ERASE_SECTOR = 0xd8, /* erase sector */
682 682
683 FW_FLASH_BOOT_ADDR = 0x70000, /* start address of FW in flash */ 683 FW_FLASH_BOOT_ADDR = 0x70000, /* start address of FW in flash */
684 FW_VERS_ADDR = 0x77ffc /* flash address holding FW version */ 684 FW_VERS_ADDR = 0x77ffc, /* flash address holding FW version */
685 FW_MIN_SIZE = 8 /* at least version and csum */
685}; 686};
686 687
687/** 688/**
@@ -935,7 +936,7 @@ int t3_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size)
935 const u32 *p = (const u32 *)fw_data; 936 const u32 *p = (const u32 *)fw_data;
936 int ret, addr, fw_sector = FW_FLASH_BOOT_ADDR >> 16; 937 int ret, addr, fw_sector = FW_FLASH_BOOT_ADDR >> 16;
937 938
938 if (size & 3) 939 if ((size & 3) || size < FW_MIN_SIZE)
939 return -EINVAL; 940 return -EINVAL;
940 if (size > FW_VERS_ADDR + 8 - FW_FLASH_BOOT_ADDR) 941 if (size > FW_VERS_ADDR + 8 - FW_FLASH_BOOT_ADDR)
941 return -EFBIG; 942 return -EFBIG;
@@ -1522,19 +1523,25 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx)
1522 */ 1523 */
1523int t3_phy_intr_handler(struct adapter *adapter) 1524int t3_phy_intr_handler(struct adapter *adapter)
1524{ 1525{
1525 static const int intr_gpio_bits[] = { 8, 0x20 }; 1526 u32 mask, gpi = adapter_info(adapter)->gpio_intr;
1526
1527 u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE); 1527 u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
1528 1528
1529 for_each_port(adapter, i) { 1529 for_each_port(adapter, i) {
1530 if (cause & intr_gpio_bits[i]) { 1530 struct port_info *p = adap2pinfo(adapter, i);
1531 struct cphy *phy = &adap2pinfo(adapter, i)->phy; 1531
1532 int phy_cause = phy->ops->intr_handler(phy); 1532 mask = gpi - (gpi & (gpi - 1));
1533 gpi -= mask;
1534
1535 if (!(p->port_type->caps & SUPPORTED_IRQ))
1536 continue;
1537
1538 if (cause & mask) {
1539 int phy_cause = p->phy.ops->intr_handler(&p->phy);
1533 1540
1534 if (phy_cause & cphy_cause_link_change) 1541 if (phy_cause & cphy_cause_link_change)
1535 t3_link_changed(adapter, i); 1542 t3_link_changed(adapter, i);
1536 if (phy_cause & cphy_cause_fifo_error) 1543 if (phy_cause & cphy_cause_fifo_error)
1537 phy->fifo_errors++; 1544 p->phy.fifo_errors++;
1538 } 1545 }
1539 } 1546 }
1540 1547
@@ -2899,6 +2906,9 @@ static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type)
2899 struct adapter *adapter = mc7->adapter; 2906 struct adapter *adapter = mc7->adapter;
2900 const struct mc7_timing_params *p = &mc7_timings[mem_type]; 2907 const struct mc7_timing_params *p = &mc7_timings[mem_type];
2901 2908
2909 if (!mc7->size)
2910 return 0;
2911
2902 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); 2912 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
2903 slow = val & F_SLOW; 2913 slow = val & F_SLOW;
2904 width = G_WIDTH(val); 2914 width = G_WIDTH(val);
@@ -3099,8 +3109,10 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params)
3099 do { /* wait for uP to initialize */ 3109 do { /* wait for uP to initialize */
3100 msleep(20); 3110 msleep(20);
3101 } while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts); 3111 } while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts);
3102 if (!attempts) 3112 if (!attempts) {
3113 CH_ERR(adapter, "uP initialization timed out\n");
3103 goto out_err; 3114 goto out_err;
3115 }
3104 3116
3105 err = 0; 3117 err = 0;
3106out_err: 3118out_err:
@@ -3200,7 +3212,7 @@ static void __devinit mc7_prep(struct adapter *adapter, struct mc7 *mc7,
3200 mc7->name = name; 3212 mc7->name = name;
3201 mc7->offset = base_addr - MC7_PMRX_BASE_ADDR; 3213 mc7->offset = base_addr - MC7_PMRX_BASE_ADDR;
3202 cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); 3214 cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
3203 mc7->size = mc7_calc_size(cfg); 3215 mc7->size = mc7->size = G_DEN(cfg) == M_DEN ? 0 : mc7_calc_size(cfg);
3204 mc7->width = G_WIDTH(cfg); 3216 mc7->width = G_WIDTH(cfg);
3205} 3217}
3206 3218
@@ -3227,6 +3239,7 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai)
3227 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); 3239 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1));
3228 t3_write_reg(adapter, A_T3DBG_GPIO_EN, 3240 t3_write_reg(adapter, A_T3DBG_GPIO_EN,
3229 ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL); 3241 ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL);
3242 t3_write_reg(adapter, A_MC5_DB_SERVER_INDEX, 0);
3230 3243
3231 if (adapter->params.rev == 0 || !uses_xaui(adapter)) 3244 if (adapter->params.rev == 0 || !uses_xaui(adapter))
3232 val |= F_ENRGMII; 3245 val |= F_ENRGMII;
@@ -3243,15 +3256,17 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai)
3243} 3256}
3244 3257
3245/* 3258/*
3246 * Reset the adapter. PCIe cards lose their config space during reset, PCI-X 3259 * Reset the adapter.
3260 * Older PCIe cards lose their config space during reset, PCI-X
3247 * ones don't. 3261 * ones don't.
3248 */ 3262 */
3249int t3_reset_adapter(struct adapter *adapter) 3263int t3_reset_adapter(struct adapter *adapter)
3250{ 3264{
3251 int i; 3265 int i, save_and_restore_pcie =
3266 adapter->params.rev < T3_REV_B2 && is_pcie(adapter);
3252 uint16_t devid = 0; 3267 uint16_t devid = 0;
3253 3268
3254 if (is_pcie(adapter)) 3269 if (save_and_restore_pcie)
3255 pci_save_state(adapter->pdev); 3270 pci_save_state(adapter->pdev);
3256 t3_write_reg(adapter, A_PL_RST, F_CRSTWRM | F_CRSTWRMMODE); 3271 t3_write_reg(adapter, A_PL_RST, F_CRSTWRM | F_CRSTWRMMODE);
3257 3272
@@ -3269,7 +3284,7 @@ int t3_reset_adapter(struct adapter *adapter)
3269 if (devid != 0x1425) 3284 if (devid != 0x1425)
3270 return -1; 3285 return -1;
3271 3286
3272 if (is_pcie(adapter)) 3287 if (save_and_restore_pcie)
3273 pci_restore_state(adapter->pdev); 3288 pci_restore_state(adapter->pdev);
3274 return 0; 3289 return 0;
3275} 3290}
@@ -3323,7 +3338,13 @@ int __devinit t3_prep_adapter(struct adapter *adapter,
3323 p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size); 3338 p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size);
3324 p->ntimer_qs = p->cm_size >= (128 << 20) || 3339 p->ntimer_qs = p->cm_size >= (128 << 20) ||
3325 adapter->params.rev > 0 ? 12 : 6; 3340 adapter->params.rev > 0 ? 12 : 6;
3341 }
3342
3343 adapter->params.offload = t3_mc7_size(&adapter->pmrx) &&
3344 t3_mc7_size(&adapter->pmtx) &&
3345 t3_mc7_size(&adapter->cm);
3326 3346
3347 if (is_offload(adapter)) {
3327 adapter->params.mc5.nservers = DEFAULT_NSERVERS; 3348 adapter->params.mc5.nservers = DEFAULT_NSERVERS;
3328 adapter->params.mc5.nfilters = adapter->params.rev > 0 ? 3349 adapter->params.mc5.nfilters = adapter->params.rev > 0 ?
3329 DEFAULT_NFILTERS : 0; 3350 DEFAULT_NFILTERS : 0;