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authorMichael Chan <mchan@broadcom.com>2006-01-23 19:09:51 -0500
committerDavid S. Miller <davem@davemloft.net>2006-01-23 19:09:51 -0500
commitade2bfe7d1f0ea804d2e63209cc6318ad8bf17ae (patch)
tree56e646813dff69ebe6afa89077df4e25e74b4610 /drivers/net/bnx2.h
parentdda1e390bf9e2889a3abc48590a015b307637753 (diff)
[BNX2]: Fix UDP checksum verification
Fix TCP/UDP checksum verification. Use status bits in the buffer descriptor instead of the checksum value to verify rx checksum. Using the checksum value will be incorrect if the UDP packet has zero in the UDP checksum field. Firmware update required for this fix. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r--drivers/net/bnx2.h22
1 files changed, 9 insertions, 13 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 95d7f3b2ee7..ea70bbcd254 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -277,19 +277,7 @@ struct statistics_block {
277 * l2_fhdr definition 277 * l2_fhdr definition
278 */ 278 */
279struct l2_fhdr { 279struct l2_fhdr {
280#if defined(__BIG_ENDIAN) 280 u32 l2_fhdr_status;
281 u16 l2_fhdr_errors;
282 u16 l2_fhdr_status;
283#elif defined(__LITTLE_ENDIAN)
284 u16 l2_fhdr_status;
285 u16 l2_fhdr_errors;
286#endif
287 #define L2_FHDR_ERRORS_BAD_CRC (1<<1)
288 #define L2_FHDR_ERRORS_PHY_DECODE (1<<2)
289 #define L2_FHDR_ERRORS_ALIGNMENT (1<<3)
290 #define L2_FHDR_ERRORS_TOO_SHORT (1<<4)
291 #define L2_FHDR_ERRORS_GIANT_FRAME (1<<5)
292
293 #define L2_FHDR_STATUS_RULE_CLASS (0x7<<0) 281 #define L2_FHDR_STATUS_RULE_CLASS (0x7<<0)
294 #define L2_FHDR_STATUS_RULE_P2 (1<<3) 282 #define L2_FHDR_STATUS_RULE_P2 (1<<3)
295 #define L2_FHDR_STATUS_RULE_P3 (1<<4) 283 #define L2_FHDR_STATUS_RULE_P3 (1<<4)
@@ -301,6 +289,14 @@ struct l2_fhdr {
301 #define L2_FHDR_STATUS_TCP_SEGMENT (1<<14) 289 #define L2_FHDR_STATUS_TCP_SEGMENT (1<<14)
302 #define L2_FHDR_STATUS_UDP_DATAGRAM (1<<15) 290 #define L2_FHDR_STATUS_UDP_DATAGRAM (1<<15)
303 291
292 #define L2_FHDR_ERRORS_BAD_CRC (1<<17)
293 #define L2_FHDR_ERRORS_PHY_DECODE (1<<18)
294 #define L2_FHDR_ERRORS_ALIGNMENT (1<<19)
295 #define L2_FHDR_ERRORS_TOO_SHORT (1<<20)
296 #define L2_FHDR_ERRORS_GIANT_FRAME (1<<21)
297 #define L2_FHDR_ERRORS_TCP_XSUM (1<<28)
298 #define L2_FHDR_ERRORS_UDP_XSUM (1<<31)
299
304 u32 l2_fhdr_hash; 300 u32 l2_fhdr_hash;
305#if defined(__BIG_ENDIAN) 301#if defined(__BIG_ENDIAN)
306 u16 l2_fhdr_pkt_len; 302 u16 l2_fhdr_pkt_len;