diff options
author | James Morris <jmorris@namei.org> | 2009-03-23 19:52:46 -0400 |
---|---|---|
committer | James Morris <jmorris@namei.org> | 2009-03-23 19:52:46 -0400 |
commit | 703a3cd72817e99201cef84a8a7aecc60b2b3581 (patch) | |
tree | 3e943755178ff410694722bb031f523136fbc432 /drivers/net/benet/be_cmds.h | |
parent | df7f54c012b92ec93d56b68547351dcdf8a163d3 (diff) | |
parent | 8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff) |
Merge branch 'master' into next
Diffstat (limited to 'drivers/net/benet/be_cmds.h')
-rw-r--r-- | drivers/net/benet/be_cmds.h | 688 |
1 files changed, 688 insertions, 0 deletions
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h new file mode 100644 index 00000000000..e499e2d5b8c --- /dev/null +++ b/drivers/net/benet/be_cmds.h | |||
@@ -0,0 +1,688 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005 - 2009 ServerEngines | ||
3 | * All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License version 2 | ||
7 | * as published by the Free Software Foundation. The full GNU General | ||
8 | * Public License is included in this distribution in the file called COPYING. | ||
9 | * | ||
10 | * Contact Information: | ||
11 | * linux-drivers@serverengines.com | ||
12 | * | ||
13 | * ServerEngines | ||
14 | * 209 N. Fair Oaks Ave | ||
15 | * Sunnyvale, CA 94085 | ||
16 | */ | ||
17 | |||
18 | /* | ||
19 | * The driver sends configuration and managements command requests to the | ||
20 | * firmware in the BE. These requests are communicated to the processor | ||
21 | * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one | ||
22 | * WRB inside a MAILBOX. | ||
23 | * The commands are serviced by the ARM processor in the BladeEngine's MPU. | ||
24 | */ | ||
25 | |||
26 | struct be_sge { | ||
27 | u32 pa_lo; | ||
28 | u32 pa_hi; | ||
29 | u32 len; | ||
30 | }; | ||
31 | |||
32 | #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/ | ||
33 | #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */ | ||
34 | #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */ | ||
35 | struct be_mcc_wrb { | ||
36 | u32 embedded; /* dword 0 */ | ||
37 | u32 payload_length; /* dword 1 */ | ||
38 | u32 tag0; /* dword 2 */ | ||
39 | u32 tag1; /* dword 3 */ | ||
40 | u32 rsvd; /* dword 4 */ | ||
41 | union { | ||
42 | u8 embedded_payload[236]; /* used by embedded cmds */ | ||
43 | struct be_sge sgl[19]; /* used by non-embedded cmds */ | ||
44 | } payload; | ||
45 | }; | ||
46 | |||
47 | #define CQE_FLAGS_VALID_MASK (1 << 31) | ||
48 | #define CQE_FLAGS_ASYNC_MASK (1 << 30) | ||
49 | #define CQE_FLAGS_COMPLETED_MASK (1 << 28) | ||
50 | #define CQE_FLAGS_CONSUMED_MASK (1 << 27) | ||
51 | |||
52 | /* Completion Status */ | ||
53 | enum { | ||
54 | MCC_STATUS_SUCCESS = 0x0, | ||
55 | /* The client does not have sufficient privileges to execute the command */ | ||
56 | MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1, | ||
57 | /* A parameter in the command was invalid. */ | ||
58 | MCC_STATUS_INVALID_PARAMETER = 0x2, | ||
59 | /* There are insufficient chip resources to execute the command */ | ||
60 | MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3, | ||
61 | /* The command is completing because the queue was getting flushed */ | ||
62 | MCC_STATUS_QUEUE_FLUSHING = 0x4, | ||
63 | /* The command is completing with a DMA error */ | ||
64 | MCC_STATUS_DMA_FAILED = 0x5 | ||
65 | }; | ||
66 | |||
67 | #define CQE_STATUS_COMPL_MASK 0xFFFF | ||
68 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ | ||
69 | #define CQE_STATUS_EXTD_MASK 0xFFFF | ||
70 | #define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */ | ||
71 | |||
72 | struct be_mcc_cq_entry { | ||
73 | u32 status; /* dword 0 */ | ||
74 | u32 tag0; /* dword 1 */ | ||
75 | u32 tag1; /* dword 2 */ | ||
76 | u32 flags; /* dword 3 */ | ||
77 | }; | ||
78 | |||
79 | struct be_mcc_mailbox { | ||
80 | struct be_mcc_wrb wrb; | ||
81 | struct be_mcc_cq_entry cqe; | ||
82 | }; | ||
83 | |||
84 | #define CMD_SUBSYSTEM_COMMON 0x1 | ||
85 | #define CMD_SUBSYSTEM_ETH 0x3 | ||
86 | |||
87 | #define OPCODE_COMMON_NTWK_MAC_QUERY 1 | ||
88 | #define OPCODE_COMMON_NTWK_MAC_SET 2 | ||
89 | #define OPCODE_COMMON_NTWK_MULTICAST_SET 3 | ||
90 | #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4 | ||
91 | #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5 | ||
92 | #define OPCODE_COMMON_CQ_CREATE 12 | ||
93 | #define OPCODE_COMMON_EQ_CREATE 13 | ||
94 | #define OPCODE_COMMON_MCC_CREATE 21 | ||
95 | #define OPCODE_COMMON_NTWK_RX_FILTER 34 | ||
96 | #define OPCODE_COMMON_GET_FW_VERSION 35 | ||
97 | #define OPCODE_COMMON_SET_FLOW_CONTROL 36 | ||
98 | #define OPCODE_COMMON_GET_FLOW_CONTROL 37 | ||
99 | #define OPCODE_COMMON_SET_FRAME_SIZE 39 | ||
100 | #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 | ||
101 | #define OPCODE_COMMON_FIRMWARE_CONFIG 42 | ||
102 | #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50 | ||
103 | #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51 | ||
104 | #define OPCODE_COMMON_CQ_DESTROY 54 | ||
105 | #define OPCODE_COMMON_EQ_DESTROY 55 | ||
106 | #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58 | ||
107 | #define OPCODE_COMMON_NTWK_PMAC_ADD 59 | ||
108 | #define OPCODE_COMMON_NTWK_PMAC_DEL 60 | ||
109 | |||
110 | #define OPCODE_ETH_ACPI_CONFIG 2 | ||
111 | #define OPCODE_ETH_PROMISCUOUS 3 | ||
112 | #define OPCODE_ETH_GET_STATISTICS 4 | ||
113 | #define OPCODE_ETH_TX_CREATE 7 | ||
114 | #define OPCODE_ETH_RX_CREATE 8 | ||
115 | #define OPCODE_ETH_TX_DESTROY 9 | ||
116 | #define OPCODE_ETH_RX_DESTROY 10 | ||
117 | |||
118 | struct be_cmd_req_hdr { | ||
119 | u8 opcode; /* dword 0 */ | ||
120 | u8 subsystem; /* dword 0 */ | ||
121 | u8 port_number; /* dword 0 */ | ||
122 | u8 domain; /* dword 0 */ | ||
123 | u32 timeout; /* dword 1 */ | ||
124 | u32 request_length; /* dword 2 */ | ||
125 | u32 rsvd; /* dword 3 */ | ||
126 | }; | ||
127 | |||
128 | #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */ | ||
129 | #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */ | ||
130 | struct be_cmd_resp_hdr { | ||
131 | u32 info; /* dword 0 */ | ||
132 | u32 status; /* dword 1 */ | ||
133 | u32 response_length; /* dword 2 */ | ||
134 | u32 actual_resp_len; /* dword 3 */ | ||
135 | }; | ||
136 | |||
137 | struct phys_addr { | ||
138 | u32 lo; | ||
139 | u32 hi; | ||
140 | }; | ||
141 | |||
142 | /************************** | ||
143 | * BE Command definitions * | ||
144 | **************************/ | ||
145 | |||
146 | /* Pseudo amap definition in which each bit of the actual structure is defined | ||
147 | * as a byte: used to calculate offset/shift/mask of each field */ | ||
148 | struct amap_eq_context { | ||
149 | u8 cidx[13]; /* dword 0*/ | ||
150 | u8 rsvd0[3]; /* dword 0*/ | ||
151 | u8 epidx[13]; /* dword 0*/ | ||
152 | u8 valid; /* dword 0*/ | ||
153 | u8 rsvd1; /* dword 0*/ | ||
154 | u8 size; /* dword 0*/ | ||
155 | u8 pidx[13]; /* dword 1*/ | ||
156 | u8 rsvd2[3]; /* dword 1*/ | ||
157 | u8 pd[10]; /* dword 1*/ | ||
158 | u8 count[3]; /* dword 1*/ | ||
159 | u8 solevent; /* dword 1*/ | ||
160 | u8 stalled; /* dword 1*/ | ||
161 | u8 armed; /* dword 1*/ | ||
162 | u8 rsvd3[4]; /* dword 2*/ | ||
163 | u8 func[8]; /* dword 2*/ | ||
164 | u8 rsvd4; /* dword 2*/ | ||
165 | u8 delaymult[10]; /* dword 2*/ | ||
166 | u8 rsvd5[2]; /* dword 2*/ | ||
167 | u8 phase[2]; /* dword 2*/ | ||
168 | u8 nodelay; /* dword 2*/ | ||
169 | u8 rsvd6[4]; /* dword 2*/ | ||
170 | u8 rsvd7[32]; /* dword 3*/ | ||
171 | } __packed; | ||
172 | |||
173 | struct be_cmd_req_eq_create { | ||
174 | struct be_cmd_req_hdr hdr; | ||
175 | u16 num_pages; /* sword */ | ||
176 | u16 rsvd0; /* sword */ | ||
177 | u8 context[sizeof(struct amap_eq_context) / 8]; | ||
178 | struct phys_addr pages[8]; | ||
179 | } __packed; | ||
180 | |||
181 | struct be_cmd_resp_eq_create { | ||
182 | struct be_cmd_resp_hdr resp_hdr; | ||
183 | u16 eq_id; /* sword */ | ||
184 | u16 rsvd0; /* sword */ | ||
185 | } __packed; | ||
186 | |||
187 | /******************** Mac query ***************************/ | ||
188 | enum { | ||
189 | MAC_ADDRESS_TYPE_STORAGE = 0x0, | ||
190 | MAC_ADDRESS_TYPE_NETWORK = 0x1, | ||
191 | MAC_ADDRESS_TYPE_PD = 0x2, | ||
192 | MAC_ADDRESS_TYPE_MANAGEMENT = 0x3 | ||
193 | }; | ||
194 | |||
195 | struct mac_addr { | ||
196 | u16 size_of_struct; | ||
197 | u8 addr[ETH_ALEN]; | ||
198 | } __packed; | ||
199 | |||
200 | struct be_cmd_req_mac_query { | ||
201 | struct be_cmd_req_hdr hdr; | ||
202 | u8 type; | ||
203 | u8 permanent; | ||
204 | u16 if_id; | ||
205 | } __packed; | ||
206 | |||
207 | struct be_cmd_resp_mac_query { | ||
208 | struct be_cmd_resp_hdr hdr; | ||
209 | struct mac_addr mac; | ||
210 | }; | ||
211 | |||
212 | /******************** PMac Add ***************************/ | ||
213 | struct be_cmd_req_pmac_add { | ||
214 | struct be_cmd_req_hdr hdr; | ||
215 | u32 if_id; | ||
216 | u8 mac_address[ETH_ALEN]; | ||
217 | u8 rsvd0[2]; | ||
218 | } __packed; | ||
219 | |||
220 | struct be_cmd_resp_pmac_add { | ||
221 | struct be_cmd_resp_hdr hdr; | ||
222 | u32 pmac_id; | ||
223 | }; | ||
224 | |||
225 | /******************** PMac Del ***************************/ | ||
226 | struct be_cmd_req_pmac_del { | ||
227 | struct be_cmd_req_hdr hdr; | ||
228 | u32 if_id; | ||
229 | u32 pmac_id; | ||
230 | }; | ||
231 | |||
232 | /******************** Create CQ ***************************/ | ||
233 | /* Pseudo amap definition in which each bit of the actual structure is defined | ||
234 | * as a byte: used to calculate offset/shift/mask of each field */ | ||
235 | struct amap_cq_context { | ||
236 | u8 cidx[11]; /* dword 0*/ | ||
237 | u8 rsvd0; /* dword 0*/ | ||
238 | u8 coalescwm[2]; /* dword 0*/ | ||
239 | u8 nodelay; /* dword 0*/ | ||
240 | u8 epidx[11]; /* dword 0*/ | ||
241 | u8 rsvd1; /* dword 0*/ | ||
242 | u8 count[2]; /* dword 0*/ | ||
243 | u8 valid; /* dword 0*/ | ||
244 | u8 solevent; /* dword 0*/ | ||
245 | u8 eventable; /* dword 0*/ | ||
246 | u8 pidx[11]; /* dword 1*/ | ||
247 | u8 rsvd2; /* dword 1*/ | ||
248 | u8 pd[10]; /* dword 1*/ | ||
249 | u8 eqid[8]; /* dword 1*/ | ||
250 | u8 stalled; /* dword 1*/ | ||
251 | u8 armed; /* dword 1*/ | ||
252 | u8 rsvd3[4]; /* dword 2*/ | ||
253 | u8 func[8]; /* dword 2*/ | ||
254 | u8 rsvd4[20]; /* dword 2*/ | ||
255 | u8 rsvd5[32]; /* dword 3*/ | ||
256 | } __packed; | ||
257 | |||
258 | struct be_cmd_req_cq_create { | ||
259 | struct be_cmd_req_hdr hdr; | ||
260 | u16 num_pages; | ||
261 | u16 rsvd0; | ||
262 | u8 context[sizeof(struct amap_cq_context) / 8]; | ||
263 | struct phys_addr pages[8]; | ||
264 | } __packed; | ||
265 | |||
266 | struct be_cmd_resp_cq_create { | ||
267 | struct be_cmd_resp_hdr hdr; | ||
268 | u16 cq_id; | ||
269 | u16 rsvd0; | ||
270 | } __packed; | ||
271 | |||
272 | /******************** Create TxQ ***************************/ | ||
273 | #define BE_ETH_TX_RING_TYPE_STANDARD 2 | ||
274 | #define BE_ULP1_NUM 1 | ||
275 | |||
276 | /* Pseudo amap definition in which each bit of the actual structure is defined | ||
277 | * as a byte: used to calculate offset/shift/mask of each field */ | ||
278 | struct amap_tx_context { | ||
279 | u8 rsvd0[16]; /* dword 0 */ | ||
280 | u8 tx_ring_size[4]; /* dword 0 */ | ||
281 | u8 rsvd1[26]; /* dword 0 */ | ||
282 | u8 pci_func_id[8]; /* dword 1 */ | ||
283 | u8 rsvd2[9]; /* dword 1 */ | ||
284 | u8 ctx_valid; /* dword 1 */ | ||
285 | u8 cq_id_send[16]; /* dword 2 */ | ||
286 | u8 rsvd3[16]; /* dword 2 */ | ||
287 | u8 rsvd4[32]; /* dword 3 */ | ||
288 | u8 rsvd5[32]; /* dword 4 */ | ||
289 | u8 rsvd6[32]; /* dword 5 */ | ||
290 | u8 rsvd7[32]; /* dword 6 */ | ||
291 | u8 rsvd8[32]; /* dword 7 */ | ||
292 | u8 rsvd9[32]; /* dword 8 */ | ||
293 | u8 rsvd10[32]; /* dword 9 */ | ||
294 | u8 rsvd11[32]; /* dword 10 */ | ||
295 | u8 rsvd12[32]; /* dword 11 */ | ||
296 | u8 rsvd13[32]; /* dword 12 */ | ||
297 | u8 rsvd14[32]; /* dword 13 */ | ||
298 | u8 rsvd15[32]; /* dword 14 */ | ||
299 | u8 rsvd16[32]; /* dword 15 */ | ||
300 | } __packed; | ||
301 | |||
302 | struct be_cmd_req_eth_tx_create { | ||
303 | struct be_cmd_req_hdr hdr; | ||
304 | u8 num_pages; | ||
305 | u8 ulp_num; | ||
306 | u8 type; | ||
307 | u8 bound_port; | ||
308 | u8 context[sizeof(struct amap_tx_context) / 8]; | ||
309 | struct phys_addr pages[8]; | ||
310 | } __packed; | ||
311 | |||
312 | struct be_cmd_resp_eth_tx_create { | ||
313 | struct be_cmd_resp_hdr hdr; | ||
314 | u16 cid; | ||
315 | u16 rsvd0; | ||
316 | } __packed; | ||
317 | |||
318 | /******************** Create RxQ ***************************/ | ||
319 | struct be_cmd_req_eth_rx_create { | ||
320 | struct be_cmd_req_hdr hdr; | ||
321 | u16 cq_id; | ||
322 | u8 frag_size; | ||
323 | u8 num_pages; | ||
324 | struct phys_addr pages[2]; | ||
325 | u32 interface_id; | ||
326 | u16 max_frame_size; | ||
327 | u16 rsvd0; | ||
328 | u32 rss_queue; | ||
329 | } __packed; | ||
330 | |||
331 | struct be_cmd_resp_eth_rx_create { | ||
332 | struct be_cmd_resp_hdr hdr; | ||
333 | u16 id; | ||
334 | u8 cpu_id; | ||
335 | u8 rsvd0; | ||
336 | } __packed; | ||
337 | |||
338 | /******************** Q Destroy ***************************/ | ||
339 | /* Type of Queue to be destroyed */ | ||
340 | enum { | ||
341 | QTYPE_EQ = 1, | ||
342 | QTYPE_CQ, | ||
343 | QTYPE_TXQ, | ||
344 | QTYPE_RXQ | ||
345 | }; | ||
346 | |||
347 | struct be_cmd_req_q_destroy { | ||
348 | struct be_cmd_req_hdr hdr; | ||
349 | u16 id; | ||
350 | u16 bypass_flush; /* valid only for rx q destroy */ | ||
351 | } __packed; | ||
352 | |||
353 | /************ I/f Create (it's actually I/f Config Create)**********/ | ||
354 | |||
355 | /* Capability flags for the i/f */ | ||
356 | enum be_if_flags { | ||
357 | BE_IF_FLAGS_RSS = 0x4, | ||
358 | BE_IF_FLAGS_PROMISCUOUS = 0x8, | ||
359 | BE_IF_FLAGS_BROADCAST = 0x10, | ||
360 | BE_IF_FLAGS_UNTAGGED = 0x20, | ||
361 | BE_IF_FLAGS_ULP = 0x40, | ||
362 | BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80, | ||
363 | BE_IF_FLAGS_VLAN = 0x100, | ||
364 | BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200, | ||
365 | BE_IF_FLAGS_PASS_L2_ERRORS = 0x400, | ||
366 | BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800 | ||
367 | }; | ||
368 | |||
369 | /* An RX interface is an object with one or more MAC addresses and | ||
370 | * filtering capabilities. */ | ||
371 | struct be_cmd_req_if_create { | ||
372 | struct be_cmd_req_hdr hdr; | ||
373 | u32 version; /* ignore currntly */ | ||
374 | u32 capability_flags; | ||
375 | u32 enable_flags; | ||
376 | u8 mac_addr[ETH_ALEN]; | ||
377 | u8 rsvd0; | ||
378 | u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */ | ||
379 | u32 vlan_tag; /* not used currently */ | ||
380 | } __packed; | ||
381 | |||
382 | struct be_cmd_resp_if_create { | ||
383 | struct be_cmd_resp_hdr hdr; | ||
384 | u32 interface_id; | ||
385 | u32 pmac_id; | ||
386 | }; | ||
387 | |||
388 | /****** I/f Destroy(it's actually I/f Config Destroy )**********/ | ||
389 | struct be_cmd_req_if_destroy { | ||
390 | struct be_cmd_req_hdr hdr; | ||
391 | u32 interface_id; | ||
392 | }; | ||
393 | |||
394 | /*************** HW Stats Get **********************************/ | ||
395 | struct be_port_rxf_stats { | ||
396 | u32 rx_bytes_lsd; /* dword 0*/ | ||
397 | u32 rx_bytes_msd; /* dword 1*/ | ||
398 | u32 rx_total_frames; /* dword 2*/ | ||
399 | u32 rx_unicast_frames; /* dword 3*/ | ||
400 | u32 rx_multicast_frames; /* dword 4*/ | ||
401 | u32 rx_broadcast_frames; /* dword 5*/ | ||
402 | u32 rx_crc_errors; /* dword 6*/ | ||
403 | u32 rx_alignment_symbol_errors; /* dword 7*/ | ||
404 | u32 rx_pause_frames; /* dword 8*/ | ||
405 | u32 rx_control_frames; /* dword 9*/ | ||
406 | u32 rx_in_range_errors; /* dword 10*/ | ||
407 | u32 rx_out_range_errors; /* dword 11*/ | ||
408 | u32 rx_frame_too_long; /* dword 12*/ | ||
409 | u32 rx_address_match_errors; /* dword 13*/ | ||
410 | u32 rx_vlan_mismatch; /* dword 14*/ | ||
411 | u32 rx_dropped_too_small; /* dword 15*/ | ||
412 | u32 rx_dropped_too_short; /* dword 16*/ | ||
413 | u32 rx_dropped_header_too_small; /* dword 17*/ | ||
414 | u32 rx_dropped_tcp_length; /* dword 18*/ | ||
415 | u32 rx_dropped_runt; /* dword 19*/ | ||
416 | u32 rx_64_byte_packets; /* dword 20*/ | ||
417 | u32 rx_65_127_byte_packets; /* dword 21*/ | ||
418 | u32 rx_128_256_byte_packets; /* dword 22*/ | ||
419 | u32 rx_256_511_byte_packets; /* dword 23*/ | ||
420 | u32 rx_512_1023_byte_packets; /* dword 24*/ | ||
421 | u32 rx_1024_1518_byte_packets; /* dword 25*/ | ||
422 | u32 rx_1519_2047_byte_packets; /* dword 26*/ | ||
423 | u32 rx_2048_4095_byte_packets; /* dword 27*/ | ||
424 | u32 rx_4096_8191_byte_packets; /* dword 28*/ | ||
425 | u32 rx_8192_9216_byte_packets; /* dword 29*/ | ||
426 | u32 rx_ip_checksum_errs; /* dword 30*/ | ||
427 | u32 rx_tcp_checksum_errs; /* dword 31*/ | ||
428 | u32 rx_udp_checksum_errs; /* dword 32*/ | ||
429 | u32 rx_non_rss_packets; /* dword 33*/ | ||
430 | u32 rx_ipv4_packets; /* dword 34*/ | ||
431 | u32 rx_ipv6_packets; /* dword 35*/ | ||
432 | u32 rx_ipv4_bytes_lsd; /* dword 36*/ | ||
433 | u32 rx_ipv4_bytes_msd; /* dword 37*/ | ||
434 | u32 rx_ipv6_bytes_lsd; /* dword 38*/ | ||
435 | u32 rx_ipv6_bytes_msd; /* dword 39*/ | ||
436 | u32 rx_chute1_packets; /* dword 40*/ | ||
437 | u32 rx_chute2_packets; /* dword 41*/ | ||
438 | u32 rx_chute3_packets; /* dword 42*/ | ||
439 | u32 rx_management_packets; /* dword 43*/ | ||
440 | u32 rx_switched_unicast_packets; /* dword 44*/ | ||
441 | u32 rx_switched_multicast_packets; /* dword 45*/ | ||
442 | u32 rx_switched_broadcast_packets; /* dword 46*/ | ||
443 | u32 tx_bytes_lsd; /* dword 47*/ | ||
444 | u32 tx_bytes_msd; /* dword 48*/ | ||
445 | u32 tx_unicastframes; /* dword 49*/ | ||
446 | u32 tx_multicastframes; /* dword 50*/ | ||
447 | u32 tx_broadcastframes; /* dword 51*/ | ||
448 | u32 tx_pauseframes; /* dword 52*/ | ||
449 | u32 tx_controlframes; /* dword 53*/ | ||
450 | u32 tx_64_byte_packets; /* dword 54*/ | ||
451 | u32 tx_65_127_byte_packets; /* dword 55*/ | ||
452 | u32 tx_128_256_byte_packets; /* dword 56*/ | ||
453 | u32 tx_256_511_byte_packets; /* dword 57*/ | ||
454 | u32 tx_512_1023_byte_packets; /* dword 58*/ | ||
455 | u32 tx_1024_1518_byte_packets; /* dword 59*/ | ||
456 | u32 tx_1519_2047_byte_packets; /* dword 60*/ | ||
457 | u32 tx_2048_4095_byte_packets; /* dword 61*/ | ||
458 | u32 tx_4096_8191_byte_packets; /* dword 62*/ | ||
459 | u32 tx_8192_9216_byte_packets; /* dword 63*/ | ||
460 | u32 rx_fifo_overflow; /* dword 64*/ | ||
461 | u32 rx_input_fifo_overflow; /* dword 65*/ | ||
462 | }; | ||
463 | |||
464 | struct be_rxf_stats { | ||
465 | struct be_port_rxf_stats port[2]; | ||
466 | u32 rx_drops_no_pbuf; /* dword 132*/ | ||
467 | u32 rx_drops_no_txpb; /* dword 133*/ | ||
468 | u32 rx_drops_no_erx_descr; /* dword 134*/ | ||
469 | u32 rx_drops_no_tpre_descr; /* dword 135*/ | ||
470 | u32 management_rx_port_packets; /* dword 136*/ | ||
471 | u32 management_rx_port_bytes; /* dword 137*/ | ||
472 | u32 management_rx_port_pause_frames; /* dword 138*/ | ||
473 | u32 management_rx_port_errors; /* dword 139*/ | ||
474 | u32 management_tx_port_packets; /* dword 140*/ | ||
475 | u32 management_tx_port_bytes; /* dword 141*/ | ||
476 | u32 management_tx_port_pause; /* dword 142*/ | ||
477 | u32 management_rx_port_rxfifo_overflow; /* dword 143*/ | ||
478 | u32 rx_drops_too_many_frags; /* dword 144*/ | ||
479 | u32 rx_drops_invalid_ring; /* dword 145*/ | ||
480 | u32 forwarded_packets; /* dword 146*/ | ||
481 | u32 rx_drops_mtu; /* dword 147*/ | ||
482 | u32 rsvd0[15]; | ||
483 | }; | ||
484 | |||
485 | struct be_erx_stats { | ||
486 | u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/ | ||
487 | u32 debug_wdma_sent_hold; /* dword 44*/ | ||
488 | u32 debug_wdma_pbfree_sent_hold; /* dword 45*/ | ||
489 | u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/ | ||
490 | u32 debug_pmem_pbuf_dealloc; /* dword 47*/ | ||
491 | }; | ||
492 | |||
493 | struct be_hw_stats { | ||
494 | struct be_rxf_stats rxf; | ||
495 | u32 rsvd[48]; | ||
496 | struct be_erx_stats erx; | ||
497 | }; | ||
498 | |||
499 | struct be_cmd_req_get_stats { | ||
500 | struct be_cmd_req_hdr hdr; | ||
501 | u8 rsvd[sizeof(struct be_hw_stats)]; | ||
502 | }; | ||
503 | |||
504 | struct be_cmd_resp_get_stats { | ||
505 | struct be_cmd_resp_hdr hdr; | ||
506 | struct be_hw_stats hw_stats; | ||
507 | }; | ||
508 | |||
509 | struct be_cmd_req_vlan_config { | ||
510 | struct be_cmd_req_hdr hdr; | ||
511 | u8 interface_id; | ||
512 | u8 promiscuous; | ||
513 | u8 untagged; | ||
514 | u8 num_vlan; | ||
515 | u16 normal_vlan[64]; | ||
516 | } __packed; | ||
517 | |||
518 | struct be_cmd_req_promiscuous_config { | ||
519 | struct be_cmd_req_hdr hdr; | ||
520 | u8 port0_promiscuous; | ||
521 | u8 port1_promiscuous; | ||
522 | u16 rsvd0; | ||
523 | } __packed; | ||
524 | |||
525 | struct macaddr { | ||
526 | u8 byte[ETH_ALEN]; | ||
527 | }; | ||
528 | |||
529 | struct be_cmd_req_mcast_mac_config { | ||
530 | struct be_cmd_req_hdr hdr; | ||
531 | u16 num_mac; | ||
532 | u8 promiscuous; | ||
533 | u8 interface_id; | ||
534 | struct macaddr mac[32]; | ||
535 | } __packed; | ||
536 | |||
537 | static inline struct be_hw_stats * | ||
538 | hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd) | ||
539 | { | ||
540 | return &cmd->hw_stats; | ||
541 | } | ||
542 | |||
543 | /******************** Link Status Query *******************/ | ||
544 | struct be_cmd_req_link_status { | ||
545 | struct be_cmd_req_hdr hdr; | ||
546 | u32 rsvd; | ||
547 | }; | ||
548 | |||
549 | struct be_link_info { | ||
550 | u8 duplex; | ||
551 | u8 speed; | ||
552 | u8 fault; | ||
553 | }; | ||
554 | |||
555 | enum { | ||
556 | PHY_LINK_DUPLEX_NONE = 0x0, | ||
557 | PHY_LINK_DUPLEX_HALF = 0x1, | ||
558 | PHY_LINK_DUPLEX_FULL = 0x2 | ||
559 | }; | ||
560 | |||
561 | enum { | ||
562 | PHY_LINK_SPEED_ZERO = 0x0, /* => No link */ | ||
563 | PHY_LINK_SPEED_10MBPS = 0x1, | ||
564 | PHY_LINK_SPEED_100MBPS = 0x2, | ||
565 | PHY_LINK_SPEED_1GBPS = 0x3, | ||
566 | PHY_LINK_SPEED_10GBPS = 0x4 | ||
567 | }; | ||
568 | |||
569 | struct be_cmd_resp_link_status { | ||
570 | struct be_cmd_resp_hdr hdr; | ||
571 | u8 physical_port; | ||
572 | u8 mac_duplex; | ||
573 | u8 mac_speed; | ||
574 | u8 mac_fault; | ||
575 | u8 mgmt_mac_duplex; | ||
576 | u8 mgmt_mac_speed; | ||
577 | u16 rsvd0; | ||
578 | } __packed; | ||
579 | |||
580 | /******************** Get FW Version *******************/ | ||
581 | #define FW_VER_LEN 32 | ||
582 | struct be_cmd_req_get_fw_version { | ||
583 | struct be_cmd_req_hdr hdr; | ||
584 | u8 rsvd0[FW_VER_LEN]; | ||
585 | u8 rsvd1[FW_VER_LEN]; | ||
586 | } __packed; | ||
587 | |||
588 | struct be_cmd_resp_get_fw_version { | ||
589 | struct be_cmd_resp_hdr hdr; | ||
590 | u8 firmware_version_string[FW_VER_LEN]; | ||
591 | u8 fw_on_flash_version_string[FW_VER_LEN]; | ||
592 | } __packed; | ||
593 | |||
594 | /******************** Set Flow Contrl *******************/ | ||
595 | struct be_cmd_req_set_flow_control { | ||
596 | struct be_cmd_req_hdr hdr; | ||
597 | u16 tx_flow_control; | ||
598 | u16 rx_flow_control; | ||
599 | } __packed; | ||
600 | |||
601 | /******************** Get Flow Contrl *******************/ | ||
602 | struct be_cmd_req_get_flow_control { | ||
603 | struct be_cmd_req_hdr hdr; | ||
604 | u32 rsvd; | ||
605 | }; | ||
606 | |||
607 | struct be_cmd_resp_get_flow_control { | ||
608 | struct be_cmd_resp_hdr hdr; | ||
609 | u16 tx_flow_control; | ||
610 | u16 rx_flow_control; | ||
611 | } __packed; | ||
612 | |||
613 | /******************** Modify EQ Delay *******************/ | ||
614 | struct be_cmd_req_modify_eq_delay { | ||
615 | struct be_cmd_req_hdr hdr; | ||
616 | u32 num_eq; | ||
617 | struct { | ||
618 | u32 eq_id; | ||
619 | u32 phase; | ||
620 | u32 delay_multiplier; | ||
621 | } delay[8]; | ||
622 | } __packed; | ||
623 | |||
624 | struct be_cmd_resp_modify_eq_delay { | ||
625 | struct be_cmd_resp_hdr hdr; | ||
626 | u32 rsvd0; | ||
627 | } __packed; | ||
628 | |||
629 | /******************** Get FW Config *******************/ | ||
630 | struct be_cmd_req_query_fw_cfg { | ||
631 | struct be_cmd_req_hdr hdr; | ||
632 | u32 rsvd[30]; | ||
633 | }; | ||
634 | |||
635 | struct be_cmd_resp_query_fw_cfg { | ||
636 | struct be_cmd_resp_hdr hdr; | ||
637 | u32 be_config_number; | ||
638 | u32 asic_revision; | ||
639 | u32 phys_port; | ||
640 | u32 function_mode; | ||
641 | u32 rsvd[26]; | ||
642 | }; | ||
643 | |||
644 | extern int be_pci_fnum_get(struct be_ctrl_info *ctrl); | ||
645 | extern int be_cmd_POST(struct be_ctrl_info *ctrl); | ||
646 | extern int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr, | ||
647 | u8 type, bool permanent, u32 if_handle); | ||
648 | extern int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr, | ||
649 | u32 if_id, u32 *pmac_id); | ||
650 | extern int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id); | ||
651 | extern int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 if_flags, u8 *mac, | ||
652 | bool pmac_invalid, u32 *if_handle, u32 *pmac_id); | ||
653 | extern int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 if_handle); | ||
654 | extern int be_cmd_eq_create(struct be_ctrl_info *ctrl, | ||
655 | struct be_queue_info *eq, int eq_delay); | ||
656 | extern int be_cmd_cq_create(struct be_ctrl_info *ctrl, | ||
657 | struct be_queue_info *cq, struct be_queue_info *eq, | ||
658 | bool sol_evts, bool no_delay, | ||
659 | int num_cqe_dma_coalesce); | ||
660 | extern int be_cmd_txq_create(struct be_ctrl_info *ctrl, | ||
661 | struct be_queue_info *txq, | ||
662 | struct be_queue_info *cq); | ||
663 | extern int be_cmd_rxq_create(struct be_ctrl_info *ctrl, | ||
664 | struct be_queue_info *rxq, u16 cq_id, | ||
665 | u16 frag_size, u16 max_frame_size, u32 if_id, | ||
666 | u32 rss); | ||
667 | extern int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q, | ||
668 | int type); | ||
669 | extern int be_cmd_link_status_query(struct be_ctrl_info *ctrl, | ||
670 | struct be_link_info *link); | ||
671 | extern int be_cmd_reset(struct be_ctrl_info *ctrl); | ||
672 | extern int be_cmd_get_stats(struct be_ctrl_info *ctrl, | ||
673 | struct be_dma_mem *nonemb_cmd); | ||
674 | extern int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver); | ||
675 | |||
676 | extern int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd); | ||
677 | extern int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id, | ||
678 | u16 *vtag_array, u32 num, bool untagged, | ||
679 | bool promiscuous); | ||
680 | extern int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl, | ||
681 | u8 port_num, bool en); | ||
682 | extern int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id, | ||
683 | u8 *mac_table, u32 num, bool promiscuous); | ||
684 | extern int be_cmd_set_flow_control(struct be_ctrl_info *ctrl, | ||
685 | u32 tx_fc, u32 rx_fc); | ||
686 | extern int be_cmd_get_flow_control(struct be_ctrl_info *ctrl, | ||
687 | u32 *tx_fc, u32 *rx_fc); | ||
688 | extern int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num); | ||