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authorAlex Dubov <oakad@yahoo.com>2006-10-04 05:15:37 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 10:55:14 -0400
commit4020f2d7f0b0e68b92bec9a3e1f4a54a7a9dc672 (patch)
treeafbe35984c945c5f81b2f29f3c54a144abeca3f0 /drivers/mmc/tifm_sd.c
parent856fe98f168e5b80b053979769af2514aab96d6b (diff)
[PATCH] mmc: driver for TI FlashMedia card reader - source
Driver for TI Flash Media card reader. At present, only MMC/SD cards are supported. [akpm@osdl.org: cleanups, build fixes] Signed-off-by: Alex Dubov <oakad@yahoo.com> Cc: Daniel Qarras <dqarras@yahoo.com> Acked-by: Pierre Ossman <drzeus@drzeus.cx> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/mmc/tifm_sd.c')
-rw-r--r--drivers/mmc/tifm_sd.c933
1 files changed, 933 insertions, 0 deletions
diff --git a/drivers/mmc/tifm_sd.c b/drivers/mmc/tifm_sd.c
new file mode 100644
index 00000000000..6d23dc08d16
--- /dev/null
+++ b/drivers/mmc/tifm_sd.c
@@ -0,0 +1,933 @@
1/*
2 * tifm_sd.c - TI FlashMedia driver
3 *
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12
13#include <linux/tifm.h>
14#include <linux/mmc/protocol.h>
15#include <linux/mmc/host.h>
16#include <linux/highmem.h>
17
18#define DRIVER_NAME "tifm_sd"
19#define DRIVER_VERSION "0.6"
20
21static int no_dma = 0;
22static int fixed_timeout = 0;
23module_param(no_dma, bool, 0644);
24module_param(fixed_timeout, bool, 0644);
25
26/* Constants here are mostly from OMAP5912 datasheet */
27#define TIFM_MMCSD_RESET 0x0002
28#define TIFM_MMCSD_CLKMASK 0x03ff
29#define TIFM_MMCSD_POWER 0x0800
30#define TIFM_MMCSD_4BBUS 0x8000
31#define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
32#define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
33#define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
34#define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
35#define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
36#define TIFM_MMCSD_READ 0x8000
37
38#define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
39#define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
40#define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
41#define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
42#define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
43#define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
44#define TIFM_MMCSD_DTO 0x0020 /* data time-out */
45#define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
46#define TIFM_MMCSD_CTO 0x0080 /* command time-out */
47#define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
48#define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
49#define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
50#define TIFM_MMCSD_CERR 0x4000 /* card status error */
51
52#define TIFM_MMCSD_FIFO_SIZE 0x0020
53
54#define TIFM_MMCSD_RSP_R0 0x0000
55#define TIFM_MMCSD_RSP_R1 0x0100
56#define TIFM_MMCSD_RSP_R2 0x0200
57#define TIFM_MMCSD_RSP_R3 0x0300
58#define TIFM_MMCSD_RSP_R4 0x0400
59#define TIFM_MMCSD_RSP_R5 0x0500
60#define TIFM_MMCSD_RSP_R6 0x0600
61
62#define TIFM_MMCSD_RSP_BUSY 0x0800
63
64#define TIFM_MMCSD_CMD_BC 0x0000
65#define TIFM_MMCSD_CMD_BCR 0x1000
66#define TIFM_MMCSD_CMD_AC 0x2000
67#define TIFM_MMCSD_CMD_ADTC 0x3000
68
69typedef enum {
70 IDLE = 0,
71 CMD, /* main command ended */
72 BRS, /* block transfer finished */
73 SCMD, /* stop command ended */
74 CARD, /* card left busy state */
75 FIFO, /* FIFO operation completed (uncertain) */
76 READY
77} card_state_t;
78
79enum {
80 FIFO_RDY = 0x0001, /* hardware dependent value */
81 HOST_REG = 0x0002,
82 EJECT = 0x0004,
83 EJECT_DONE = 0x0008,
84 CARD_BUSY = 0x0010,
85 OPENDRAIN = 0x0040, /* hardware dependent value */
86 CARD_EVENT = 0x0100, /* hardware dependent value */
87 CARD_RO = 0x0200, /* hardware dependent value */
88 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
89
90struct tifm_sd {
91 struct tifm_dev *dev;
92
93 unsigned int flags;
94 card_state_t state;
95 unsigned int clk_freq;
96 unsigned int clk_div;
97 unsigned long timeout_jiffies; // software timeout - 2 sec
98
99 struct mmc_request *req;
100 struct work_struct cmd_handler;
101 struct work_struct abort_handler;
102 wait_queue_head_t can_eject;
103
104 size_t written_blocks;
105 char *buffer;
106 size_t buffer_size;
107 size_t buffer_pos;
108
109};
110
111static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
112 unsigned int host_status)
113{
114 struct mmc_command *cmd = host->req->cmd;
115 unsigned int t_val = 0, cnt = 0;
116
117 if (host_status & TIFM_MMCSD_BRS) {
118 /* in non-dma rx mode BRS fires when fifo is still not empty */
119 if (host->buffer && (cmd->data->flags & MMC_DATA_READ)) {
120 while (host->buffer_size > host->buffer_pos) {
121 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
122 host->buffer[host->buffer_pos++] = t_val & 0xff;
123 host->buffer[host->buffer_pos++] =
124 (t_val >> 8) & 0xff;
125 }
126 }
127 return 1;
128 } else if (host->buffer) {
129 if ((cmd->data->flags & MMC_DATA_READ) &&
130 (host_status & TIFM_MMCSD_AF)) {
131 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
132 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
133 if (host->buffer_size > host->buffer_pos) {
134 host->buffer[host->buffer_pos++] =
135 t_val & 0xff;
136 host->buffer[host->buffer_pos++] =
137 (t_val >> 8) & 0xff;
138 }
139 }
140 } else if ((cmd->data->flags & MMC_DATA_WRITE)
141 && (host_status & TIFM_MMCSD_AE)) {
142 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
143 if (host->buffer_size > host->buffer_pos) {
144 t_val = host->buffer[host->buffer_pos++] & 0x00ff;
145 t_val |= ((host->buffer[host->buffer_pos++]) << 8)
146 & 0xff00;
147 writel(t_val,
148 sock->addr + SOCK_MMCSD_DATA);
149 }
150 }
151 }
152 }
153 return 0;
154}
155
156static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
157{
158 unsigned int rc = 0;
159
160 switch (mmc_resp_type(cmd)) {
161 case MMC_RSP_NONE:
162 rc |= TIFM_MMCSD_RSP_R0;
163 break;
164 case MMC_RSP_R1B:
165 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
166 case MMC_RSP_R1:
167 rc |= TIFM_MMCSD_RSP_R1;
168 break;
169 case MMC_RSP_R2:
170 rc |= TIFM_MMCSD_RSP_R2;
171 break;
172 case MMC_RSP_R3:
173 rc |= TIFM_MMCSD_RSP_R3;
174 break;
175 case MMC_RSP_R6:
176 rc |= TIFM_MMCSD_RSP_R6;
177 break;
178 default:
179 BUG();
180 }
181
182 switch (mmc_cmd_type(cmd)) {
183 case MMC_CMD_BC:
184 rc |= TIFM_MMCSD_CMD_BC;
185 break;
186 case MMC_CMD_BCR:
187 rc |= TIFM_MMCSD_CMD_BCR;
188 break;
189 case MMC_CMD_AC:
190 rc |= TIFM_MMCSD_CMD_AC;
191 break;
192 case MMC_CMD_ADTC:
193 rc |= TIFM_MMCSD_CMD_ADTC;
194 break;
195 default:
196 BUG();
197 }
198 return rc;
199}
200
201static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
202{
203 struct tifm_dev *sock = host->dev;
204 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
205 (host->flags & OPENDRAIN);
206
207 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
208 cmd_mask |= TIFM_MMCSD_READ;
209
210 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
211 cmd->opcode, cmd->arg, cmd_mask);
212
213 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
214 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
215 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
216}
217
218static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
219{
220 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
221 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
222 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
223 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
224 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
225 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
226 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
227 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
228}
229
230static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
231 unsigned int host_status)
232{
233 struct mmc_command *cmd = host->req->cmd;
234
235change_state:
236 switch (host->state) {
237 case IDLE:
238 return;
239 case CMD:
240 if (host_status & TIFM_MMCSD_EOC) {
241 tifm_sd_fetch_resp(cmd, sock);
242 if (cmd->data) {
243 host->state = BRS;
244 } else
245 host->state = READY;
246 goto change_state;
247 }
248 break;
249 case BRS:
250 if (tifm_sd_transfer_data(sock, host, host_status)) {
251 if (!host->req->stop) {
252 if (cmd->data->flags & MMC_DATA_WRITE) {
253 host->state = CARD;
254 } else {
255 host->state =
256 host->buffer ? READY : FIFO;
257 }
258 goto change_state;
259 }
260 tifm_sd_exec(host, host->req->stop);
261 host->state = SCMD;
262 }
263 break;
264 case SCMD:
265 if (host_status & TIFM_MMCSD_EOC) {
266 tifm_sd_fetch_resp(host->req->stop, sock);
267 if (cmd->error) {
268 host->state = READY;
269 } else if (cmd->data->flags & MMC_DATA_WRITE) {
270 host->state = CARD;
271 } else {
272 host->state = host->buffer ? READY : FIFO;
273 }
274 goto change_state;
275 }
276 break;
277 case CARD:
278 if (!(host->flags & CARD_BUSY)
279 && (host->written_blocks == cmd->data->blocks)) {
280 host->state = host->buffer ? READY : FIFO;
281 goto change_state;
282 }
283 break;
284 case FIFO:
285 if (host->flags & FIFO_RDY) {
286 host->state = READY;
287 host->flags &= ~FIFO_RDY;
288 goto change_state;
289 }
290 break;
291 case READY:
292 queue_work(sock->wq, &host->cmd_handler);
293 return;
294 }
295
296 queue_delayed_work(sock->wq, &host->abort_handler,
297 host->timeout_jiffies);
298}
299
300/* Called from interrupt handler */
301static unsigned int tifm_sd_signal_irq(struct tifm_dev *sock,
302 unsigned int sock_irq_status)
303{
304 struct tifm_sd *host;
305 unsigned int host_status = 0, fifo_status = 0;
306 int error_code = 0;
307
308 spin_lock(&sock->lock);
309 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
310 cancel_delayed_work(&host->abort_handler);
311
312 if (sock_irq_status & FIFO_EVENT) {
313 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
314 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
315
316 host->flags |= fifo_status & FIFO_RDY;
317 }
318
319 if (sock_irq_status & CARD_EVENT) {
320 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
321 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
322
323 if (!(host->flags & HOST_REG))
324 queue_work(sock->wq, &host->cmd_handler);
325 if (!host->req)
326 goto done;
327
328 if (host_status & TIFM_MMCSD_ERRMASK) {
329 if (host_status & TIFM_MMCSD_CERR)
330 error_code = MMC_ERR_FAILED;
331 else if (host_status &
332 (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
333 error_code = MMC_ERR_TIMEOUT;
334 else if (host_status &
335 (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
336 error_code = MMC_ERR_BADCRC;
337
338 writel(TIFM_FIFO_INT_SETALL,
339 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
340 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
341
342 if (host->req->stop) {
343 if (host->state == SCMD) {
344 host->req->stop->error = error_code;
345 } else if(host->state == BRS) {
346 host->req->cmd->error = error_code;
347 tifm_sd_exec(host, host->req->stop);
348 queue_delayed_work(sock->wq,
349 &host->abort_handler,
350 host->timeout_jiffies);
351 host->state = SCMD;
352 goto done;
353 } else {
354 host->req->cmd->error = error_code;
355 }
356 } else {
357 host->req->cmd->error = error_code;
358 }
359 host->state = READY;
360 }
361
362 if (host_status & TIFM_MMCSD_CB)
363 host->flags |= CARD_BUSY;
364 if ((host_status & TIFM_MMCSD_EOFB) &&
365 (host->flags & CARD_BUSY)) {
366 host->written_blocks++;
367 host->flags &= ~CARD_BUSY;
368 }
369 }
370
371 if (host->req)
372 tifm_sd_process_cmd(sock, host, host_status);
373done:
374 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
375 host_status, fifo_status);
376 spin_unlock(&sock->lock);
377 return sock_irq_status;
378}
379
380static void tifm_sd_prepare_data(struct tifm_sd *card, struct mmc_command *cmd)
381{
382 struct tifm_dev *sock = card->dev;
383 unsigned int dest_cnt;
384
385 /* DMA style IO */
386
387 writel(TIFM_FIFO_INT_SETALL,
388 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
389 writel(long_log2(cmd->data->blksz) - 2,
390 sock->addr + SOCK_FIFO_PAGE_SIZE);
391 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
392 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
393
394 dest_cnt = (cmd->data->blocks) << 8;
395
396 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
397
398 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
399 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
400
401 if (cmd->data->flags & MMC_DATA_WRITE) {
402 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
403 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
404 sock->addr + SOCK_DMA_CONTROL);
405 } else {
406 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
407 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
408 }
409}
410
411static void tifm_sd_set_data_timeout(struct tifm_sd *host,
412 struct mmc_data *data)
413{
414 struct tifm_dev *sock = host->dev;
415 unsigned int data_timeout = data->timeout_clks;
416
417 if (fixed_timeout)
418 return;
419
420 data_timeout += data->timeout_ns /
421 ((1000000000 / host->clk_freq) * host->clk_div);
422 data_timeout *= 10; // call it fudge factor for now
423
424 if (data_timeout < 0xffff) {
425 writel((~TIFM_MMCSD_DPE) &
426 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
427 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
428 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
429 } else {
430 writel(TIFM_MMCSD_DPE |
431 readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
432 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
433 data_timeout = (data_timeout >> 10) + 1;
434 if(data_timeout > 0xffff)
435 data_timeout = 0; /* set to unlimited */
436 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
437 }
438}
439
440static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
441{
442 struct tifm_sd *host = mmc_priv(mmc);
443 struct tifm_dev *sock = host->dev;
444 unsigned long flags;
445 int sg_count = 0;
446 struct mmc_data *r_data = mrq->cmd->data;
447
448 spin_lock_irqsave(&sock->lock, flags);
449 if (host->flags & EJECT) {
450 spin_unlock_irqrestore(&sock->lock, flags);
451 goto err_out;
452 }
453
454 if (host->req) {
455 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
456 spin_unlock_irqrestore(&sock->lock, flags);
457 goto err_out;
458 }
459
460 if (r_data) {
461 tifm_sd_set_data_timeout(host, r_data);
462
463 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
464 mrq->cmd->flags & MMC_DATA_WRITE
465 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
466 if (sg_count != 1) {
467 printk(KERN_ERR DRIVER_NAME
468 ": scatterlist map failed\n");
469 spin_unlock_irqrestore(&sock->lock, flags);
470 goto err_out;
471 }
472
473 host->written_blocks = 0;
474 host->flags &= ~CARD_BUSY;
475 tifm_sd_prepare_data(host, mrq->cmd);
476 }
477
478 host->req = mrq;
479 host->state = CMD;
480 queue_delayed_work(sock->wq, &host->abort_handler,
481 host->timeout_jiffies);
482 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
483 sock->addr + SOCK_CONTROL);
484 tifm_sd_exec(host, mrq->cmd);
485 spin_unlock_irqrestore(&sock->lock, flags);
486 return;
487
488err_out:
489 if (sg_count > 0)
490 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
491 (r_data->flags & MMC_DATA_WRITE)
492 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
493
494 mrq->cmd->error = MMC_ERR_TIMEOUT;
495 mmc_request_done(mmc, mrq);
496}
497
498static void tifm_sd_end_cmd(void *data)
499{
500 struct tifm_sd *host = data;
501 struct tifm_dev *sock = host->dev;
502 struct mmc_host *mmc = tifm_get_drvdata(sock);
503 struct mmc_request *mrq;
504 struct mmc_data *r_data = 0;
505 unsigned long flags;
506
507 spin_lock_irqsave(&sock->lock, flags);
508
509 mrq = host->req;
510 host->req = 0;
511 host->state = IDLE;
512
513 if (!mrq) {
514 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
515 spin_unlock_irqrestore(&sock->lock, flags);
516 return;
517 }
518
519 r_data = mrq->cmd->data;
520 if (r_data) {
521 if (r_data->flags & MMC_DATA_WRITE) {
522 r_data->bytes_xfered = host->written_blocks *
523 r_data->blksz;
524 } else {
525 r_data->bytes_xfered = r_data->blocks -
526 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
527 r_data->bytes_xfered *= r_data->blksz;
528 r_data->bytes_xfered += r_data->blksz -
529 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
530 }
531 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
532 (r_data->flags & MMC_DATA_WRITE)
533 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
534 }
535
536 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
537 sock->addr + SOCK_CONTROL);
538
539 spin_unlock_irqrestore(&sock->lock, flags);
540 mmc_request_done(mmc, mrq);
541}
542
543static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
544{
545 struct tifm_sd *host = mmc_priv(mmc);
546 struct tifm_dev *sock = host->dev;
547 unsigned long flags;
548 struct mmc_data *r_data = mrq->cmd->data;
549 char *t_buffer = 0;
550
551 if (r_data) {
552 t_buffer = kmap(r_data->sg->page);
553 if (!t_buffer) {
554 printk(KERN_ERR DRIVER_NAME ": kmap failed\n");
555 goto err_out;
556 }
557 }
558
559 spin_lock_irqsave(&sock->lock, flags);
560 if (host->flags & EJECT) {
561 spin_unlock_irqrestore(&sock->lock, flags);
562 goto err_out;
563 }
564
565 if (host->req) {
566 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
567 spin_unlock_irqrestore(&sock->lock, flags);
568 goto err_out;
569 }
570
571 if (r_data) {
572 tifm_sd_set_data_timeout(host, r_data);
573
574 host->buffer = t_buffer + r_data->sg->offset;
575 host->buffer_size = mrq->cmd->data->blocks *
576 mrq->cmd->data->blksz;
577
578 writel(TIFM_MMCSD_BUFINT |
579 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
580 sock->addr + SOCK_MMCSD_INT_ENABLE);
581 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) |
582 (TIFM_MMCSD_FIFO_SIZE - 1),
583 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
584
585 host->written_blocks = 0;
586 host->flags &= ~CARD_BUSY;
587 host->buffer_pos = 0;
588 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
589 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
590 }
591
592 host->req = mrq;
593 host->state = CMD;
594 queue_delayed_work(sock->wq, &host->abort_handler,
595 host->timeout_jiffies);
596 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
597 sock->addr + SOCK_CONTROL);
598 tifm_sd_exec(host, mrq->cmd);
599 spin_unlock_irqrestore(&sock->lock, flags);
600 return;
601
602err_out:
603 if (t_buffer)
604 kunmap(r_data->sg->page);
605
606 mrq->cmd->error = MMC_ERR_TIMEOUT;
607 mmc_request_done(mmc, mrq);
608}
609
610static void tifm_sd_end_cmd_nodma(void *data)
611{
612 struct tifm_sd *host = (struct tifm_sd*)data;
613 struct tifm_dev *sock = host->dev;
614 struct mmc_host *mmc = tifm_get_drvdata(sock);
615 struct mmc_request *mrq;
616 struct mmc_data *r_data = 0;
617 unsigned long flags;
618
619 spin_lock_irqsave(&sock->lock, flags);
620
621 mrq = host->req;
622 host->req = 0;
623 host->state = IDLE;
624
625 if (!mrq) {
626 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
627 spin_unlock_irqrestore(&sock->lock, flags);
628 return;
629 }
630
631 r_data = mrq->cmd->data;
632 if (r_data) {
633 writel((~TIFM_MMCSD_BUFINT) &
634 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
635 sock->addr + SOCK_MMCSD_INT_ENABLE);
636
637 if (r_data->flags & MMC_DATA_WRITE) {
638 r_data->bytes_xfered = host->written_blocks *
639 r_data->blksz;
640 } else {
641 r_data->bytes_xfered = r_data->blocks -
642 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
643 r_data->bytes_xfered *= r_data->blksz;
644 r_data->bytes_xfered += r_data->blksz -
645 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
646 }
647 host->buffer = 0;
648 host->buffer_pos = 0;
649 host->buffer_size = 0;
650 }
651
652 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
653 sock->addr + SOCK_CONTROL);
654
655 spin_unlock_irqrestore(&sock->lock, flags);
656
657 if (r_data)
658 kunmap(r_data->sg->page);
659
660 mmc_request_done(mmc, mrq);
661}
662
663static void tifm_sd_abort(void *data)
664{
665 printk(KERN_ERR DRIVER_NAME
666 ": card failed to respond for a long period of time");
667 tifm_eject(((struct tifm_sd*)data)->dev);
668}
669
670static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
671{
672 struct tifm_sd *host = mmc_priv(mmc);
673 struct tifm_dev *sock = host->dev;
674 unsigned int clk_div1, clk_div2;
675 unsigned long flags;
676
677 spin_lock_irqsave(&sock->lock, flags);
678
679 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
680 ios->power_mode);
681 if (ios->bus_width == MMC_BUS_WIDTH_4) {
682 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
683 sock->addr + SOCK_MMCSD_CONFIG);
684 } else {
685 writel((~TIFM_MMCSD_4BBUS) &
686 readl(sock->addr + SOCK_MMCSD_CONFIG),
687 sock->addr + SOCK_MMCSD_CONFIG);
688 }
689
690 if (ios->clock) {
691 clk_div1 = 20000000 / ios->clock;
692 if (!clk_div1)
693 clk_div1 = 1;
694
695 clk_div2 = 24000000 / ios->clock;
696 if (!clk_div2)
697 clk_div2 = 1;
698
699 if ((20000000 / clk_div1) > ios->clock)
700 clk_div1++;
701 if ((24000000 / clk_div2) > ios->clock)
702 clk_div2++;
703 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
704 host->clk_freq = 20000000;
705 host->clk_div = clk_div1;
706 writel((~TIFM_CTRL_FAST_CLK) &
707 readl(sock->addr + SOCK_CONTROL),
708 sock->addr + SOCK_CONTROL);
709 } else {
710 host->clk_freq = 24000000;
711 host->clk_div = clk_div2;
712 writel(TIFM_CTRL_FAST_CLK |
713 readl(sock->addr + SOCK_CONTROL),
714 sock->addr + SOCK_CONTROL);
715 }
716 } else {
717 host->clk_div = 0;
718 }
719 host->clk_div &= TIFM_MMCSD_CLKMASK;
720 writel(host->clk_div | ((~TIFM_MMCSD_CLKMASK) &
721 readl(sock->addr + SOCK_MMCSD_CONFIG)),
722 sock->addr + SOCK_MMCSD_CONFIG);
723
724 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
725 host->flags |= OPENDRAIN;
726 else
727 host->flags &= ~OPENDRAIN;
728
729 /* chip_select : maybe later */
730 //vdd
731 //power is set before probe / after remove
732 //I believe, power_off when already marked for eject is sufficient to
733 // allow removal.
734 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
735 host->flags |= EJECT_DONE;
736 wake_up_all(&host->can_eject);
737 }
738
739 spin_unlock_irqrestore(&sock->lock, flags);
740}
741
742static int tifm_sd_ro(struct mmc_host *mmc)
743{
744 int rc;
745 struct tifm_sd *host = mmc_priv(mmc);
746 struct tifm_dev *sock = host->dev;
747 unsigned long flags;
748
749 spin_lock_irqsave(&sock->lock, flags);
750
751 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
752 rc = (host->flags & CARD_RO) ? 1 : 0;
753
754 spin_unlock_irqrestore(&sock->lock, flags);
755 return rc;
756}
757
758static struct mmc_host_ops tifm_sd_ops = {
759 .request = tifm_sd_request,
760 .set_ios = tifm_sd_ios,
761 .get_ro = tifm_sd_ro
762};
763
764static void tifm_sd_register_host(void *data)
765{
766 struct tifm_sd *host = (struct tifm_sd*)data;
767 struct tifm_dev *sock = host->dev;
768 struct mmc_host *mmc = tifm_get_drvdata(sock);
769 unsigned long flags;
770
771 spin_lock_irqsave(&sock->lock, flags);
772 host->flags |= HOST_REG;
773 PREPARE_WORK(&host->cmd_handler,
774 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd,
775 data);
776 spin_unlock_irqrestore(&sock->lock, flags);
777 dev_dbg(&sock->dev, "adding host\n");
778 mmc_add_host(mmc);
779}
780
781static int tifm_sd_probe(struct tifm_dev *sock)
782{
783 struct mmc_host *mmc;
784 struct tifm_sd *host;
785 int rc = -EIO;
786
787 if (!(TIFM_SOCK_STATE_OCCUPIED &
788 readl(sock->addr + SOCK_PRESENT_STATE))) {
789 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
790 return rc;
791 }
792
793 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
794 if (!mmc)
795 return -ENOMEM;
796
797 host = mmc_priv(mmc);
798 host->dev = sock;
799 host->clk_div = 61;
800 init_waitqueue_head(&host->can_eject);
801 INIT_WORK(&host->cmd_handler, tifm_sd_register_host, host);
802 INIT_WORK(&host->abort_handler, tifm_sd_abort, host);
803
804 tifm_set_drvdata(sock, mmc);
805 sock->signal_irq = tifm_sd_signal_irq;
806
807 host->clk_freq = 20000000;
808 host->timeout_jiffies = msecs_to_jiffies(1000);
809
810 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
811 mmc->ops = &tifm_sd_ops;
812 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
813 mmc->caps = MMC_CAP_4_BIT_DATA;
814 mmc->f_min = 20000000 / 60;
815 mmc->f_max = 24000000;
816 mmc->max_hw_segs = 1;
817 mmc->max_phys_segs = 1;
818 mmc->max_sectors = 127;
819 mmc->max_seg_size = mmc->max_sectors << 11; //2k maximum hw block length
820
821 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
822 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
823 writel(host->clk_div | TIFM_MMCSD_POWER,
824 sock->addr + SOCK_MMCSD_CONFIG);
825
826 for (rc = 0; rc < 50; rc++) {
827 /* Wait for reset ack */
828 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
829 rc = 0;
830 break;
831 }
832 msleep(10);
833 }
834
835 if (rc) {
836 printk(KERN_ERR DRIVER_NAME
837 ": card not ready - probe failed\n");
838 mmc_free_host(mmc);
839 return -ENODEV;
840 }
841
842 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
843 writel(host->clk_div | TIFM_MMCSD_POWER,
844 sock->addr + SOCK_MMCSD_CONFIG);
845 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
846 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
847 sock->addr + SOCK_MMCSD_INT_ENABLE);
848
849 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); // command timeout 64 clocks for now
850 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
851 writel(host->clk_div | TIFM_MMCSD_POWER,
852 sock->addr + SOCK_MMCSD_CONFIG);
853
854 queue_delayed_work(sock->wq, &host->abort_handler,
855 host->timeout_jiffies);
856
857 return 0;
858}
859
860static int tifm_sd_host_is_down(struct tifm_dev *sock)
861{
862 struct mmc_host *mmc = tifm_get_drvdata(sock);
863 struct tifm_sd *host = mmc_priv(mmc);
864 unsigned long flags;
865 int rc = 0;
866
867 spin_lock_irqsave(&sock->lock, flags);
868 rc = (host->flags & EJECT_DONE);
869 spin_unlock_irqrestore(&sock->lock, flags);
870 return rc;
871}
872
873static void tifm_sd_remove(struct tifm_dev *sock)
874{
875 struct mmc_host *mmc = tifm_get_drvdata(sock);
876 struct tifm_sd *host = mmc_priv(mmc);
877 unsigned long flags;
878
879 spin_lock_irqsave(&sock->lock, flags);
880 host->flags |= EJECT;
881 if (host->req)
882 queue_work(sock->wq, &host->cmd_handler);
883 spin_unlock_irqrestore(&sock->lock, flags);
884 wait_event_timeout(host->can_eject, tifm_sd_host_is_down(sock),
885 host->timeout_jiffies);
886
887 if (host->flags & HOST_REG)
888 mmc_remove_host(mmc);
889
890 /* The meaning of the bit majority in this constant is unknown. */
891 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
892 sock->addr + SOCK_CONTROL);
893 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
894 writel(TIFM_FIFO_INT_SETALL,
895 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
896 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
897
898 tifm_set_drvdata(sock, 0);
899 mmc_free_host(mmc);
900}
901
902static tifm_media_id tifm_sd_id_tbl[] = {
903 FM_SD, 0
904};
905
906static struct tifm_driver tifm_sd_driver = {
907 .driver = {
908 .name = DRIVER_NAME,
909 .owner = THIS_MODULE
910 },
911 .id_table = tifm_sd_id_tbl,
912 .probe = tifm_sd_probe,
913 .remove = tifm_sd_remove
914};
915
916static int __init tifm_sd_init(void)
917{
918 return tifm_register_driver(&tifm_sd_driver);
919}
920
921static void __exit tifm_sd_exit(void)
922{
923 tifm_unregister_driver(&tifm_sd_driver);
924}
925
926MODULE_AUTHOR("Alex Dubov");
927MODULE_DESCRIPTION("TI FlashMedia SD driver");
928MODULE_LICENSE("GPL");
929MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
930MODULE_VERSION(DRIVER_VERSION);
931
932module_init(tifm_sd_init);
933module_exit(tifm_sd_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 11:10:05 -0500